Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // Originally by David Raingeard
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
   6 // Cleanups/rewrites/fixes by James Hammons
   7 //
   8 // JLH = James Hammons <jlhamm@acm.org>
   9 //
  10 // WHO  WHEN        WHAT
  11 // ---  ----------  -----------------------------------------------------------
  12 // JLH  11/25/2009  Major rewrite of memory subsystem and handlers
  13 //
  14
  15 // ------------------------------------------------------------
  16 // JERRY REGISTERS (Mapped by Aaron Giles)
  17 // ------------------------------------------------------------
  18 // F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  19 // F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  20 // F10002            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  21 // F10004            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  22 // F10008            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  23 // F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  24 // F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  25 // F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  26 // F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  27 //                   W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  28 //                   W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  29 //                   W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  30 //                   W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  31 //                   W   -------x --------      (J_EXTCLR - clear external interrupts)
  32 //                 R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  33 //                 R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  34 //                 R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  35 //                 R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  36 //                 R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  37 // F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  38 // F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  39 //                   W   -x------ --------      (TXBRK - transmit break)
  40 //                   W   -------- -x------      (CLRERR - clear error)
  41 //                   W   -------- --x-----      (RINTEN - enable receiver interrupts)
  42 //                   W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  43 //                   W   -------- ----x---      (RXIPOL - receiver input polarity)
  44 //                   W   -------- -----x--      (TXOPOL - transmitter output polarity)
  45 //                   W   -------- ------x-      (PAREN - parity enable)
  46 //                   W   -------- -------x      (ODD - odd parity select)
  47 // F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  48 //                 R     x------- --------      (ERROR - OR of PE,FE,OE)
  49 //                 R     -x------ --------      (TXBRK - transmit break)
  50 //                 R     --x----- --------      (SERIN - serial input)
  51 //                 R     ----x--- --------      (OE - overrun error)
  52 //                 R     -----x-- --------      (FE - framing error)
  53 //                 R     ------x- --------      (PE - parity error)
  54 //                 R     -------x --------      (TBE - transmit buffer empty)
  55 //                 R     -------- x-------      (RBF - receive buffer full)
  56 //                 R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  57 //                 R     -------- ----x---      (RXIPOL - receiver input polarity)
  58 //                 R     -------- -----x--      (TXOPOL - transmitter output polarity)
  59 //                 R     -------- ------x-      (PAREN - parity enable)
  60 //                 R     -------- -------x      (ODD - odd parity)
  61 // F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  62 // F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  63 // F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  64 // F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  65 // F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  66 // ------------------------------------------------------------
  67 // F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  68 // F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  69 // F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  70 //                   W   x------- --------      (enable joystick outputs)
  71 //                   W   -------- xxxxxxxx      (joystick output data)
  72 // F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  73 // F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved (CD-ROM? no.)
  74 // F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  75 // F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  76 // F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  77 // F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  78 // F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  79 // ------------------------------------------------------------
  80 // F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  81 // F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  82 //                 R/W   x------- --------      (DMAEN - DMA enable)
  83 //                 R/W   -x------ --------      (REGPAGE - register page)
  84 //                   W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  85 //                   W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  86 //                   W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  87 //                   W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  88 //                   W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  89 //                 R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  90 //                 R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  91 //                 R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  92 //                 R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  93 //                 R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  94 //                 R/W   -------- ----x---      (IMASK - interrupt mask)
  95 //                 R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  96 //                 R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  97 //                 R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  98 // F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  99 //                 R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
 100 //                 R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
 101 // F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
 102 //                   W   -------- ----x---      (MATCOL - column/row major)
 103 //                   W   -------- -----xxx      (MATRIX3-15 - matrix width)
 104 // F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
 105 // F1A10C            W   -------- -----x-x   D_END - data organization register
 106 //                   W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 107 //                   W   -------- -------x      (BIG_IO - big endian I/O)
 108 // F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
 109 // F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
 110 //                 R     xxxx---- --------      (VERSION - DSP version code)
 111 //                 R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 112 //                 R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 113 //                 R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 114 //                 R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 115 //                 R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 116 //                 R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 117 //                 R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 118 //                 R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 119 //                 R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 120 //                 R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 121 //                 R/W   -------- -------x      (DSPGO - enable DSP execution)
 122 // F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 123 //                 R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 124 // F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 125 // F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 126 // F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 127 //                   W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 128 // F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 129 // F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 130 // F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 131 // F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 132 // F1A150          R     -------- ------xx   SSTAT
 133 //                 R     -------- ------x-      (left - no description)
 134 //                 R     -------- -------x      (WS - word strobe status)
 135 // F1A154            W   -------- --xxxx-x   SMODE - serial mode
 136 //                   W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 137 //                   W   -------- ---x----      (FALLING - interrupt on falling edge)
 138 //                   W   -------- ----x---      (RISING - interrupt of rising edge)
 139 //                   W   -------- -----x--      (WSEN - enable word strobes)
 140 //                   W   -------- -------x      (INTERNAL - enables serial clock)
 141 // ------------------------------------------------------------
 142 // F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 143 // ------------------------------------------------------------
 144 // F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 145 // F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 146 // F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 147 // F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 148 // F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 149 // F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 150 // F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 151 // F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 152 // ------------------------------------------------------------
 153
 154 #include "jerry.h"
 155
 156 #include <string.h>                                                             // For memcpy
 157 //#include <math.h>
 158 #include "cdrom.h"
 159 #include "dac.h"
 160 #include "dsp.h"
 161 #include "eeprom.h"
 162 #include "event.h"
 163 #include "jaguar.h"
 164 #include "joystick.h"
 165 #include "log.h"
 166 #include "m68000/m68kinterface.h"
 167 #include "settings.h"
 168 #include "tom.h"
 169 //#include "memory.h"
 170 #include "wavetable.h"
 171
 172 //Note that 44100 Hz requires samples every 22.675737 usec.
 173 //#define JERRY_DEBUG
 174
 175 /*static*/ uint8_t jerry_ram_8[0x10000];
 176
 177 //#define JERRY_CONFIG  0x4002                                          // ??? What's this ???
 178
 179 uint8_t analog_x, analog_y;
 180
 181 static uint32_t JERRYPIT1Prescaler;
 182 static uint32_t JERRYPIT1Divider;
 183 static uint32_t JERRYPIT2Prescaler;
 184 static uint32_t JERRYPIT2Divider;
 185 static int32_t jerry_timer_1_counter;
 186 static int32_t jerry_timer_2_counter;
 187
 188 uint32_t JERRYI2SInterruptDivide = 8;
 189 int32_t JERRYI2SInterruptTimer = -1;
 190 uint32_t jerryI2SCycles;
 191 uint32_t jerryIntPending;
 192
 193 static uint16_t jerryInterruptMask = 0;
 194 static uint16_t jerryPendingInterrupt = 0;
 195
 196 // Private function prototypes
 197
 198 void JERRYResetPIT1(void);
 199 void JERRYResetPIT2(void);
 200 void JERRYResetI2S(void);
 201
 202 void JERRYPIT1Callback(void);
 203 void JERRYPIT2Callback(void);
 204 void JERRYI2SCallback(void);
 205
 206
 207 void JERRYResetI2S(void)
 208 {
 209         //WriteLog("i2s: reseting\n");
 210 //This is really SCLK... !!! FIX !!!
 211         JERRYI2SInterruptDivide = 8;
 212         JERRYI2SInterruptTimer = -1;
 213 }
 214
 215
 216 void JERRYResetPIT1(void)
 217 {
 218         RemoveCallback(JERRYPIT1Callback);
 219
 220         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 221         {
 222                 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
 223                 SetCallbackTime(JERRYPIT1Callback, usecs, EVENT_JERRY);
 224         }
 225 }
 226
 227
 228 void JERRYResetPIT2(void)
 229 {
 230         RemoveCallback(JERRYPIT2Callback);
 231
 232         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 233         {
 234                 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
 235                 SetCallbackTime(JERRYPIT2Callback, usecs, EVENT_JERRY);
 236         }
 237 }
 238
 239
 240 // This is the cause of the regressions in Cybermorph and Missile Command 3D...
 241 // Solution: Probably have to check the DSP enable bit before sending these thru.
 242 //#define JERRY_NO_IRQS
 243 void JERRYPIT1Callback(void)
 244 {
 245 #ifndef JERRY_NO_IRQS
 246 //WriteLog("JERRY: In PIT1 callback, IRQM=$%04X\n", jerryInterruptMask);
 247         if (TOMIRQEnabled(IRQ_DSP))
 248         {
 249                 if (jerryInterruptMask & IRQ2_TIMER1)           // CPU Timer 1 IRQ
 250                 {
 251 // Not sure, but I think we don't generate another IRQ if one's already going...
 252 // But this seems to work... :-/
 253                         jerryPendingInterrupt |= IRQ2_TIMER1;
 254                         m68k_set_irq(2);                                                // Generate 68K IPL 2
 255                 }
 256         }
 257 #endif
 258
 259         DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 260         JERRYResetPIT1();
 261 }
 262
 263
 264 void JERRYPIT2Callback(void)
 265 {
 266 #ifndef JERRY_NO_IRQS
 267         if (TOMIRQEnabled(IRQ_DSP))
 268         {
 269 //WriteLog("JERRY: In PIT2 callback, IRQM=$%04X\n", jerryInterruptMask);
 270                 if (jerryInterruptMask & IRQ2_TIMER2)           // CPU Timer 2 IRQ
 271                 {
 272                         jerryPendingInterrupt |= IRQ2_TIMER2;
 273                         m68k_set_irq(2);                                                // Generate 68K IPL 2
 274                 }
 275         }
 276 #endif
 277
 278         DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 279         JERRYResetPIT2();
 280 }
 281
 282
 283 void JERRYI2SCallback(void)
 284 {
 285         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 286 //Yes, it should. !!! FIX !!!
 287 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
 288         JERRYI2SInterruptDivide &= 0xFF;
 289         // We don't have to divide the RISC clock rate by this--the reason is a bit
 290         // convoluted. Will put explanation here later...
 291 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 292 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 293 // this: 26590906 / 44100 = 602 cycles.
 294 // Which means, every 602 cycles that go by we have to generate an interrupt.
 295         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 296
 297 //This should be in this file with an extern reference in the header file so that
 298 //DAC.CPP can see it... !!! FIX !!!
 299         extern uint16_t serialMode;                                             // From DAC.CPP
 300
 301         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 302         {
 303                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);         // This does the 'IRQ enabled' checking...
 304                 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
 305                 SetCallbackTime(JERRYI2SCallback, usecs, EVENT_JERRY);
 306         }
 307         else                                                                                    // JERRY is slave to external word clock
 308         {
 309 //Note that 44100 Hz requires samples every 22.675737 usec.
 310 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
 311 //sample rate or at a 88.2K sample rate (11.332... usec).
 312 /*              // This is just a temporary kludge to see if the CD bus mastering works
 313                 // I.e., this is totally faked...!
 314 // The whole interrupt system is pretty much borked and is need of an overhaul.
 315 // What we need is a way of handling these interrupts when they happen instead of
 316 // scanline boundaries the way it is now.
 317                 jerry_i2s_interrupt_timer -= cycles;
 318                 if (jerry_i2s_interrupt_timer <= 0)
 319                 {
 320 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 321                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 322                         {
 323 //      return GetWordFromButchSSI(offset, who);
 324                                 SetSSIWordsXmittedFromButch();
 325                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 326                         }
 327                         jerry_i2s_interrupt_timer += 602;
 328                 }*/
 329
 330                 if (ButchIsReadyToSend())//Not sure this is right spot to check...
 331                 {
 332 //      return GetWordFromButchSSI(offset, who);
 333                         SetSSIWordsXmittedFromButch();
 334                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 335                 }
 336
 337                 SetCallbackTime(JERRYI2SCallback, 22.675737, EVENT_JERRY);
 338         }
 339 }
 340
 341
 342 void JERRYInit(void)
 343 {
 344         JoystickInit();
 345         memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
 346
 347         JERRYPIT1Prescaler = 0xFFFF;
 348         JERRYPIT2Prescaler = 0xFFFF;
 349         JERRYPIT1Divider = 0xFFFF;
 350         JERRYPIT2Divider = 0xFFFF;
 351         jerryInterruptMask = 0x0000;
 352         jerryPendingInterrupt = 0x0000;
 353
 354         DACInit();
 355 }
 356
 357
 358 void JERRYReset(void)
 359 {
 360         JoystickReset();
 361         EepromReset();
 362         JERRYResetI2S();
 363
 364         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 365         JERRYPIT1Prescaler = 0xFFFF;
 366         JERRYPIT2Prescaler = 0xFFFF;
 367         JERRYPIT1Divider = 0xFFFF;
 368         JERRYPIT2Divider = 0xFFFF;
 369         jerry_timer_1_counter = 0;
 370         jerry_timer_2_counter = 0;
 371         jerryInterruptMask = 0x0000;
 372         jerryPendingInterrupt = 0x0000;
 373
 374         DACReset();
 375 }
 376
 377
 378 void JERRYDone(void)
 379 {
 380         WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
 381         JoystickDone();
 382         DACDone();
 383         EepromDone();
 384 }
 385
 386
 387 bool JERRYIRQEnabled(int irq)
 388 {
 389         // Read the word @ $F10020
 390 //      return jerry_ram_8[0x21] & (1 << irq);
 391         return jerryInterruptMask & irq;
 392 }
 393
 394
 395 void JERRYSetPendingIRQ(int irq)
 396 {
 397         // This is the shadow of INT (it's a split RO/WO register)
 398 //      jerryIntPending |= (1 << irq);
 399         jerryPendingInterrupt |= irq;
 400 }
 401
 402
 403 //
 404 // JERRY byte access (read)
 405 //
 406 uint8_t JERRYReadByte(uint32_t offset, uint32_t who/*=UNKNOWN*/)
 407 {
 408 #ifdef JERRY_DEBUG
 409         WriteLog("JERRY: Reading byte at %06X\n", offset);
 410 #endif
 411         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 412                 return DSPReadByte(offset, who);
 413         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 414                 return DSPReadByte(offset, who);
 415         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 416         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 417                 return DACReadByte(offset, who);
 418 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 419 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 420 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 421 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 422 //This is WRONG!
 423 //      else if (offset >= 0xF10000 && offset <= 0xF10007)
 424 //This is still wrong. What needs to be returned here are the values being counted down
 425 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 426
 427 //This is probably the problem with the new timer code... This is invalid
 428 //under the new system... !!! FIX !!!
 429         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 430         {
 431 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
 432         }
 433 //      else if (offset >= 0xF10010 && offset <= 0xF10015)
 434 //              return clock_byte_read(offset);
 435 //      else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 436 //              return anajoy_byte_read(offset);
 437         else if (offset >= 0xF14000 && offset <= 0xF14003)
 438                 return JoystickReadByte(offset) | EepromReadByte(offset);
 439         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 440                 return EepromReadByte(offset);
 441
 442         return jerry_ram_8[offset & 0xFFFF];
 443 }
 444
 445
 446 //
 447 // JERRY word access (read)
 448 //
 449 uint16_t JERRYReadWord(uint32_t offset, uint32_t who/*=UNKNOWN*/)
 450 {
 451 #ifdef JERRY_DEBUG
 452         WriteLog("JERRY: Reading word at %06X\n", offset);
 453 #endif
 454
 455         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 456                 return DSPReadWord(offset, who);
 457         else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
 458                 return DSPReadWord(offset, who);
 459         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 460         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 461                 return DACReadWord(offset, who);
 462 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 463 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 464 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 465 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 466 //This is WRONG!
 467 //      else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 468 //This is still wrong. What needs to be returned here are the values being counted down
 469 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 470         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 471         {
 472 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
 473         }
 474 //      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 475 //              return clock_word_read(offset);
 476         else if (offset == 0xF10020)
 477 //              return jerryIntPending;
 478                 return jerryPendingInterrupt;
 479 //      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 480 //              return anajoy_word_read(offset);
 481         else if (offset == 0xF14000)
 482                 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
 483         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 484                 return JoystickReadWord(offset);
 485         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 486                 return EepromReadWord(offset);
 487
 488 /*if (offset >= 0xF1D000)
 489         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16_t)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 490
 491         offset &= 0xFFFF;                               // Prevent crashing...!
 492         return ((uint16_t)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 493 }
 494
 495
 496 //
 497 // JERRY byte access (write)
 498 //
 499 void JERRYWriteByte(uint32_t offset, uint8_t data, uint32_t who/*=UNKNOWN*/)
 500 {
 501 #ifdef JERRY_DEBUG
 502         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 503 #endif
 504         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 505         {
 506                 DSPWriteByte(offset, data, who);
 507                 return;
 508         }
 509         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 510         {
 511                 DSPWriteByte(offset, data, who);
 512                 return;
 513         }
 514         // SCLK ($F1A150--8 bits wide)
 515 //NOTE: This should be taken care of in DAC...
 516         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 517         {
 518 //              WriteLog("JERRY: Writing %02X to SCLK...\n", data);
 519                 if ((offset & 0x03) == 2)
 520                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32_t)data << 8);
 521                 else
 522                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32_t)data;
 523
 524                 JERRYI2SInterruptTimer = -1;
 525                 RemoveCallback(JERRYI2SCallback);
 526                 JERRYI2SCallback();
 527 //              return;
 528         }
 529         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 530         else if (offset >= 0xF1A148 && offset <= 0xF1A157)
 531         {
 532                 DACWriteByte(offset, data, who);
 533                 return;
 534         }
 535         else if (offset >= 0xF10000 && offset <= 0xF10007)
 536         {
 537 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
 538                 return;
 539         }
 540 /*      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 541         {
 542                 clock_byte_write(offset, data);
 543                 return;
 544         }//*/
 545         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 546         else if (offset >= 0xF10020 && offset <= 0xF10021)//WAS:23)
 547         {
 548                 if (offset == 0xF10020)
 549                 {
 550                         // Clear pending interrupts...
 551                         jerryPendingInterrupt &= ~data;
 552                 }
 553                 else if (offset == 0xF10021)
 554                         jerryInterruptMask = data;
 555 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
 556 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
 557         }
 558 /*      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 559         {
 560                 anajoy_byte_write(offset, data);
 561                 return;
 562         }*/
 563         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 564         {
 565                 JoystickWriteByte(offset, data);
 566                 EepromWriteByte(offset, data);
 567                 return;
 568         }
 569         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 570         {
 571                 EepromWriteByte(offset, data);
 572                 return;
 573         }
 574
 575 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 576         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 577                 return;
 578
 579         jerry_ram_8[offset & 0xFFFF] = data;
 580 }
 581
 582
 583 //
 584 // JERRY word access (write)
 585 //
 586 void JERRYWriteWord(uint32_t offset, uint16_t data, uint32_t who/*=UNKNOWN*/)
 587 {
 588 #ifdef JERRY_DEBUG
 589         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 590 #endif
 591 #if 1
 592 if (offset == 0xF10000)
 593         WriteLog("JERRY: JPIT1 word written by %s: %u\n", whoName[who], data);
 594 else if (offset == 0xF10002)
 595         WriteLog("JERRY: JPIT2 word written by %s: %u\n", whoName[who], data);
 596 else if (offset == 0xF10004)
 597         WriteLog("JERRY: JPIT3 word written by %s: %u\n", whoName[who], data);
 598 else if (offset == 0xF10006)
 599         WriteLog("JERRY: JPIT4 word written by %s: %u\n", whoName[who], data);
 600 else if (offset == 0xF10010)
 601         WriteLog("JERRY: CLK1 word written by %s: %u\n", whoName[who], data);
 602 else if (offset == 0xF10012)
 603         WriteLog("JERRY: CLK2 word written by %s: %u\n", whoName[who], data);
 604 else if (offset == 0xF10014)
 605         WriteLog("JERRY: CLK3 word written by %s: %u\n", whoName[who], data);
 606 //else if (offset == 0xF1A100)
 607 //      WriteLog("JERRY: D_FLAGS word written by %s: %u\n", whoName[who], data);
 608 //else if (offset == 0xF1A102)
 609 //      WriteLog("JERRY: D_FLAGS+2 word written by %s: %u\n", whoName[who], data);
 610 else if (offset == 0xF10020)
 611         WriteLog("JERRY: JINTCTRL word written by %s: $%04X (%s%s%s%s%s%s)\n", whoName[who], data,
 612                 (data & 0x01 ? "Extrnl " : ""), (data & 0x02 ? "DSP " : ""),
 613                 (data & 0x04 ? "Timer0 " : ""), (data & 0x08 ? "Timer1 " : ""),
 614                 (data & 0x10 ? "ASI " : ""), (data & 0x20 ? "I2S " : ""));
 615 #endif
 616
 617         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 618         {
 619                 DSPWriteWord(offset, data, who);
 620                 return;
 621         }
 622         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 623         {
 624                 DSPWriteWord(offset, data, who);
 625                 return;
 626         }
 627 //NOTE: This should be taken care of in DAC...
 628         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
 629         {
 630                 WriteLog("JERRY: Writing $%X to SCLK (by %s)...\n", data, whoName[who]);
 631 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
 632                 JERRYI2SInterruptDivide = (uint8_t)data;
 633                 JERRYI2SInterruptTimer = -1;
 634                 RemoveCallback(JERRYI2SCallback);
 635                 JERRYI2SCallback();
 636
 637                 DACWriteWord(offset, data, who);
 638                 return;
 639         }
 640         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 641         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
 642         {
 643                 DACWriteWord(offset, data, who);
 644                 return;
 645         }
 646         else if (offset >= 0xF10000 && offset <= 0xF10007)
 647         {
 648                 switch(offset & 0x07)
 649                 {
 650                 case 0:
 651                         JERRYPIT1Prescaler = data;
 652                         JERRYResetPIT1();
 653                         break;
 654                 case 2:
 655                         JERRYPIT1Divider = data;
 656                         JERRYResetPIT1();
 657                         break;
 658                 case 4:
 659                         JERRYPIT2Prescaler = data;
 660                         JERRYResetPIT2();
 661                         break;
 662                 case 6:
 663                         JERRYPIT2Divider = data;
 664                         JERRYResetPIT2();
 665                 }
 666                 // Need to handle (unaligned) cases???
 667
 668                 return;
 669         }
 670 /*      else if (offset >= 0xF10010 && offset < 0xF10016)
 671         {
 672                 clock_word_write(offset, data);
 673                 return;
 674         }//*/
 675         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 676         else if (offset >= 0xF10020 && offset <= 0xF10022)
 677         {
 678                 jerryInterruptMask = data & 0xFF;
 679                 jerryPendingInterrupt &= ~(data >> 8);
 680 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
 681 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
 682                 return;
 683         }
 684 /*      else if (offset >= 0xF17C00 && offset < 0xF17C02)
 685         {
 686 //I think this was removed from the Jaguar. If so, then we don't need this...!
 687                 anajoy_word_write(offset, data);
 688                 return;
 689         }*/
 690         else if (offset >= 0xF14000 && offset < 0xF14003)
 691         {
 692                 JoystickWriteWord(offset, data);
 693                 EepromWriteWord(offset, data);
 694                 return;
 695         }
 696         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 697         {
 698                 EepromWriteWord(offset, data);
 699                 return;
 700         }
 701
 702 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 703         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 704                 return;
 705
 706         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 707         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 708 }
 709
 710 int JERRYGetPIT1Frequency(void)
 711 {
 712         int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
 713         return systemClockFrequency / ((JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1));
 714 }
 715
 716 int JERRYGetPIT2Frequency(void)
 717 {
 718         int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
 719         return systemClockFrequency / ((JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1));
 720 }