- uint8 (* DFetch)(); // Decode Fetch() pointer...
- uint16 (* DFetchW)(); // Decode FetchW() pointer...
- DFetch = (looking_at_rom ? Fetch : FetchB);
- DFetchW = (looking_at_rom ? FetchW : FetchWB);
-
-/* extern*/ uint16 pcr, pcrB; // Pull in 'pcr' from '6809.cpp'
- uint16 pc_save = pcr, pcB_save = pcrB;
- pcr = dpc; pcrB = dpc;
- uint8 opcode = DFetch(); // Get the opcode ('fetch' cycle)
- uint8 opcode2, operand;
- uint16 loperand;
- uint8 admode = op_mat1[opcode]; // addressing mode
- char outbuf[80], mnem[6], tmp[30];
-
- strcpy(mnem, mnemonics[opcode]); // Copy page 1 opcode
- if (opcode == 0x10) // Extended opcode?
- {
- opcode2 = DFetch(); // Then get next byte
- admode = op_mat2[opcode2]; // And use it as index into 'op_mat2'
- strcpy(mnem, mnemonics2[opcode2]); // Overwrite mnemonic
- }
- if (opcode == 0x11) // Same as above...
- {
- opcode2 = DFetch();
- admode = op_mat3[opcode2];
- strcpy(mnem, mnemonics3[opcode2]); // Overwrite mnemonic
- }
- switch(admode) // Decode it...
- {
- case 0: // Illegal
- { sprintf(outbuf, "???"); break; }
- case 1: // Zero page
- { operand = DFetch(); // Get ZP address
- sprintf(outbuf, "%s $%02X", mnem, operand);
- break; }
- case 2: // Absolute
- { loperand = DFetchW(); // Get ABS address
- sprintf(outbuf, "%s $%04X", mnem, loperand);
- break; }
- case 3: // Relative
- { operand = DFetch(); // Get offset
- uint16 tmpc = (looking_at_rom ? pcr : pcrB);
- sprintf(outbuf, "%s $%04X", mnem, tmpc+(int16)(int8)operand);
- break; }
- case 4: // Long Relative
- { loperand = DFetchW(); // Get long offset
- uint16 tmpc = (looking_at_rom ? pcr : pcrB);
- sprintf(outbuf, "%s $%04X", mnem, tmpc+(int16)loperand);
- break; }
- case 5: // Inherent
- { sprintf(outbuf, "%s ", mnem);
- break; }
- case 6: // Txfr/exchg/push/pull
- { operand = DFetch(); // Get txfr/exg/push/pull byte
- if ((opcode == 0x1E) || (opcode == 0x1F)) // Is it TXF/EXG?
- {
- sprintf(tmp, "%s,%s", tregs[operand>>4], tregs[operand&0x0F]);
- }
- else
- {
- tmp[0] = 0;
- if (operand&0x01) strcat(tmp, "CC ");
- if (operand&0x02) strcat(tmp, "A ");
- if (operand&0x04) strcat(tmp, "B ");
- if (operand&0x08) strcat(tmp, "DP ");
- if (operand&0x10) strcat(tmp, "X ");
- if (operand&0x20) strcat(tmp, "Y ");
- if (operand&0x40) (((opcode==0x34)||(opcode==0x35))
- ? strcat(tmp, "U ") : strcat(tmp, "S "));
- if (operand&0x80) strcat(tmp, "PC");
- }
- sprintf(outbuf, "%s %s", mnem, tmp);
- break; }
- case 7: // Indexed (the tough one!)
- { operand = DFetch(); // Get IDX byte
- uint8 reg = ((operand & 0x60) >> 5), idxind = ((operand & 0x10) >> 4),
- lo_nyb = (operand & 0x0F), boff;
- uint16 woff;
-
- strcpy(tmp, "??");
- if (!(operand & 0x80)) // Hi bit set? Then decode 4 bit offset
- {
- sprintf(tmp, "(%d),%s", (idxind ? -(16-lo_nyb) : lo_nyb),
- iregs[reg]);
- }
- else // Add the ($nnnn,R) code dude...
- {
- if (idxind)
- {
- switch(lo_nyb)
- {
- case 1: sprintf(tmp, "(,%s++)", iregs[reg]); break;
- case 3: sprintf(tmp, "(,--%s)", iregs[reg]); break;
- case 4: sprintf(tmp, "(,%s)", iregs[reg]); break;
- case 5: sprintf(tmp, "(B,%s)", iregs[reg]); break;
- case 6: sprintf(tmp, "(A,%s)", iregs[reg]); break;
- case 8:
- { boff = DFetch(); sprintf(tmp, "($%02X,%s)", boff,
- iregs[reg]); break; }
- case 9:
- { woff = DFetchW(); sprintf(tmp, "($%04X,%s)", woff,
- iregs[reg]); break; }
- case 11: sprintf(tmp, "(D,%s)", iregs[reg]); break;
- case 12:
- { boff = DFetch(); sprintf(tmp, "($%02X,PC)", boff); break; }
- case 13:
- { woff = DFetchW(); sprintf(tmp, "($%04X,PC)", woff); break; }
- case 15:
- { woff = DFetchW(); sprintf(tmp, "[$%04X]", woff); break; }
- default: strcpy(tmp, "??");
- }
- }
- else
- {
- switch(lo_nyb)
- {
- case 0: sprintf(tmp, ",%s+", iregs[reg]); break;
- case 1: sprintf(tmp, ",%s++", iregs[reg]); break;
- case 2: sprintf(tmp, ",-%s", iregs[reg]); break;
- case 3: sprintf(tmp, ",--%s", iregs[reg]); break;
- case 4: sprintf(tmp, ",%s", iregs[reg]); break;
- case 5: sprintf(tmp, "(B),%s", iregs[reg]); break;
- case 6: sprintf(tmp, "(A),%s", iregs[reg]); break;
- case 8:
- { boff = DFetch(); sprintf(tmp, "($%02X),%s", boff,
- iregs[reg]); break; }
- case 9:
- { woff = DFetchW(); sprintf(tmp, "($%04X),%s", woff,
- iregs[reg]); break; }
- case 11: sprintf(tmp, "(D),%s", iregs[reg]); break;
- case 12:
- { boff = DFetch(); sprintf(tmp, "($%02X),PC", boff); break; }
- case 13:
- { woff = DFetchW(); sprintf(tmp, "($%04X),PC", woff); break; }
- default: strcpy(tmp, "??");
- }
- }
- }
- sprintf(outbuf, "%s %s", mnem, tmp);
- break; }
- case 8: // Immediate
- { operand = DFetch(); // Get IMM byte
- sprintf(outbuf, "%s #$%02X", mnem, operand);
- break; }
- case 9: // Long Immediate
- { loperand = DFetchW(); // Get IMM word
- sprintf(outbuf, "%s #$%04X", mnem, loperand);
- break; }
- }
- DisplayBytes(dpc, (looking_at_rom ? pcr : pcrB)); // Show bytes
- WriteLog(outbuf); WriteLog("\n"); // display opcode & addressing, etc
- dpc = (looking_at_rom ? pcr : pcrB); // Advance debug PC
- pcr = pc_save; pcrB = pcB_save; // Restore PCs
+ uint8_t (* DFetch)(); // Decode Fetch() pointer...
+ uint16_t (* DFetchW)(); // Decode FetchW() pointer...
+ DFetch = (looking_at_rom ? Fetch : FetchB);
+ DFetchW = (looking_at_rom ? FetchW : FetchWB);
+
+ /* extern*/ uint16_t pcr, pcrB; // Pull in 'pcr' from '6809.cpp'
+ uint16_t pc_save = pcr, pcB_save = pcrB;
+ pcr = dpc; pcrB = dpc;
+ uint8_t opcode = DFetch(); // Get the opcode ('fetch' cycle)
+ uint8_t opcode2, operand;
+ uint16_t loperand;
+ uint8_t admode = op_mat1[opcode]; // addressing mode
+ char outbuf[80], mnem[6], tmp[30];
+
+ strcpy(mnem, mnemonics[opcode]); // Copy page 1 opcode
+
+ if (opcode == 0x10) // Extended opcode?
+ {
+ opcode2 = DFetch(); // Then get next byte
+ admode = op_mat2[opcode2]; // And use it as index into 'op_mat2'
+ strcpy(mnem, mnemonics2[opcode2]); // Overwrite mnemonic
+ }
+
+ if (opcode == 0x11) // Same as above...
+ {
+ opcode2 = DFetch();
+ admode = op_mat3[opcode2];
+ strcpy(mnem, mnemonics3[opcode2]); // Overwrite mnemonic
+ }
+
+ // Decode it...
+ switch (admode)
+ {
+ case 0: // Illegal
+ sprintf(outbuf, "???");
+ break;
+ case 1: // Zero page
+ operand = DFetch(); // Get ZP address
+ sprintf(outbuf, "%s $%02X", mnem, operand);
+ break;
+ case 2: // Absolute
+ loperand = DFetchW(); // Get ABS address
+ sprintf(outbuf, "%s $%04X", mnem, loperand);
+ break;
+ case 3: // Relative
+ {
+ operand = DFetch(); // Get offset
+ uint16_t tmpc = (looking_at_rom ? pcr : pcrB);
+ sprintf(outbuf, "%s $%04X", mnem, tmpc+(int16_t)(int8_t)operand);
+ break;
+ }
+ case 4: // Long Relative
+ {
+ loperand = DFetchW(); // Get long offset
+ uint16_t tmpc = (looking_at_rom ? pcr : pcrB);
+ sprintf(outbuf, "%s $%04X", mnem, tmpc+(int16_t)loperand);
+ break;
+ }
+ case 5: // Inherent
+ sprintf(outbuf, "%s ", mnem);
+ break;
+ case 6: // Txfr/exchg/push/pull
+ {
+ operand = DFetch(); // Get txfr/exg/push/pull byte
+
+ if ((opcode == 0x1E) || (opcode == 0x1F)) // Is it TXF/EXG?
+ {
+ sprintf(tmp, "%s,%s", tregs[operand>>4], tregs[operand&0x0F]);
+ }
+ else
+ {
+ tmp[0] = 0;
+ if (operand&0x01) strcat(tmp, "CC ");
+ if (operand&0x02) strcat(tmp, "A ");
+ if (operand&0x04) strcat(tmp, "B ");
+ if (operand&0x08) strcat(tmp, "DP ");
+ if (operand&0x10) strcat(tmp, "X ");
+ if (operand&0x20) strcat(tmp, "Y ");
+ if (operand&0x40) (((opcode==0x34)||(opcode==0x35))
+ ? strcat(tmp, "U ") : strcat(tmp, "S "));
+ if (operand&0x80) strcat(tmp, "PC");
+ }
+ sprintf(outbuf, "%s %s", mnem, tmp);
+ break;
+ }
+ case 7: // Indexed (the tough one!)
+ {
+ operand = DFetch(); // Get IDX byte
+ uint8_t reg = ((operand & 0x60) >> 5), idxind = ((operand & 0x10) >> 4),
+ lo_nyb = (operand & 0x0F), boff;
+ uint16_t woff;
+
+ strcpy(tmp, "??");
+
+ if (!(operand & 0x80)) // Hi bit set? Then decode 4 bit offset
+ {
+ sprintf(tmp, "(%d),%s", (idxind ? -(16-lo_nyb) : lo_nyb),
+ iregs[reg]);
+ }
+ else // Add the ($nnnn,R) code dude...
+ {
+ if (idxind)
+ {
+ switch (lo_nyb)
+ {
+ case 1: sprintf(tmp, "(,%s++)", iregs[reg]); break;
+ case 3: sprintf(tmp, "(,--%s)", iregs[reg]); break;
+ case 4: sprintf(tmp, "(,%s)", iregs[reg]); break;
+ case 5: sprintf(tmp, "(B,%s)", iregs[reg]); break;
+ case 6: sprintf(tmp, "(A,%s)", iregs[reg]); break;
+ case 8:
+ { boff = DFetch(); sprintf(tmp, "($%02X,%s)", boff,
+ iregs[reg]); break; }
+ case 9:
+ { woff = DFetchW(); sprintf(tmp, "($%04X,%s)", woff,
+ iregs[reg]); break; }
+ case 11: sprintf(tmp, "(D,%s)", iregs[reg]); break;
+ case 12:
+ { boff = DFetch(); sprintf(tmp, "($%02X,PC)", boff); break; }
+ case 13:
+ { woff = DFetchW(); sprintf(tmp, "($%04X,PC)", woff); break; }
+ case 15:
+ { woff = DFetchW(); sprintf(tmp, "[$%04X]", woff); break; }
+ default: strcpy(tmp, "??");
+ }
+ }
+ else
+ {
+ switch (lo_nyb)
+ {
+ case 0: sprintf(tmp, ",%s+", iregs[reg]); break;
+ case 1: sprintf(tmp, ",%s++", iregs[reg]); break;
+ case 2: sprintf(tmp, ",-%s", iregs[reg]); break;
+ case 3: sprintf(tmp, ",--%s", iregs[reg]); break;
+ case 4: sprintf(tmp, ",%s", iregs[reg]); break;
+ case 5: sprintf(tmp, "(B),%s", iregs[reg]); break;
+ case 6: sprintf(tmp, "(A),%s", iregs[reg]); break;
+ case 8:
+ { boff = DFetch(); sprintf(tmp, "($%02X),%s", boff,
+ iregs[reg]); break; }
+ case 9:
+ { woff = DFetchW(); sprintf(tmp, "($%04X),%s", woff,
+ iregs[reg]); break; }
+ case 11: sprintf(tmp, "(D),%s", iregs[reg]); break;
+ case 12:
+ { boff = DFetch(); sprintf(tmp, "($%02X),PC", boff); break; }
+ case 13:
+ { woff = DFetchW(); sprintf(tmp, "($%04X),PC", woff); break; }
+ default: strcpy(tmp, "??");
+ }
+ }
+ }
+
+ sprintf(outbuf, "%s %s", mnem, tmp);
+ break;
+ }
+ case 8: // Immediate
+ operand = DFetch(); // Get IMM byte
+ sprintf(outbuf, "%s #$%02X", mnem, operand);
+ break;
+ case 9: // Long Immediate
+ loperand = DFetchW(); // Get IMM word
+ sprintf(outbuf, "%s #$%04X", mnem, loperand);
+ break;
+ }
+
+ DisplayBytes(dpc, (looking_at_rom ? pcr : pcrB)); // Show bytes
+ WriteLog(outbuf);
+ WriteLog("\n"); // display opcode & addressing, etc
+ dpc = (looking_at_rom ? pcr : pcrB); // Advance debug PC
+ pcr = pc_save;
+ pcrB = pcB_save; // Restore PCs