// Reject invalud ea modes
amsk = amsktab[am0];
- if (amsk & (M_AIND | M_APOSTINC | M_APREDEC | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPOST | M_MEMPRE) == 0)
+ if ((amsk & (M_AIND | M_APOSTINC | M_APREDEC | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPOST | M_MEMPRE)) == 0)
return error("unsupported addressing mode");
inst |= am0 | a0reg;
int m_cas2(WORD inst, WORD siz)
{
WORD inst2, inst3;
- LONG amsk;
if ((activecpu & (CPU_68020 | CPU_68030 | CPU_68040)) == 0)
return error(unsupport);
{
inst |= (1 << 6);
D_word(inst);
- WARNING(check what s "optional coprocessor-defined extension words!")
D_long(v);
return OK;
}
return error(range_error);
D_word(inst);
- WARNING(check what s "optional coprocessor-defined extension words!")
D_word(v);
}
inst |= am1 | a1reg; // Get ea1 into instr
D_word(inst); // Deposit instr
+ // Extension word
+ inst = a1reg + (a2reg << 12) + (1 << 11);
+ inst |= mulmode; // add size bit
+ D_word(inst);
+
// Generate ea0 if requested
if (flg & 2)
ea0gen(siz);
// Use am0
inst |= am0 | a0reg; // Get ea0 into instr
D_word(inst); // Deposit instr
+ // Extension word
+ inst = a1reg + (a2reg << 12) + (1 << 11);
+ inst |= mulmode; // add size bit
+ D_word(inst);
+
ea0gen(siz); // Generate ea0
// Generate ea1 if requested
ea1gen(siz);
}
- inst = a1reg + (a2reg << 12) + (1 << 11);
- inst |= mulmode; // add size bit
- D_word(inst);
+ //D_word(inst);
+ //ea0gen(siz);
return OK;
}
}
D_word(B16(10100000, 00000000));
+ return OK;
}
// EA to register
if ((am0 == FREG) && (am1 < AM_USP))
{
+ //fpx->ea
// EA
inst |= am1 | a1reg;
D_word(inst);
}
else if ((am0 < AM_USP) && (am1 == FREG))
{
+ //ea->fpx
+
// EA
inst |= am0 | a0reg;
D_word(inst);
}
else if ((am0 == FREG) && (am1 == FREG))
{
+ // register-to-register
+ // Essentially ea to register with R/0=0
+
// EA
D_word(inst);
WORD regmask;
WORD datareg;
- if (siz == SIZX)
+ if (siz == SIZX || siz==SIZN)
{
if ((*tok >= KW_FP0) && (*tok <= KW_FP7))
{
- // fmovem.x <rlist>,ea
+ //fmovem.x <rlist>,ea
if (fpu_reglist_left(®mask) < 0)
return OK;
}
}
}
- else if ((siz == SIZL) || (siz==SIZN))
+ else if (siz == SIZL)
{
if ((*tok == KW_FPCR) || (*tok == KW_FPSR) || (*tok == KW_FPIAR))
{