//
// RMAC - Reboot's Macro Assembler for all Atari computers
// MACH.C - Code Generation
-// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2020 Reboot and Friends
// RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
// Source utilised with the kind permission of Landon Dyer
//
int m_chk2(WORD inst, WORD siz);
int m_cmp2(WORD inst, WORD siz);
int m_bkpt(WORD inst, WORD siz);
-int m_cpbr(WORD inst, WORD siz);
+int m_cpbcc(WORD inst, WORD siz);
int m_cpdbr(WORD inst, WORD siz);
int m_muls(WORD inst, WORD siz);
int m_move16a(WORD inst, WORD siz);
int m_pload(WORD inst, WORD siz, WORD extension);
int m_pmove(WORD inst, WORD siz);
int m_pmovefd(WORD inst, WORD siz);
-int m_ptest(WORD inst, WORD siz);
+int m_ptest(WORD inst, WORD siz, WORD extension);
+int m_ptestr(WORD inste, WORD siz);
+int m_ptestw(WORD inste, WORD siz);
int m_ptrapcc(WORD inst, WORD siz);
int m_ploadr(WORD inst, WORD siz);
int m_ploadw(WORD inst, WORD siz);
// FPU
int m_fabs(WORD inst, WORD siz);
+int m_fbcc(WORD inst, WORD siz);
int m_facos(WORD inst, WORD siz);
int m_fadd(WORD inst, WORD siz);
int m_fasin(WORD inst, WORD siz);
//D_word((inst | am0 | a0reg | am1 | a1reg));
if (inst == B16(11101111, 11000000))
+ {
// bfins special case
D_word((inst | am1 | a1reg));
+ }
else
+ {
D_word((inst | am0 | a0reg));
+ }
ea0gen(siz); // Generate EA
//
-// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc))
-// TODO: Better checks for different instructions?
+// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc)), pbcc (68851)
//
-int m_cpbr(WORD inst, WORD siz)
+int m_fpbr(WORD inst, WORD siz)
{
- if ((activecpu & (CPU_68020 | CPU_68030)) && (!activefpu == 0))
- return error(unsupport);
if (a0exattr & DEFINED)
{
}
+//
+// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc))
+//
+int m_cpbcc(WORD inst, WORD siz)
+{
+ if (!(activecpu & (CPU_68020 | CPU_68030)))
+ return error(unsupport);
+
+ return m_fpbr(inst, siz);
+}
+
+
+//
+// fbcc(6808X, 68040, 68060)
+//
+int m_fbcc(WORD inst, WORD siz)
+{
+ CHECKNOFPU;
+ return m_fpbr(inst, siz);
+}
+
+
+//
+// pbcc(68851 but let's assume 68020 only)
+//
+int m_pbcc(WORD inst, WORD siz)
+{
+ CHECKNO20;
+ return m_fpbr(inst, siz);
+}
+
+
//
// cpdbcc(68020, 68030)
//
if (flg & 16)
{
- // OR-in register number
+ // OR-in register number
if (flg & 8)
inst |= reg_9[a1reg]; // ea1reg in bits 9..11
else
D_word(inst);
- // Generate ea0 if requested
+ // Generate ea0 if requested
if (flg & 2)
ea0gen(siz);
}
-//
-// PBcc (MC68851)
-//
-int m_pbcc(WORD inst, WORD siz)
-{
- CHECKNO20;
- return error("Not implemented yet.");
-}
-
-
//
// pflusha (68030, 68040)
//
if ((a0exattr & DEFINED) == 0)
return error("constant value must be defined");
+ if (a0exval>7)
+ return error("constant value must be between 0 and 7");
+
inst = (2 << 3) | (uint16_t)a0exval;
break;
}
//
-// ptestr, ptestw (68030)
+// ptestr, ptestw (68030, 68040)
+// TODO See comment on m_pmove about 68851 support
+// TODO quite a good chunk of the 030 code is copied from m_pload, perhaps merge these somehow?
//
-int m_ptest(WORD inst, WORD siz)
+int m_ptest(WORD inst, WORD siz, WORD extension)
{
- CHECKNO30;
+ uint64_t eval;
+
+ if (activecpu != CPU_68030 && activecpu != CPU_68040)
+ return error(unsupport);
if (activecpu == CPU_68030)
- return error("Not implemented yet.");
- else if (activecpu == CPU_68040)
+ {
+ inst |= am1;
+ D_word(inst);
+
+ switch (am0)
+ {
+ case CREG:
+ if (a0reg == KW_SFC - KW_SFC)
+ extension |= 0;
+ else if (a0reg == KW_DFC - KW_SFC)
+ extension |= 1;
+ else
+ return error("illegal control register specified");
+ break;
+ case DREG:
+ extension |= (1 << 3) | a0reg;
+ break;
+ case IMMED:
+ if ((a0exattr & DEFINED) == 0)
+ return error("constant value must be defined");
+
+ if (a0exval > 7)
+ return error("constant value must be between 0 and 7");
+
+ extension |= (2 << 3) | (uint16_t)a0exval;
+ break;
+ }
+
+ // Operand 3 must be an immediate
+ CHECK_COMMA
+
+ if (*tok++ != '#')
+ return error("ptest level must be immediate");
+
+ // Let's be a bit inflexible here and demand that this
+ // is fully defined at this stage. Otherwise we'd have
+ // to arrange for a bitfield fixup, which would mean
+ // polluting the bitfields and codebase with special
+ // cases that might most likely never be used.
+ // So if anyone gets bit by this: sorry for being a butt!
+ if (abs_expr(&eval) != OK)
+ return OK; // We're returning OK because error() has already been called and error count has been increased
+
+ if (eval > 7)
+ return error("ptest level must be between 0 and 7");
+
+ extension |= eval << 10;
+
+ // Operand 4 is optional and must be an address register
+
+ if (*tok != EOL)
+ {
+ CHECK_COMMA
+
+ if ((*tok >= KW_A0) && (*tok <= KW_A7))
+ {
+ extension |= (1 << 8) | ((*tok++ & 7) << 4);
+ }
+ else
+ {
+ return error("fourth parameter must be an address register");
+ }
+ }
+
+ ErrorIfNotAtEOL();
+
+ D_word(extension);
+ return OK;
+ }
+ else
return error("Not implemented yet.");
return ERROR;
}
+int m_ptestr(WORD inst, WORD siz)
+{
+ return m_ptest(inst, siz, (1 << 15) | (0 << 9));
+}
+
+int m_ptestw(WORD inst, WORD siz)
+{
+ return m_ptest(inst, siz, (1 << 15) | (1 << 9));
+}
+
//////////////////////////////////////////////////////////////////////////////
//
// 68020/30/40/60 instructions
if (activefpu == FPU_68040)
warn("Instruction is emulated in 68040");
-
+
return gen_fpu(inst, siz, B8(00000011), FPU_NOWARN);
}
//
-// flognp1 (68040FPSP, 68060FPSP)
+// flognp1 (6888X, 68040FPSP, 68060FPSP)
//
int m_flognp1(WORD inst, WORD siz)
{
- if (activefpu & (FPU_68040 | FPU_68060))
- return gen_fpu(inst, siz, B8(00000110), FPU_FPSP);
-
- return error("Unsupported in current FPU");
+ CHECKNOFPU;
+ return gen_fpu(inst, siz, B8(00000110), FPU_FPSP);
}
if (!(activefpu & (FPU_68040 | FPU_68060)))
return error("Unsupported in current FPU");
- return error("Not implemented yet.");
-
-#if 0
- if (activefpu == FPU_68040)
- return gen_fpu(inst, siz, B8(01100100), FPU_P_EMUL);
- else
- return error("Unsupported in current FPU");
-#endif
+ return gen_fpu(inst, siz, B8(01100100), FPU_FPSP);
}
if (!(activefpu & (FPU_68040 | FPU_68060)))
return error("Unsupported in current FPU");
- return error("Not implemented yet.");
-
-#if 0
- if (activefpu == FPU_68040)
- return gen_fpu(inst, siz, B8(01100100), FPU_P_EMUL);
- else
- return error("Unsupported in current FPU");
-#endif
+ return gen_fpu(inst, siz, B8(01100100), FPU_FPSP);
}
{
if (activefpu & (FPU_68040 | FPU_68060))
return gen_fpu(inst, siz, B8(01100011), FPU_NOWARN);
-
+
return error("Unsupported in current FPU");
}
a1reg = a0reg;
return gen_fpu(inst, siz, B8(00011010), FPU_NOWARN);
}
-
+
return gen_fpu(inst, siz, B8(00011010), FPU_NOWARN);
}
a1reg = a0reg;
return gen_fpu(inst, siz, B8(01011010), FPU_NOWARN);
}
-
+
return gen_fpu(inst, siz, B8(01011010), FPU_NOWARN);
}
{
if (activefpu & (FPU_68040 | FPU_68060))
return gen_fpu(inst, siz, B8(01000001), FPU_NOWARN);
-
+
return error("Unsupported in current FPU");
}
CHECKNO60;
D_word(B16(00000001, 11000000));
- if (a0exattr&DEFINED)
+ if (a0exattr & DEFINED)
+ {
D_word(a0exval);
+ }
else
{
AddFixup(FU_WORD, sloc, a0expr);