2 // RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
3 // RISCA.C - GPU/DSP Assembler
4 // Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends
5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
6 // Source utilised with the kind permission of Landon Dyer
18 #define DEF_MR // Declare keyword values
19 #include "risckw.h" // Incl. generated risc keywords
21 #define DEF_KW // Declare keyword values
22 #include "kwtab.h" // Incl. generated keyword tables & defs
25 unsigned altbankok = 0; // Ok to use alternate register bank
26 unsigned orgactive = 0; // RISC org directive active
27 unsigned orgaddr = 0; // Org'd address
28 unsigned orgwarning = 0; // Has an ORG warning been issued
29 int lastOpcode = -1; // Last RISC opcode assembled
31 const char reg_err[] = "missing register R0...R31";
33 // Jaguar Jump Condition Names
34 const char condname[MAXINTERNCC][5] = {
35 "NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ",
36 "N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO",
40 // Jaguar Jump Condition Numbers
41 const char condnumber[] = {
42 1, 2, 4, 5, 6, 8, 9, 10, 20, 21, 22, 24, 25, 26,
43 0, 0, 1, 2, 4, 4, 5, 8, 8, 20, 24, 31
46 const struct opcoderecord roptbl[] = {
47 { MR_ADD, RI_TWO, 0 },
48 { MR_ADDC, RI_TWO, 1 },
49 { MR_ADDQ, RI_NUM_32, 2 },
50 { MR_ADDQT, RI_NUM_32, 3 },
51 { MR_SUB, RI_TWO, 4 },
52 { MR_SUBC, RI_TWO, 5 },
53 { MR_SUBQ, RI_NUM_32, 6 },
54 { MR_SUBQT, RI_NUM_32, 7 },
55 { MR_NEG, RI_ONE, 8 },
56 { MR_AND, RI_TWO, 9 },
57 { MR_OR, RI_TWO, 10 },
58 { MR_XOR, RI_TWO, 11 },
59 { MR_NOT, RI_ONE, 12 },
60 { MR_BTST, RI_NUM_31, 13 },
61 { MR_BSET, RI_NUM_31, 14 },
62 { MR_BCLR, RI_NUM_31, 15 },
63 { MR_MULT, RI_TWO, 16 },
64 { MR_IMULT, RI_TWO, 17 },
65 { MR_IMULTN, RI_TWO, 18 },
66 { MR_RESMAC, RI_ONE, 19 },
67 { MR_IMACN, RI_TWO, 20 },
68 { MR_DIV, RI_TWO, 21 },
69 { MR_ABS, RI_ONE, 22 },
70 { MR_SH, RI_TWO, 23 },
71 { MR_SHLQ, RI_NUM_32, 24 + SUB32 },
72 { MR_SHRQ, RI_NUM_32, 25 },
73 { MR_SHA, RI_TWO, 26 },
74 { MR_SHARQ, RI_NUM_32, 27 },
75 { MR_ROR, RI_TWO, 28 },
76 { MR_RORQ, RI_NUM_32, 29 },
77 { MR_ROLQ, RI_NUM_32, 29 + SUB32 },
78 { MR_CMP, RI_TWO, 30 },
79 { MR_CMPQ, RI_NUM_15, 31 },
80 { MR_SAT8, RI_ONE, 32 + GPUONLY },
81 { MR_SUBQMOD, RI_NUM_32, 32 + DSPONLY },
82 { MR_SAT16, RI_ONE, 33 + GPUONLY },
83 { MR_SAT16S, RI_ONE, 33 + DSPONLY },
84 { MR_MOVEQ, RI_NUM_31, 35 },
85 { MR_MOVETA, RI_TWO, 36 },
86 { MR_MOVEFA, RI_TWO, 37 },
87 { MR_MOVEI, RI_MOVEI, 38 },
88 { MR_LOADB, RI_LOADN, 39 },
89 { MR_LOADW, RI_LOADN, 40 },
90 { MR_LOADP, RI_LOADN, 42 + GPUONLY },
91 { MR_SAT32S, RI_ONE, 42 + DSPONLY },
92 { MR_STOREB, RI_STOREN, 45 },
93 { MR_STOREW, RI_STOREN, 46 },
94 { MR_STOREP, RI_STOREN, 48 + GPUONLY },
95 { MR_MIRROR, RI_ONE, 48 + DSPONLY },
96 { MR_JUMP, RI_JUMP, 52 },
98 { MR_MMULT, RI_TWO, 54 },
99 { MR_MTOI, RI_TWO, 55 },
100 { MR_NORMI, RI_TWO, 56 },
101 { MR_NOP, RI_NONE, 57 },
102 { MR_SAT24, RI_ONE, 62 },
103 { MR_UNPACK, RI_ONE, 63 + GPUONLY },
104 { MR_PACK, RI_ONE, 63 + GPUONLY },
105 { MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY },
106 { MR_MOVE, RI_MOVE, 0 },
107 { MR_LOAD, RI_LOAD, 0 },
108 { MR_STORE, RI_STORE, 0 }
113 // Convert a string to uppercase
115 void strtoupper(char * s)
123 // Function to return "malformed expression" error
124 // This is done mainly to remove a bunch of GOTO statements in the parser
126 static inline int MalformedOpcode(int signal)
129 sprintf(buf, "%02X", signal);
130 return errors("Malformed opcode [internal $%s]", buf);
135 // Build RISC instruction word
137 void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2)
139 // Check for absolute address setting
140 if (!orgwarning && !orgactive)
142 // warn("GPU/DSP code outside of absolute section");
143 warn("RISC code generated with no origin defined");
147 int value = ((opcode & 0x3F) << 10) + ((reg1 & 0x1F) << 5) + (reg2 & 0x1F);
153 // Get a RISC register
155 int GetRegister(WORD rattr)
157 VALUE eval; // Expression value
158 WORD eattr; // Expression attributes
159 SYM * esym; // External symbol involved in expr.
160 TOKEN r_expr[EXPRSIZE]; // Expression token list
162 // Evaluate what's in the global "tok" buffer
163 if (expr(r_expr, &eval, &eattr, &esym) != OK)
166 if ((challoc - ch_size) < 4)
169 if (!(eattr & DEFINED))
171 AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr);
175 // If we got a register in range (0-31), return it
176 if ((eval >= 0) && (eval <= 31))
179 // Otherwise, it's out of range & we flag an error
180 return error(reg_err);
185 // Do RISC code generation
187 int GenerateRISCCode(int state)
189 int reg1; // Register 1
190 int reg2; // Register 2
191 int val = 0; // Constructed value
198 int indexed; // Indexed register flag
200 VALUE eval; // Expression value
201 WORD eattr; // Expression attributes
202 SYM * esym; // External symbol involved in expr.
203 TOKEN r_expr[EXPRSIZE]; // Expression token list
205 // Get opcode parameter and type
206 unsigned short parm = (WORD)(roptbl[state - 3000].parm);
207 unsigned type = roptbl[state - 3000].typ;
209 // Detect whether the opcode parmeter passed determines that the opcode is
210 // specific to only one of the RISC processors and ensure it is legal in
211 // the current code section. If not then show error and return.
212 if (((parm & GPUONLY) && rdsp) || ((parm & DSPONLY) && rgpu))
213 return error("Opcode is not valid in this code section");
215 // Process RISC opcode
218 // No operand instructions
221 BuildRISCIntructionWord(parm, 0, 0);
224 // Single operand instructions (Rd)
225 // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S, UNPACK
227 reg2 = GetRegister(FU_REGTWO);
229 BuildRISCIntructionWord(parm, parm >> 6, reg2);
232 // Two operand instructions (Rs,Rd)
233 // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT, MMULT,
234 // MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
237 altbankok = 1; // MOVEFA
239 reg1 = GetRegister(FU_REGONE);
243 altbankok = 1; // MOVETA
245 reg2 = GetRegister(FU_REGTWO);
247 BuildRISCIntructionWord(parm, reg1, reg2);
250 // Numeric operand (n,Rd) where n = -16..+15
254 // Numeric operand (n,Rd) where n = 0..31
255 // BCLR, BSET, BTST, MOVEQ
258 // Numeric operand (n,Rd) where n = 1..32
259 // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ, RORQ
264 reg1 = -16; reg2 = 15; attrflg = FU_NUM15;
268 reg1 = 0; reg2 = 31; attrflg = FU_NUM31;
271 reg1 = 1; reg2 = 32; attrflg = FU_NUM32;
279 return MalformedOpcode(0x01);
283 if (expr(r_expr, &eval, &eattr, &esym) != OK)
284 return MalformedOpcode(0x02);
286 if ((challoc - ch_size) < 4)
289 if (!(eattr & DEFINED))
291 AddFixup((WORD)(FU_WORD | attrflg), sloc, r_expr);
296 if ((int)eval < reg1 || (int)eval > reg2)
297 return error("constant out of range");
301 else if (type == RI_NUM_32)
302 reg1 = (reg1 == 32 ? 0 : eval);
308 reg2 = GetRegister(FU_REGTWO);
310 BuildRISCIntructionWord(parm, reg1, reg2);
313 // Move Immediate--n,Rn--n in Second Word
316 return MalformedOpcode(0x03);
320 if (expr(r_expr, &eval, &eattr, &esym) != OK)
321 return MalformedOpcode(0x04);
323 if (lastOpcode == RI_JUMP || lastOpcode == RI_JR)
327 // User doesn't care, emit a NOP to fix
328 BuildRISCIntructionWord(57, 0, 0);
329 warn("MOVEI following JUMP, inserting NOP to fix your BROKEN CODE");
332 warn("MOVEI immediately follows JUMP");
335 if ((challoc - ch_size) < 4)
338 if (!(eattr & DEFINED))
340 AddFixup(FU_LONG | FU_MOVEI, sloc + 2, r_expr);
347 //printf("risca: Doing rmark for RI_MOVEI (tdb=$%X)...\n", eattr & TDB);
348 rmark(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
352 val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000);
354 reg2 = GetRegister(FU_REGTWO);
356 D_word((((parm & 0x3F) << 10) + reg2));
371 reg1 = GetRegister(FU_REGONE);
375 reg2 = GetRegister(FU_REGTWO);
377 BuildRISCIntructionWord(parm, reg1, reg2);
380 // (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59
386 return MalformedOpcode(0x05);
390 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
391 indexed = (*tok - KW_R0);
395 // sy = lookup((char *)tok[1], LABEL, 0);
396 sy = lookup(string[tok[1]], LABEL, 0);
404 if (sy->sattre & EQUATEDREG)
406 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
407 && (*(tok + 2) != ')'))
409 indexed = (sy->svalue & 0x1F);
417 reg1 = GetRegister(FU_REGONE);
427 parm = (WORD)(reg1 - 14 + 58);
430 if (*tok >= KW_R0 && *tok <= KW_R31)
435 // sy = lookup((char *)tok[1], LABEL, 0);
436 sy = lookup(string[tok[1]], LABEL, 0);
444 if (sy->sattre & EQUATEDREG)
450 reg1 = GetRegister(FU_REGONE);
454 if (expr(r_expr, &eval, &eattr, &esym) != OK)
455 return MalformedOpcode(0x06);
457 if ((challoc - ch_size) < 4)
460 if (!(eattr & DEFINED))
461 return error("constant expected after '+'");
467 reg1 = 14 + (parm - 58);
469 warn("NULL offset in LOAD ignored");
473 if (reg1 < 1 || reg1 > 32)
474 return error("constant in LOAD out of range");
479 parm = (WORD)(parm - 58 + 43);
485 reg1 = GetRegister(FU_REGONE);
490 return MalformedOpcode(0x07);
494 reg2 = GetRegister(FU_REGTWO);
496 BuildRISCIntructionWord(parm, reg1, reg2);
499 // Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61
502 reg1 = GetRegister(FU_REGONE);
506 return MalformedOpcode(0x08);
511 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
512 indexed = (*tok - KW_R0);
516 sy = lookup(string[tok[1]], LABEL, 0);
524 if (sy->sattre & EQUATEDREG)
526 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
527 && (*(tok + 2) != ')'))
529 indexed = (sy->svalue & 0x1F);
537 reg2 = GetRegister(FU_REGTWO);
547 parm = (WORD)(reg2 - 14 + 60);
550 if (*tok >= KW_R0 && *tok <= KW_R31)
555 sy = lookup(string[tok[1]], LABEL, 0);
563 if (sy->sattre & EQUATEDREG)
569 reg2 = GetRegister(FU_REGTWO);
573 if (expr(r_expr, &eval, &eattr, &esym) != OK)
574 return MalformedOpcode(0x09);
576 if ((challoc - ch_size) < 4)
579 if (!(eattr & DEFINED))
581 AddFixup(FU_WORD | FU_REGTWO, sloc, r_expr);
590 reg2 = 14 + (parm - 60);
592 warn("NULL offset in STORE ignored");
596 if (reg2 < 1 || reg2 > 32)
597 return error("constant in STORE out of range");
602 parm = (WORD)(parm - 60 + 49);
609 reg2 = GetRegister(FU_REGTWO);
614 return MalformedOpcode(0x0A);
618 BuildRISCIntructionWord(parm, reg2, reg1);
621 // LOADB/LOADP/LOADW (Rn),Rn
624 return MalformedOpcode(0x0B);
627 reg1 = GetRegister(FU_REGONE);
630 return MalformedOpcode(0x0C);
634 reg2 = GetRegister(FU_REGTWO);
636 BuildRISCIntructionWord(parm, reg1, reg2);
639 // STOREB/STOREP/STOREW Rn,(Rn)
641 reg1 = GetRegister(FU_REGONE);
645 return MalformedOpcode(0x0D);
648 reg2 = GetRegister(FU_REGTWO);
651 return MalformedOpcode(0x0E);
655 BuildRISCIntructionWord(parm, reg2, reg1);
658 // Jump Relative - cc,n - n=-16..+15 words, reg2=cc
661 // Jump Absolute - cc,(Rs) - reg2=cc
663 // Check to see if there is a comma in the token string. If not then
664 // the JR or JUMP should default to 0, Jump Always
667 for(t=tok; *t!=EOL; t++)
680 // CC using a constant number
686 else if (*tok == SYMBOL)
689 // strcpy(scratch, (char *)tok[1]);
690 strcpy(scratch, string[tok[1]]);
693 for(i=0; i<MAXINTERNCC; i++)
695 // Look for the condition code & break if found
696 if (strcmp(condname[i], scratch) == 0)
703 // Standard CC was not found, look for an equated one
706 // ccsym = lookup((char *)tok[1], LABEL, 0);
707 ccsym = lookup(string[tok[1]], LABEL, 0);
709 if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
714 return error("unknown condition code");
720 else if (*tok == '(')
722 // Set CC to "Jump Always"
728 // Set CC to "Jump Always"
732 if (val < 0 || val > 31)
733 return error("condition constant out of range");
735 // Store condition code
741 if (expr(r_expr, &eval, &eattr, &esym) != OK)
742 return MalformedOpcode(0x0F);
744 if ((challoc - ch_size) < 4)
747 if (!(eattr & DEFINED))
749 AddFixup(FU_WORD | FU_JR, sloc, r_expr);
754 reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
756 if ((reg2 < -16) || (reg2 > 15))
757 error("PC relative overflow");
760 BuildRISCIntructionWord(parm, reg2, reg1);
766 return MalformedOpcode(0x10);
769 reg2 = GetRegister(FU_REGTWO);
772 return MalformedOpcode(0x11);
776 BuildRISCIntructionWord(parm, reg2, reg1);
781 // Should never get here :-D
783 return error("Unknown RISC opcode type");