//
// JAGUAR.CPP
//
-// by cal2
+// by Cal2
// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
// Cleanups and endian wrongness amelioration by James L. Hammons
// Note: Endian wrongness probably stems from the MAME origins of this emu and
//
#include "jaguar.h"
+#include "video.h"
+#include "settings.h"
//#include "m68kdasmAG.h"
#define CPU_DEBUG
//Do this in makefile??? Yes! Could, but it's easier to define here...
-//#define LOG_UNMAPPED_MEMORY_ACCESSES
+#define LOG_UNMAPPED_MEMORY_ACCESSES
+#define CPU_DEBUG_MEMORY
// Private function prototypes
// External variables
-extern bool hardwareTypeNTSC; // Set to false for PAL
+//extern bool hardwareTypeNTSC; // Set to false for PAL
+#ifdef CPU_DEBUG_MEMORY
+extern bool startMemLog; // Set by "e" key
+extern int effect_start;
+extern int effect_start2, effect_start3, effect_start4, effect_start5, effect_start6;
+#endif
// Memory debugging identifiers
char * whoName[9] =
{ "Unknown", "Jaguar", "DSP", "GPU", "TOM", "JERRY", "M68K", "Blitter", "OP" };
-// These values are overridden by command line switches...
-
-bool dsp_enabled = false;
-bool jaguar_use_bios = true; // Default is now to USE the BIOS
uint32 jaguar_active_memory_dumps = 0;
uint32 jaguar_mainRom_crc32;
-static uint32 m68k_cycles_per_scanline;
-static uint32 gpu_cycles_per_scanline;
-static uint32 dsp_cycles_per_scanline;
-static uint32 jaguar_screen_scanlines;
-
/*static*/ uint8 * jaguar_mainRam = NULL;
/*static*/ uint8 * jaguar_bootRom = NULL;
/*static*/ uint8 * jaguar_mainRom = NULL;
+#ifdef CPU_DEBUG_MEMORY
+uint8 writeMemMax[0x400000], writeMemMin[0x400000];
+uint8 readMem[0x400000];
+uint32 returnAddr[4000], raPtr = 0xFFFFFFFF;
+#endif
+
+uint32 pcQueue[0x400];
+uint32 pcQPtr = 0;
//
// Callback function to detect illegal instructions
//
+//void GPUDumpDisassembly(void);
+//void GPUDumpRegisters(void);
void M68KInstructionHook(void)
{
uint32 m68kPC = m68k_get_reg(NULL, M68K_REG_PC);
+// For tracebacks...
+// Ideally, we'd save all the registers as well...
+ pcQueue[pcQPtr++] = m68kPC;
+ pcQPtr &= 0x3FF;
+
+ if (m68kPC & 0x01) // Oops! We're fetching an odd address!
+ {
+ WriteLog("M68K: Attempted to execute from an odd adress!\n\nBacktrace:\n\n");
+
+ static char buffer[2048];
+ for(int i=0; i<0x400; i++)
+ {
+ m68k_disassemble(buffer, pcQueue[(pcQPtr + i) & 0x3FF], M68K_CPU_TYPE_68000);
+ WriteLog("\t%08X: %s\n", pcQueue[(pcQPtr + i) & 0x3FF], buffer);
+ }
+ WriteLog("\n");
+
+ uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=0; i<10; i++)
+ WriteLog("%06X: %08X\n", topOfStack - (i * 4), JaguarReadLong(topOfStack - (i * 4)));
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((tom_irq_enabled(IRQ_VBLANK)) && (jaguar_interrupt_handler_is_valid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+ log_done();
+ exit(0);
+ }
+
+/* if (m68kPC >= 0x807EC4 && m68kPC <= 0x807EDB)
+ {
+ static char buffer[2048];
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s", m68kPC, buffer);
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
+ }//*/
+/* if (m68kPC == 0x8D0E48 && effect_start5)
+ {
+ WriteLog("\nM68K: At collision detection code. Exiting!\n\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+ log_done();
+ exit(0);
+ }//*/
+/* uint16 opcode = JaguarReadWord(m68kPC);
+ if (opcode == 0x4E75) // RTS
+ {
+ if (startMemLog)
+// WriteLog("Jaguar: Returning from subroutine to %08X\n", JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7)));
+ {
+ uint32 addr = JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7));
+ bool found = false;
+ if (raPtr != 0xFFFFFFFF)
+ {
+ for(uint32 i=0; i<=raPtr; i++)
+ {
+ if (returnAddr[i] == addr)
+ {
+ found = true;
+ break;
+ }
+ }
+ }
+
+ if (!found)
+ returnAddr[++raPtr] = addr;
+ }
+ }//*/
+
/* static char buffer[2048];
m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
WriteLog("%08X: %s \t\tD0=%08X, A0=%08X\n", m68kPC, buffer, m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_A0));//*/
WriteLog("\tA%i = %08X\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
}*/
- if (!m68k_is_valid_instruction(JaguarReadWord(m68kPC), M68K_CPU_TYPE_68000))
+ if (!m68k_is_valid_instruction(m68k_read_memory_16(m68kPC), M68K_CPU_TYPE_68000))
{
WriteLog("\nM68K encountered an illegal instruction at %08X!!!\n\nAborting!\n", m68kPC);
uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
M68K_show_context();
log_done();
exit(0);
- }
+ }//*/
}
//
unsigned int m68k_read_memory_8(unsigned int address)
{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ {
+ if (startMemLog)
+ readMem[address] = 1;
+ }
+#endif
//WriteLog("[RM8] Addr: %08X\n", address);
unsigned int retVal = 0;
unsigned int m68k_read_memory_16(unsigned int address)
{
+#ifdef CPU_DEBUG_MEMORY
+/* if ((address >= 0x000000) && (address <= 0x3FFFFE))
+ {
+ if (startMemLog)
+ readMem[address] = 1, readMem[address + 1] = 1;
+ }//*/
+/* if (effect_start && (address >= 0x8064FC && address <= 0x806501))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start2 && (address >= 0x806502 && address <= 0x806507))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start3 && (address >= 0x806512 && address <= 0x806517))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start4 && (address >= 0x806524 && address <= 0x806527))
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start5 && (address >= 0x80653E && address <= 0x806543)) //Collision detection!
+ {
+ return 0x4E71; // NOP
+ }
+ if (effect_start6 && (address >= 0x806544 && address <= 0x806547))
+ {
+ return 0x4E71; // NOP
+ }//*/
+#endif
//WriteLog("[RM16] Addr: %08X\n", address);
/*if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005FBA)
// for(int i=0; i<10000; i++)
void m68k_write_memory_8(unsigned int address, unsigned int value)
{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFF))
+ {
+ if (startMemLog)
+ {
+ if (value > writeMemMax[address])
+ writeMemMax[address] = value;
+ if (value < writeMemMin[address])
+ writeMemMin[address] = value;
+ }
+ }
+#endif
//if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
// WriteLog("M68K: Writing %02X at %08X\n", value, address);
//WriteLog("[WM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
void m68k_write_memory_16(unsigned int address, unsigned int value)
{
+#ifdef CPU_DEBUG_MEMORY
+ if ((address >= 0x000000) && (address <= 0x3FFFFE))
+ {
+ if (startMemLog)
+ {
+ uint8 hi = value >> 8, lo = value & 0xFF;
+
+ if (hi > writeMemMax[address])
+ writeMemMax[address] = hi;
+ if (hi < writeMemMin[address])
+ writeMemMin[address] = hi;
+
+ if (lo > writeMemMax[address+1])
+ writeMemMax[address+1] = lo;
+ if (lo < writeMemMin[address+1])
+ writeMemMin[address+1] = lo;
+ }
+ }
+#endif
//if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
// WriteLog("M68K: Writing %04X at %08X\n", value, address);
//WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
//if (address >= 0x0E75D0 && address <= 0x0E75E7)
// WriteLog("M68K: Writing %04X at %08X, M68K PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));
/*extern uint32 totalFrames;
-extern bool suppressOutput;
-if (totalFrames >= 59)
- suppressOutput = false;//*/
-/*if (address == 0xF02114)
+if (address == 0xF02114)
WriteLog("M68K: Writing to GPU_CTRL (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));
if (address == 0xF02110)
WriteLog("M68K: Writing to GPU_PC (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));//*/
else if ((address >= 0xF10000) && (address <= 0xF1FFFE))
JERRYWriteWord(address, value, M68K);
else
+ {
jaguar_unknown_writeword(address, value, M68K);
+ WriteLog("\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
+ }
}
void m68k_write_memory_32(unsigned int address, unsigned int value)
// Unknown read/write byte/word routines
//
+// It's hard to believe that developers would be sloppy with their memory writes, yet in
+// some cases the developers screwed up royal. E.g., Club Drive has the following code:
+//
+// 807EC4: movea.l #$f1b000, A1
+// 807ECA: movea.l #$8129e0, A0
+// 807ED0: move.l A0, D0
+// 807ED2: move.l #$f1bb94, D1
+// 807ED8: sub.l D0, D1
+// 807EDA: lsr.l #2, D1
+// 807EDC: move.l (A0)+, (A1)+
+// 807EDE: dbra D1, 807edc
+//
+// The problem is at $807ED0--instead of putting A0 into D0, they really meant to put A1
+// in. This mistake causes it to try and overwrite approximately $700000 worth of address
+// space! (That is, unless the 68K causes a bus error...)
+
void jaguar_unknown_writebyte(unsigned address, unsigned data, uint32 who/*=UNKNOWN*/)
{
#ifdef LOG_UNMAPPED_MEMORY_ACCESSES
void JaguarWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
{
//TEMP--Mirror of F03000? Yes, but only 32-bit CPUs can do it (i.e., NOT the 68K!)
-//if (offset >= 0xF0B000 && offset <= 0xF0BFFF)
-//WriteLog("[JWW16] --> Possible GPU RAM mirror access! [%08X]", offset);
-//if ((offset >= 0x1FF020 && offset <= 0x1FF03F) || (offset >= 0x1FF820 && offset <= 0x1FF83F))
-// WriteLog("JagWW: Writing %04X at %08X\n", data, offset);
+// PLUS, you would handle this in the GPU/DSP WriteLong code! Not here!
offset &= 0xFFFFFF;
-
+
if (offset <= 0x3FFFFE)
{
+//This MUST be done by the 68K!
+/*if (offset == 0x670C)
+ WriteLog("Jaguar: %s writing to location $670C...\n", whoName[who]);*/
+
jaguar_mainRam[(offset+0) & 0x3FFFFF] = (data>>8) & 0xFF;
jaguar_mainRam[(offset+1) & 0x3FFFFF] = data & 0xFF;
return;
}
- else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFE))
+ else if (offset >= 0xDFFF00 && offset <= 0xDFFFFE)
{
CDROMWriteWord(offset, data, who);
return;
}
- else if ((offset >= 0xF00000) && (offset <= 0xF0FFFE))
+ else if (offset >= 0xF00000 && offset <= 0xF0FFFE)
{
TOMWriteWord(offset, data, who);
return;
}
- else if ((offset >= 0xF10000) && (offset <= 0xF1FFFE))
+ else if (offset >= 0xF10000 && offset <= 0xF1FFFE)
{
JERRYWriteWord(offset, data, who);
return;
}
-
+ // Don't bomb on attempts to write to ROM
+ else if (offset >= 0x800000 && offset <= 0xEFFFFF)
+ return;
+
jaguar_unknown_writeword(offset, data, who);
}
// We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
void JaguarWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
{
+/* extern bool doDSPDis;
+ if (offset < 0x400 && !doDSPDis)
+ {
+ WriteLog("JLW: Write to %08X by %s... Starting DSP log!\n\n", offset, whoName[who]);
+ doDSPDis = true;
+ }//*/
+
JaguarWriteWord(offset, data >> 16, who);
JaguarWriteWord(offset+2, data & 0xFFFF, who);
}
//
void jaguar_init(void)
{
+#ifdef CPU_DEBUG_MEMORY
+ memset(readMem, 0x00, 0x400000);
+ memset(writeMemMin, 0xFF, 0x400000);
+ memset(writeMemMax, 0x00, 0x400000);
+#endif
memory_malloc_secure((void **)&jaguar_mainRam, 0x400000, "Jaguar 68K CPU RAM");
memory_malloc_secure((void **)&jaguar_bootRom, 0x040000, "Jaguar 68K CPU BIOS ROM");
memory_malloc_secure((void **)&jaguar_mainRom, 0x600000, "Jaguar 68K CPU ROM");
memset(jaguar_mainRam, 0x00, 0x400000);
// memset(jaguar_mainRom, 0xFF, 0x200000); // & set it to all Fs...
- memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s...
+// memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s...
+//NOTE: This *doesn't* fix FlipOut...
+ memset(jaguar_mainRom, 0x01, 0x600000); // & set it to all 01s...
// cd_bios_boot("C:\\ftp\\jaguar\\cd\\Brain Dead 13.cdi");
// cd_bios_boot("C:\\ftp\\jaguar\\cd\\baldies.cdi");
// cd_bios_boot("C:\\ftp\\jaguar\\cd\\primalrage.cdi");
// cd_bios_boot("C:\\ftp\\jaguar\\cd\\Dragons Lair.cdi");
- // Should these be hardwired or read from VP?
- jaguar_screen_scanlines = (hardwareTypeNTSC ? 524 : 624);
-//Should the divisor be 50 for PAL??? Let's try it!
- m68k_cycles_per_scanline = (hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL) / (jaguar_screen_scanlines * (hardwareTypeNTSC ? 60 : 50));
- gpu_cycles_per_scanline = dsp_cycles_per_scanline
- = (hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL) / (jaguar_screen_scanlines * (hardwareTypeNTSC ? 60 : 50));
-
-//#ifdef SOUND_OUTPUT
-// ws_audio_init();
-//#endif
-
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
gpu_init();
DSPInit();
void jaguar_done(void)
{
+#ifdef CPU_DEBUG_MEMORY
+/* WriteLog("\n\nM68000 disassembly at $8D0D44 (collision routine!)...\n");
+ jaguar_dasm(0x8D0D44, 5000);
+ WriteLog("\n");//*/
+/* WriteLog("\n\nM68000 disassembly at $806300 (look @ $806410)...\n");
+ jaguar_dasm(0x806300, 5000);
+ WriteLog("\n");//*/
+
+/* WriteLog("\nJaguar: Memory Usage Stats (return addresses)\n\n");
+
+ for(uint32 i=0; i<=raPtr; i++)
+ {
+ WriteLog("\t%08X\n", returnAddr[i]);
+ WriteLog("M68000 disassembly at $%08X...\n", returnAddr[i] - 16);
+ jaguar_dasm(returnAddr[i] - 16, 16);
+ WriteLog("\n");
+ }
+ WriteLog("\n");//*/
+
+/* int start = 0, end = 0;
+ bool endTriggered = false, startTriggered = false;
+ for(int i=0; i<0x400000; i++)
+ {
+ if (readMem[i] && writeMemMin[i] != 0xFF && writeMemMax != 0x00)
+ {
+ if (!startTriggered)
+ startTriggered = true, endTriggered = false, start = i;
+
+ WriteLog("\t\tMin/Max @ %06X: %u/%u\n", i, writeMemMin[i], writeMemMax[i]);
+ }
+ else
+ {
+ if (!endTriggered)
+ {
+ end = i - 1, endTriggered = true, startTriggered = false;
+ WriteLog("\tMemory range accessed: %06X - %06X\n", start, end);
+ }
+ }
+ }
+ WriteLog("\n");//*/
+#endif
//#ifdef CPU_DEBUG
// for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
// WriteLog("\tA%i = 0x%.8x\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
jaguar_dasm(0x802B00, 500);
WriteLog("\n");//*/
+/* WriteLog("\n\nM68000 disassembly at $809900 (look @ $8099F8)...\n");
+ jaguar_dasm(0x809900, 500);
+ WriteLog("\n");//*/
+//8099F8
+/* WriteLog("\n\nDump of $8093C8:\n\n");
+ for(int i=0x8093C8; i<0x809900; i+=4)
+ WriteLog("%06X: %08X\n", i, JaguarReadLong(i));//*/
+/* WriteLog("\n\nM68000 disassembly at $90006C...\n");
+ jaguar_dasm(0x90006C, 500);
+ WriteLog("\n");//*/
+
// WriteLog("Jaguar: CD BIOS version %04X\n", JaguarReadWord(0x3004));
WriteLog("Jaguar: Interrupt enable = %02X\n", TOMReadByte(0xF000E1) & 0x1F);
WriteLog("Jaguar: VBL interrupt is %s\n", ((tom_irq_enabled(IRQ_VBLANK)) && (jaguar_interrupt_handler_is_valid(64))) ? "enabled" : "disabled");
M68K_show_context();
//#endif
-//#ifdef SOUND_OUTPUT
-// ws_audio_done();
-//#endif
+
cd_bios_done();
cdrom_done();
gpu_done();
void jaguar_reset(void)
{
- if (jaguar_use_bios)
+ if (vjs.useJaguarBIOS)
memcpy(jaguar_mainRam, jaguar_bootRom, 8);
else
{
WriteLog("\t68K PC=%06X SP=%08X\n", m68k_get_reg(NULL, M68K_REG_PC), m68k_get_reg(NULL, M68K_REG_A7));
}
-void jaguar_reset_handler(void)
-{
-}
-
-void jaguar_exec(int16 * backbuffer, bool render)
-{
- uint32 i, vblank_duration = tom_get_vdb();
-
- // vblank
- if (tom_irq_enabled(IRQ_VBLANK) && jaguar_interrupt_handler_is_valid(64))
- {
- if (JaguarReadWord(0xF0004E) != 0x07FF) // VI (11 bits wide!)
- {
- tom_set_pending_video_int();
-// s68000interrupt(7, IRQ_VBLANK+64);
-// s68000flushInterrupts();
- m68k_set_irq(7); // IRQ_VBLANK+64??? Not autovectored??? No.
-// Could set a global variable here, to signal that this is a VBLANK interrupt...
-// Then again, since IRQ_VBLANK is set to zero, this would not be necessary in this case.
- }
- }
-
- for(i=0; i<vblank_duration; i++)
- {
-/* uint32 invalid_instruction_address = s68000exec(m68k_cycles_per_scanline);
- if (invalid_instruction_address != 0x80000000)
- cd_bios_process(invalid_instruction_address);*/
- m68k_execute(m68k_cycles_per_scanline);
- // No CD handling... !!! FIX !!!
-
- cd_bios_exec(i);
- tom_pit_exec(m68k_cycles_per_scanline);
- tom_exec_scanline(backbuffer, i, false);
- jerry_pit_exec(m68k_cycles_per_scanline);
- jerry_i2s_exec(m68k_cycles_per_scanline);
- gpu_exec(gpu_cycles_per_scanline);
- if (dsp_enabled)
- DSPExec(dsp_cycles_per_scanline);
- }
-
- for (; i<jaguar_screen_scanlines; i++)
- {
-/* uint32 invalid_instruction_address = s68000exec(m68k_cycles_per_scanline);
- if (invalid_instruction_address != 0x80000000)
- cd_bios_process(invalid_instruction_address);*/
- m68k_execute(m68k_cycles_per_scanline);
- // No CD handling... !!! FIX !!!
- cd_bios_exec(i);
- tom_pit_exec(m68k_cycles_per_scanline);
- jerry_pit_exec(m68k_cycles_per_scanline);
- jerry_i2s_exec(m68k_cycles_per_scanline);
- tom_exec_scanline(backbuffer, i, render);
- gpu_exec(gpu_cycles_per_scanline);
- if (dsp_enabled)
- DSPExec(dsp_cycles_per_scanline);
- backbuffer += tom_width;
- }
-//#ifdef SOUND_OUTPUT
-// system_sound_update();
-//#endif
-}
-
//
// Main Jaguar execution loop (1 frame)
//
void JaguarExecute(int16 * backbuffer, bool render)
{
- uint16 vp = TOMReadWord(0xF0003E);//Hmm. This is a WO register. Will work? Looks like. But wrong behavior!
+ uint16 vp = TOMReadWord(0xF0003E) + 1;//Hmm. This is a WO register. Will work? Looks like. But wrong behavior!
uint16 vi = TOMReadWord(0xF0004E);//Another WO register...
- uint16 vdb = TOMReadWord(0xF00046);
-// uint16 endingLine =
+// uint16 vdb = TOMReadWord(0xF00046);
//Note: This is the *definite* end of the display, though VDE *might* be less than this...
// uint16 vbb = TOMReadWord(0xF00040);
//It seems that they mean it when they say that VDE is the end of object processing.
//However, we need to be able to tell the OP (or TOM) that we've reached the end of the
//buffer and not to write any more pixels... !!! FIX !!!
- uint16 vde = TOMReadWord(0xF00048);
+// uint16 vde = TOMReadWord(0xF00048);
+
+ uint16 refreshRate = (vjs.hardwareTypeNTSC ? 60 : 50);
+ // Should these be hardwired or read from VP? Yes, from VP!
+ uint32 M68KCyclesPerScanline
+ = (vjs.hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL) / (vp * refreshRate);
+ uint32 RISCCyclesPerScanline
+ = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL) / (vp * refreshRate);
+ TOMResetBackbuffer(backbuffer);
/*extern int effect_start;
if (effect_start)
{
- WriteLog("JagExe: VP=%u, VI=%u, VDB=%u, VBB=%u CPU CPS=%u, GPU CPS=%u\n", vp, vi, vdb, vbb, m68k_cycles_per_scanline, gpu_cycles_per_scanline);
+ WriteLog("JagExe: VP=%u, VI=%u, VDB=%u, VBB=%u CPU CPS=%u, GPU CPS=%u\n", vp, vi, vdb, vbb, M68KCyclesPerScanline, RISCCyclesPerScanline);
}//*/
+//extern int start_logging;
for(uint16 i=0; i<vp; i++)
{
// Increment the horizontal count (why? RNG?)
- TOMWriteWord(0xF00004, TOMReadWord(0xF00004) + 1);
+ TOMWriteWord(0xF00004, (TOMReadWord(0xF00004) + 1) & 0x7FF);
- TOMWriteWord(0xF00006, i); // Write the VC
+ TOMWriteWord(0xF00006, i); // Write the VC
if (i == vi) // Time for Vertical Interrupt?
{
- if (tom_irq_enabled(IRQ_VBLANK) && jaguar_interrupt_handler_is_valid(64))
+ if (tom_irq_enabled(IRQ_VBLANK))// && jaguar_interrupt_handler_is_valid(64))
{
// We don't have to worry about autovectors & whatnot because the Jaguar
- // tells you through registers who sent the interrupt...
+ // tells you through its HW registers who sent the interrupt...
tom_set_pending_video_int();
m68k_set_irq(7);
}
}
-
-// uint32 invalid_instruction_address = s68000exec(m68k_cycles_per_scanline);
+
+// uint32 invalid_instruction_address = s68000exec(M68KCyclesPerScanline);
// if (invalid_instruction_address != 0x80000000)
// cd_bios_process(invalid_instruction_address);
- // These are divided by 2 because we're executing *half* lines...!
- m68k_execute(m68k_cycles_per_scanline / 2);
+//if (start_logging)
+// WriteLog("About to execute M68K...\n");
+ m68k_execute(M68KCyclesPerScanline);
// No CD handling... !!! FIX !!!
+//if (start_logging)
+// WriteLog("About to execute CD BIOS...\n");
cd_bios_exec(i); // NOTE: Ignores parameter...
-//I'm pretty sure these run at the RISC clock rate...
-// tom_pit_exec(m68k_cycles_per_scanline / 2);
-// jerry_pit_exec(m68k_cycles_per_scanline / 2);
-// jerry_i2s_exec(m68k_cycles_per_scanline / 2);
- tom_pit_exec(gpu_cycles_per_scanline / 2);
- jerry_pit_exec(gpu_cycles_per_scanline / 2);
- jerry_i2s_exec(gpu_cycles_per_scanline / 2);
- gpu_exec(gpu_cycles_per_scanline / 2);
- if (dsp_enabled)
- DSPExec(dsp_cycles_per_scanline / 2);
-
-//Interlacing is still not handled correctly here...
- if (i >= vdb && i < vde)//vbb)
- {
- if (!(i & 0x01)) // Execute OP only on even lines (non-interlaced only!)
- {
- tom_exec_scanline(backbuffer, i/2, render); // i/2 is a kludge...
- backbuffer += TOMGetSDLScreenPitch() / 2; // Convert bytes to words...
- }
- }
+//if (start_logging)
+// WriteLog("About to execute TOM's PIT...\n");
+ TOMExecPIT(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute JERRY's PIT...\n");
+ jerry_pit_exec(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute JERRY's SSI...\n");
+ jerry_i2s_exec(RISCCyclesPerScanline);
+//if (start_logging)
+// WriteLog("About to execute GPU...\n");
+ gpu_exec(RISCCyclesPerScanline);
+
+ if (vjs.DSPEnabled)
+ if (vjs.usePipelinedDSP)
+ DSPExecP2(RISCCyclesPerScanline); // Pipelined DSP execution (3 stage)...
+ else
+ DSPExec(RISCCyclesPerScanline); // Ordinary non-pipelined DSP
+// DSPExecComp(RISCCyclesPerScanline); // Comparison core
+
+//if (start_logging)
+// WriteLog("About to execute OP...\n");
+ TOMExecScanline(i, render);
}
-
-//#ifdef SOUND_OUTPUT
-// system_sound_update();
-//#endif
}
// Temp debugging stuff
projects / virtualjaguar / blobdiff