int a0ixreg; // Index register
int a0ixsiz; // Index register size (and scale)
TOKEN a0oexpr[EXPRSIZE]; // Outer displacement expression
-uint32_t a0oexval; // Outer displacement value
+uint64_t a0oexval; // Outer displacement value
WORD a0oexattr; // Outer displacement attribute
SYM * a0esym; // External symbol involved in expr
TOKEN a0bexpr[EXPRSIZE]; // Base displacement expression
int a1ixreg; // Index register
int a1ixsiz; // Index register size (and scale)
TOKEN a1oexpr[EXPRSIZE]; // Outer displacement expression
-uint32_t a1oexval; // Outer displacement value
+uint64_t a1oexval; // Outer displacement value
WORD a1oexattr; // Outer displacement attribute
SYM * a1esym; // External symbol involved in expr
TOKEN a1bexpr[EXPRSIZE]; // Base displacement expression
WORD am1_030; // ea bits for 020+ addressing modes
int a2reg; // Register for div.l (68020+)
-WORD mulmode; // to distinguish between 32 and 64 bit multiplications (68020+)
int bfparam1; // bfxxx / fmove instruction parameter 1
int bfparam2; // bfxxx / fmove instruction parameter 2
-int bfval1; //bfxxx / fmove value 1
-int bfval2; //bfxxx / fmove value 2
+int bfval1; // bfxxx / fmove value 1
+int bfval2; // bfxxx / fmove value 2
TOKEN bf0expr[EXPRSIZE]; // Expression
uint64_t bf0exval; // Expression's value
WORD bf0exattr; // Expression's attribute
a0exattr = a0oexattr = a1exattr = a1oexattr = 0;
a0esym = a1esym = NULL;
a0bexpr[0] = a1bexpr[0] = ENDEXPR;
- a0bexval = a0bsize = a0extension = a1bexval = a1bsize = a1extension = 0;
+ a0bexval = a1bexval = 0;
+ a0bsize = a0extension = a1bsize = a1extension = 0;
am0_030 = am1_030 = 0;
bfparam1 = bfparam2 = 0;
bf0expr[0] = ENDEXPR;
if ((*tok >= KW_D0) && (*tok <= KW_D7))
{
- a2reg = (*tok - KW_D0);
- mulmode = 1 << 10;
+ a2reg = (*tok++) & 7;
}
else if ((*tok >= KW_FP0) && (*tok <= KW_FP7))
{
- a2reg = (*tok - KW_FP0);
- mulmode = 1 << 10;
+ a2reg = (*tok++) & 7;
}
else
return error("a data or FPU register must follow a :");
-
- *tok++;
}
else
{
// If no ':' is present then maybe we have something like divs.l d0,d1
// which sould translate to divs.l d0,d1:d1
a2reg = a1reg;
- mulmode = 0;
}
nmodes = 2;
int fpu_reglist_right(WORD * a_rmask)
{
static WORD msktab_plus[] = {
- 0x0001, 0x0002, 0x0004, 0x0008,
- 0x0010, 0x0020, 0x0040, 0x0080
+ 0x0080, 0x0040, 0x0020, 0x0010,
+ 0x0008, 0x0004, 0x0002, 0x0001
};
WORD rmask = 0;
//
int check030bf(void)
{
+ PTR tp;
CHECK00;
tok++;
if (*tok == CONST)
{
- tok++; // Skip the HI LONG
- tok++;
- bfval1 = *(int *)tok;
+ tp.u32 = tok + 1;
+ bfval1 = (int)*tp.u64++;
+ tok = tp.u32;
// Do=0, offset=immediate - shift it to place
bfparam1 = (0 << 11);
- tok++;
}
else if (*tok == SYMBOL)
{
if (!(bf0exattr & DEFINED))
return error("bfxxx offset: immediate value must evaluate");
- bfval1 = bf0exval;
+ bfval1 = (int)bf0exval;
// Do=0, offset=immediate - shift it to place
bfparam1 = (0 << 11);
else
return ERROR;
- if (*tok==':')
- tok++; //eat the ':'
+ // Eat the ':', if any
+ if (*tok == ':')
+ tok++;
if (*tok == '}' && tok[1] == EOL)
{
if (*tok == CONST)
{
- tok++; // Skip the HI LONG
- tok++;
- bfval2 = *(int *)tok;
+ tp.u32 = tok + 1;
+ bfval2 = (int)*tp.u64++;
+ tok = tp.u32;
// Do=0, offset=immediate - shift it to place
bfparam2 = (0 << 5);
- tok++;
}
else if (*tok == SYMBOL)
{
if (expr(bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK)
return ERROR;
- bfval2 = bf0exval;
+ bfval2 = (int)bf0exval;
if (!(bf0exattr & DEFINED))
return error("bfxxx width: immediate value must evaluate");
else if ((*tok >= KW_D0) && (*tok <= KW_D7))
{
// Do=1, offset=data register - shift it to place
- bfval2 = ((*(int *)tok - 128));
+ bfval2 = (*(int *)tok - 128);
bfparam2 = (1 << 5);
tok++;
}