1 // Virtual 6809B v1.2P (Last build: 5/30/1998)
2 // Protected mode version
6 // (c) 1998 Underground Software
9 #include "v6809.h" // Pull in some funcs...
11 // Global defs (needed because functions can only return one value.
12 // Maybe you could use a struct to pass multiple values, but
13 // what a pain in the ass! This way makes a little more sense
16 WORD pcrB, xrB, yrB, srB, urB; // Double byte registers
17 BYTE ccrB, arB, brB, dprB; // Single byte registers
18 long iclockB; // Instruction clock
19 bool illegalB = false; // Illegal instruction executed flag
21 static WORD addr; // Temporary variables common to all funcs...
24 extern BYTE FetchB(); // You need to define these functions
25 extern WORD FetchWB(); // externally because every hardware situation
26 extern BYTE RdMemB(WORD); // is going to be different...
27 extern void WrMemB(WORD, BYTE);
29 void (* exec_op0B[256])(); // Array of page zero opcode functions...
30 void (* exec_op1B[256])(); // Array of page one opcode functions...
31 void (* exec_op2B[256])(); // Array of page two opcode functions...
34 // Function to read TFR/EXG post byte
36 WORD ReadEXGB(BYTE code)
42 case 0: retval = (arB<<8) | brB; break;
43 case 1: retval = xrB; break;
44 case 2: retval = yrB; break;
45 case 3: retval = urB; break;
46 case 4: retval = srB; break;
47 case 5: retval = pcrB; break;
48 case 8: retval = arB; break;
49 case 9: retval = brB; break;
50 case 10: retval = ccrB; break;
51 case 11: retval = dprB; break;
52 default: retval = 0xFF;
58 // Function to set TFR/EXG data
60 void WriteEXGB(BYTE code, WORD data)
64 case 0: { arB = data>>8; brB = data&0xFF; break; }
65 case 1: xrB = data; break;
66 case 2: yrB = data; break;
67 case 3: urB = data; break;
68 case 4: srB = data; break;
69 case 5: pcrB = data; break;
70 case 8: arB = data&0xFF; break;
71 case 9: brB = data&0xFF; break;
72 case 10: ccrB = data&0xFF; break;
73 case 11: dprB = data&0xFF; break;
78 // Function to decode register data
80 WORD DecodeRegB(BYTE reg)
86 case 0: retval = xrB; break;
87 case 1: retval = yrB; break;
88 case 2: retval = urB; break;
89 case 3: retval = srB; break;
95 // Function to decode IDX data
97 WORD DecodeIDXB(BYTE code)
100 BYTE reg = (code&0x60)>>5, idxind = (code&0x10)>>4, lo_nyb = code&0x0F;
102 if (!(code&0x80)) // Hi bit unset? Then decode 4 bit offset
104 addr = DecodeRegB(reg) + (idxind ? lo_nyb-16 : lo_nyb);
112 case 1: { woff = DecodeRegB(reg);
113 addr = (RdMemB(woff)<<8) | RdMemB(woff+1);
116 case 0: xrB++; xrB++; break;
117 case 1: yrB++; yrB++; break;
118 case 2: urB++; urB++; break;
119 case 3: srB++; srB++; break;
122 case 3: { switch(reg)
124 case 0: xrB--; xrB--; break;
125 case 1: yrB--; yrB--; break;
126 case 2: urB--; urB--; break;
127 case 3: srB--; srB--; break;
129 woff = DecodeRegB(reg);
130 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
131 case 4: { woff = DecodeRegB(reg);
132 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
133 case 5: { woff = DecodeRegB(reg) + SignedB(brB);
134 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
135 case 6: { woff = DecodeRegB(reg) + SignedB(arB);
136 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
137 case 8: { woff = DecodeRegB(reg) + SignedB(FetchB());
138 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
139 case 9: { woff = DecodeRegB(reg) + SignedW(FetchWB());
140 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
141 case 11: { woff = DecodeRegB(reg) + SignedW((arB<<8) | brB);
142 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
143 case 12: { woff = pcrB + SignedB(FetchB());
144 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
145 case 13: { woff = pcrB + SignedW(FetchWB());
146 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
147 case 15: { woff = FetchWB();
148 addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
155 case 0: { addr = DecodeRegB(reg);
158 case 0: xrB++; break;
159 case 1: yrB++; break;
160 case 2: urB++; break;
161 case 3: srB++; break;
164 case 1: { addr = DecodeRegB(reg);
167 case 0: xrB++; xrB++; break;
168 case 1: yrB++; yrB++; break;
169 case 2: urB++; urB++; break;
170 case 3: srB++; srB++; break;
173 case 2: { switch(reg)
175 case 0: xrB--; break;
176 case 1: yrB--; break;
177 case 2: urB--; break;
178 case 3: srB--; break;
180 addr = DecodeRegB(reg); break; }
181 case 3: { switch(reg)
183 case 0: xrB--; xrB--; break;
184 case 1: yrB--; yrB--; break;
185 case 2: urB--; urB--; break;
186 case 3: srB--; srB--; break;
188 addr = DecodeRegB(reg); break; }
189 case 4: { addr = DecodeRegB(reg); break; }
190 case 5: { addr = DecodeRegB(reg) + SignedB(brB); break; }
191 case 6: { addr = DecodeRegB(reg) + SignedB(arB); break; }
192 case 8: { addr = DecodeRegB(reg) + SignedB(FetchB()); break; }
193 case 9: { addr = DecodeRegB(reg) + SignedW(FetchWB()); break; }
194 case 11: { addr = DecodeRegB(reg) + SignedW((arB<<8) | brB); break; }
195 case 12: { addr = pcrB + SignedB(FetchB()); break; }
196 case 13: { addr = pcrB + SignedW(FetchWB()); break; }
204 // Page zero instructions...
207 void BOp00(void) // NEG DP
209 addr = (dprB<<8) | FetchB();
210 tmp = 256 - RdMemB(addr);
212 (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
213 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
214 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
215 (tmp > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
218 void BOp03(void) // COM DP
220 addr = (dprB<<8) | FetchB();
221 tmp = 0xFF ^ RdMemB(addr);
223 ccrB &= 0xFD; ccrB |= 0x01; // CLV SEC
224 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
225 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
228 void BOp04(void) // LSR DP
230 addr = (dprB<<8) | FetchB();
232 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
233 tmp >>= 1; WrMemB(addr, tmp);
235 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
238 void BOp06(void) // ROR DP
240 addr = (dprB<<8) | FetchB(); BYTE tmp2 = RdMemB(addr);
241 tmp = (tmp2>>1) + (ccrB&0x01)*128;
243 (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
244 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
245 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
248 void BOp07(void) // ASR DP
250 addr = (dprB<<8) | FetchB(); tmp = RdMemB(addr);
251 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
253 if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
255 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
256 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
259 void BOp08(void) // LSL DP
261 addr = (dprB<<8) | FetchB(); // NEEDS OVERFLOW ADJUSTMENT
263 (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
266 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
267 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
270 void BOp09(void) // ROL DP
272 addr = (dprB<<8) | FetchB(); BYTE tmp2 = RdMemB(addr);
273 tmp = (tmp2<<1) + (ccrB&0x01);
275 (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
276 ((tmp2&0x80)^((tmp2<<1)&0x80) ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
277 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
278 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
281 void BOp0A(void) // DEC DP
283 addr = (dprB<<8) | FetchB();
284 tmp = RdMemB(addr) - 1;
286 (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
287 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
288 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
291 void BOp0C(void) // INC DP
293 addr = (dprB<<8) | FetchB();
294 tmp = RdMemB(addr) + 1;
296 (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
297 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
298 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
301 void BOp0D(void) // TST DP
303 tmp = RdMemB((dprB<<8)|FetchB());
305 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
306 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
309 void BOp0E(void) // JMP DP
311 pcrB = (dprB<<8) | FetchB();
314 void BOp0F(void) // CLR DP
316 WrMemB((dprB<<8)|FetchB(), 0);
317 ccrB &= 0xF0; ccrB |= 0x04; // CLN, SEZ, CLV, CLC
320 void BOp12(void) // NOP
324 void BOp13(void) // SYNC
328 void BOp16(void) // LBRA
330 pcrB += SignedW(FetchWB());
333 void BOp17(void) // LBSR
336 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
337 pcrB += SignedW(addr);
340 void BOp19(void) // DAA
342 /*if ((ccrB&0x20) || ((arB&0x0F) > 0x09)) // H set or lo nyb too big?
344 arB += 0x06; ccrB |= 0x20; // Then adjust & set half carry
346 if ((ccrB&0x01) || (arB > 0x9F)) // C set or hi nyb too big?
348 arB += 0x60; ccrB |= 0x01; // Then adjust & set carry
350 ccrB &= 0xF1; // CL NZV
351 if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
352 if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
355 BYTE msn, lsn; // Will this work??
357 msn=arB & 0xf0; lsn=arB & 0x0f;
358 if( lsn>0x09 || ccrB&0x20 ) cf |= 0x06;
359 if( msn>0x80 && lsn>0x09 ) cf |= 0x60;
360 if( msn>0x90 || ccrB&0x01 ) cf |= 0x60;
362 ccrB &= 0xF1; // CL NZV
363 //CLR_NZV; /* keep carry from previous operation */
364 if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
365 if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
366 //SET_NZ8((byte)t); SET_C8(t);
367 ccrB |= ((t&0x100)>>8); // Adjust Carry (?)
370 void BOp1A(void) // ORCC #
375 void BOp1C(void) // ANDCC #
380 void BOp1D(void) // SEX
382 (brB&0x80 ? arB = 0xFF : arB = 0x00);
383 ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
384 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
387 void BOp1E(void) // EXG
390 addr = ReadEXGB(tmp>>4); WriteEXGB(tmp>>4, ReadEXGB(tmp&0xF));
391 WriteEXGB(tmp&0xF, addr);
394 void BOp1F(void) // TFR
397 WriteEXGB(tmp&0xF, ReadEXGB(tmp>>4));
400 void BOp20(void) // BRA
402 pcrB += SignedB(FetchB()); // Branch always
405 void BOp21(void) // BRN
410 void BOp22(void) // BHI
413 if (!(ccrB&0x05)) pcrB += SignedB(tmp);
416 void BOp23(void) // BLS
419 if (ccrB&0x05) pcrB += SignedB(tmp);
422 void BOp24(void) // BCC (BHS)
425 if (!(ccrB&0x01)) pcrB += SignedB(tmp);
428 void BOp25(void) // BCS (BLO)
431 if (ccrB&0x01) pcrB += SignedB(tmp);
434 void BOp26(void) // BNE
437 if (!(ccrB&0x04)) pcrB += SignedB(tmp);
440 void BOp27(void) // BEQ
443 if (ccrB&0x04) pcrB += SignedB(tmp);
446 void BOp28(void) // BVC
449 if (!(ccrB&0x02)) pcrB += SignedB(tmp);
452 void BOp29(void) // BVS
455 if (ccrB&0x02) pcrB += SignedB(tmp);
458 void BOp2A(void) // BPL
461 if (!(ccrB&0x08)) pcrB += SignedB(tmp);
464 void BOp2B(void) // BMI
467 if (ccrB&0x08) pcrB += SignedB(tmp);
470 void BOp2C(void) // BGE
473 if (!(((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedB(tmp);
476 void BOp2D(void) // BLT
479 if (((ccrB&0x08) >> 2) ^ (ccrB&0x02)) pcrB += SignedB(tmp);
482 void BOp2E(void) // BGT
485 if (!((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02)))) pcrB += SignedB(tmp);
488 void BOp2F(void) // BLE
491 if ((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedB(tmp);
494 void BOp30(void) // LEAX
496 xrB = DecodeIDXB(FetchB());
497 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
500 void BOp31(void) // LEAY
502 yrB = DecodeIDXB(FetchB());
503 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
506 void BOp32(void) // LEAS
508 srB = DecodeIDXB(FetchB());
509 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
512 void BOp33(void) // LEAU
514 urB = DecodeIDXB(FetchB());
515 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
518 void BOp34(void) // PSHS
521 if (tmp&0x80) { WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8); }
522 if (tmp&0x40) { WrMemB(--srB, urB&0xFF); WrMemB(--srB, urB>>8); }
523 if (tmp&0x20) { WrMemB(--srB, yrB&0xFF); WrMemB(--srB, yrB>>8); }
524 if (tmp&0x10) { WrMemB(--srB, xrB&0xFF); WrMemB(--srB, xrB>>8); }
525 if (tmp&0x08) WrMemB(--srB, dprB);
526 if (tmp&0x04) WrMemB(--srB, brB);
527 if (tmp&0x02) WrMemB(--srB, arB);
528 if (tmp&0x01) WrMemB(--srB, ccrB);
531 void BOp35(void) // PULS
534 if (tmp&0x01) ccrB = RdMemB(srB++);
535 if (tmp&0x02) arB = RdMemB(srB++);
536 if (tmp&0x04) brB = RdMemB(srB++);
537 if (tmp&0x08) dprB = RdMemB(srB++);
538 if (tmp&0x10) xrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
539 if (tmp&0x20) yrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
540 if (tmp&0x40) urB = (RdMemB(srB++)<<8) | RdMemB(srB++);
541 if (tmp&0x80) pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
544 void BOp36(void) // PSHU
547 if (tmp&0x80) { WrMemB(--urB, pcrB&0xFF); WrMemB(--urB, pcrB>>8); }
548 if (tmp&0x40) { WrMemB(--urB, srB&0xFF); WrMemB(--urB, srB>>8); }
549 if (tmp&0x20) { WrMemB(--urB, yrB&0xFF); WrMemB(--urB, yrB>>8); }
550 if (tmp&0x10) { WrMemB(--urB, xrB&0xFF); WrMemB(--urB, xrB>>8); }
551 if (tmp&0x08) WrMemB(--urB, dprB);
552 if (tmp&0x04) WrMemB(--urB, brB);
553 if (tmp&0x02) WrMemB(--urB, arB);
554 if (tmp&0x01) WrMemB(--urB, ccrB);
557 void BOp37(void) // PULU
560 if (tmp&0x01) ccrB = RdMemB(urB++);
561 if (tmp&0x02) arB = RdMemB(urB++);
562 if (tmp&0x04) brB = RdMemB(urB++);
563 if (tmp&0x08) dprB = RdMemB(urB++);
564 if (tmp&0x10) xrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
565 if (tmp&0x20) yrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
566 if (tmp&0x40) srB = (RdMemB(urB++)<<8) | RdMemB(urB++);
567 if (tmp&0x80) pcrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
570 void BOp39(void) // RTS
572 pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
575 void BOp3A(void) // ABX
580 void BOp3B(void) // RTI
582 ccrB = RdMemB(srB++);
583 if (ccrB&0x80) // If E flag set, pull all regs
585 arB = RdMemB(srB++); brB = RdMemB(srB++); dprB = RdMemB(srB++);
586 xrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
587 yrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
588 urB = (RdMemB(srB++)<<8) | RdMemB(srB++);
595 pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
597 void BOp3C(void) // CWAI
599 ccrB &= FetchB(); ccrB |= 0x80;
600 iclockB += 1000000; // Force interrupt
602 void BOp3D(void) // MUL
604 addr = arB * brB; arB = addr>>8; brB = addr&0xFF;
605 (addr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
606 (brB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
609 void BOp3E(void) // RESET
612 void BOp3F(void) // SWI
615 void BOp40(void) // NEGA
618 (arB > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
619 (arB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
620 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
621 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
624 void BOp43(void) // COMA
627 ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
628 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
629 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
632 void BOp44(void) // LSRA
634 (arB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
636 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
637 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
640 void BOp46(void) // RORA
642 tmp = arB; arB = (tmp>>1) + (ccrB&0x01)*128;
643 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
644 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
645 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
648 void BOp47(void) // ASRA
650 (arB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
651 arB >>= 1; // Do the shift
652 if (arB&0x40) arB |= 0x80; // Set neg if it was set
653 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
654 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
657 void BOp48(void) // LSLA [Keep checking from here...]
659 (arB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
661 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
662 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
665 void BOp49(void) // ROLA
667 tmp = arB; arB = (tmp<<1) + (ccrB&0x01);
668 (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
669 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
670 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
673 void BOp4A(void) // DECA
676 (arB == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
677 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
678 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
681 void BOp4C(void) // INCA
684 (arB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
685 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
686 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
689 void BOp4D(void) // TSTA
691 ccrB &= 0xFD; // Clear oVerflow flag
692 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
693 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
696 void BOp4F(void) // CLRA
699 ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
702 void BOp50(void) // NEGB
705 // ((brB^tmp)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Adjust H carry
706 (brB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
707 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
708 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
709 (brB > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
712 void BOp53(void) // COMB
715 ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
716 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
717 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
720 void BOp54(void) // LSRB
722 (brB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
724 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
725 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
728 void BOp56(void) // RORB
730 tmp = brB; brB = (brB >> 1) + (ccrB&0x01)*128;
731 (tmp&0x01 ? ccrB |=0x01 : ccrB &= 0xFE); // Shift bit into carry
732 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
733 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
736 void BOp57(void) // ASRB
738 (brB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
739 brB >>= 1; // Do the shift
740 if (brB&0x40) brB |= 0x80; // Set neg if it was set
741 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
742 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
745 void BOp58(void) // LSLB
747 (brB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
749 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
750 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
753 void BOp59(void) // ROLB
756 brB = (tmp<<1) + (ccrB&0x01);
757 (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
758 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
759 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
762 void BOp5A(void) // DECB
765 (brB == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
766 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
767 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
770 void BOp5C(void) // INCB
773 (brB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
774 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
775 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
778 void BOp5D(void) // TSTB
780 ccrB &= 0xFD; // Clear oVerflow flag
781 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
782 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
785 void BOp5F(void) // CLRB
788 ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
791 void BOp60(void) // NEG IDX
793 addr = DecodeIDXB(FetchB());
794 tmp = RdMemB(addr); BYTE res = 256 - tmp;
796 // ((res^tmp)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Adjust H carry
797 (res == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
798 (res == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
799 (res&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
800 (res > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
803 void BOp63(void) // COM IDX
805 addr = DecodeIDXB(FetchB());
806 tmp = RdMemB(addr) ^ 0xFF;
808 ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
809 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
810 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
813 void BOp64(void) // LSR IDX
815 addr = DecodeIDXB(FetchB());
817 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
818 tmp >>= 1; WrMemB(addr, tmp);
820 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
823 void BOp66(void) // ROR IDX
825 addr = DecodeIDXB(FetchB());
826 tmp = RdMemB(addr); BYTE tmp2 = tmp;
827 tmp = (tmp >> 1) + (ccrB&0x01)*128;
829 (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
830 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
831 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
834 void BOp67(void) // ASR IDX
836 addr = DecodeIDXB(FetchB());
838 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
840 if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
842 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
843 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
846 void BOp68(void) // LSL IDX
848 addr = DecodeIDXB(FetchB());
850 (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
853 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
854 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
857 void BOp69(void) // ROL IDX
859 BYTE tmp2 = RdMemB(DecodeIDXB(FetchB()));
860 tmp = (tmp2<<1) + (ccrB&0x01);
862 (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
863 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
864 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
867 void BOp6A(void) // DEC IDX
870 addr = DecodeIDXB(FetchB());
871 tmp = RdMemB(addr) - 1;
873 (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
874 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
875 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
878 void BOp6C(void) // INC IDX
880 addr = DecodeIDXB(FetchB());
881 tmp = RdMemB(addr) + 1;
883 (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
884 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
885 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
888 void BOp6D(void) // TST IDX
890 tmp = RdMemB(DecodeIDXB(FetchB()));
891 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
892 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
895 void BOp6E(void) // JMP IDX
897 pcrB = DecodeIDXB(FetchB());
900 void BOp6F(void) // CLR IDX
902 addr = DecodeIDXB(FetchB());
904 ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
907 void BOp70(void) // NEG ABS
910 tmp = RdMemB(addr); BYTE res = 256 - tmp;
912 (res == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
913 (res == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
914 (res&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
915 (res > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
918 void BOp73(void) // COM ABS
921 tmp = RdMemB(addr) ^ 0xFF;
923 ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
924 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
925 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
928 void BOp74(void) // LSR ABS
932 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
933 tmp >>= 1; WrMemB(addr, tmp);
935 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
938 void BOp76(void) // ROR ABS
942 tmp = RdMemB(addr); BYTE tmp2 = tmp;
943 tmp = (tmp >> 1) + (ccrB&0x01)*128;
945 (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
946 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
947 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
950 void BOp77(void) // ASR ABS
955 (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
957 if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
959 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
960 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
963 void BOp78(void) // LSL ABS
968 (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
971 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
972 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
975 void BOp79(void) // ROL ABS
977 BYTE tmp2 = RdMemB(FetchWB());
978 tmp = (tmp2<<1) + (ccrB&0x01);
980 (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
981 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
982 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
985 void BOp7A(void) // DEC ABS
989 tmp = RdMemB(addr) - 1;
991 (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
992 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
993 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
996 void BOp7C(void) // INC ABS
1000 tmp = RdMemB(addr) + 1;
1002 (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
1003 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1004 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1007 void BOp7D(void) // TST ABS
1009 BYTE tmp = RdMemB(FetchWB());
1010 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1011 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1014 void BOp7E(void) // JMP ABS
1019 void BOp7F(void) // CLR ABS
1021 WrMemB(FetchWB(), 0);
1022 ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
1025 void BOp80(void) // SUBA #
1027 BYTE tmp = FetchB(); BYTE as = arB;
1029 (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1030 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1031 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1032 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1035 void BOp81(void) // CMPA #
1038 BYTE db = arB - tmp;
1039 (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1040 ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1041 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1042 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1045 void BOp82(void) // SBCA #
1047 tmp = FetchB(); BYTE as = arB;
1048 arB = arB - tmp - (ccrB&0x01);
1049 (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1050 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1051 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1052 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1055 void BOp83(void) // SUBD #
1057 addr = FetchWB(); WORD dr = (arB<<8)|brB, ds = dr;
1059 (ds < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1060 ((ds^addr^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1061 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1062 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1063 arB = dr>>8; brB = dr&0xFF;
1066 void BOp84(void) // ANDA #
1069 ccrB &= 0xFD; // Clear oVerflow flag
1070 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1071 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1074 void BOp85(void) // BITA #
1076 tmp = arB & FetchB();
1077 ccrB &= 0xFD; // Clear oVerflow flag
1078 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1079 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1082 void BOp86(void) // LDA #
1085 ccrB &= 0xFD; // CLV
1086 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1087 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1090 void BOp88(void) // EORA #
1093 ccrB &= 0xFD; // CLV
1094 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1095 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1098 void BOp89(void) // ADCA #
1101 addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
1102 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
1103 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1104 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1105 arB = addr & 0xFF; // Set accumulator
1106 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
1107 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative
1110 void BOp8A(void) // ORA #
1113 ccrB &= 0xFD; // CLV
1114 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1115 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1118 void BOp8B(void) // ADDA #
1120 tmp = FetchB(); addr = arB + tmp;
1121 (addr > 0xFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1122 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1123 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1124 arB = addr & 0xFF; // Set accumulator
1125 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1126 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1129 void BOp8C(void) // CMPX #
1132 WORD dw = xrB - addr;
1133 (xrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1134 ((xrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
1135 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1136 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1139 void BOp8D(void) // BSR
1142 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
1143 pcrB += SignedB(tmp);
1146 void BOp8E(void) // LDX #
1149 ccrB &= 0xFD; // CLV
1150 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1151 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1154 void BOp90(void) // SUBA DP
1156 tmp = RdMemB((dprB<<8)|FetchB()); BYTE as = arB;
1158 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1159 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1160 (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1161 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1164 void BOp91(void) // CMPA DP
1166 tmp = RdMemB((dprB<<8)|FetchB());
1167 BYTE db = arB - tmp;
1168 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1169 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1170 (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1171 ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1174 void BOp92(void) // SBCA DP
1176 tmp = RdMemB((dprB<<8)|FetchB()); BYTE as = arB;
1177 arB = arB - tmp - (ccrB&0x01);
1178 (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1179 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1180 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1181 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1184 void BOp93(void) // SUBD DP
1186 addr = (dprB<<8)|FetchB(); WORD dr = (arB<<8)|brB, ds = dr;
1187 WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1189 (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1190 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1191 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1192 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1193 arB = dr>>8; brB = dr&0xFF;
1196 void BOp94(void) // ANDA DP
1198 arB &= RdMemB((dprB<<8)|FetchB());
1199 ccrB &= 0xF1; // CLV CLZ CLN
1200 if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
1201 if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
1204 void BOp95(void) // BITA DP
1206 tmp = arB & RdMemB((dprB<<8)|FetchB());
1207 ccrB &= 0xFD; // Clear oVerflow flag
1208 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1209 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1212 void BOp96(void) // LDA DP
1214 arB = RdMemB((dprB<<8)|FetchB());
1215 ccrB &= 0xF1; // CLN CLZ CLV
1216 if (arB == 0) ccrB |= 0x04; // Set Zero flag
1217 if (arB&0x80) ccrB |= 0x08; // Set Negative flag
1220 void BOp97(void) // STA DP
1222 WrMemB((dprB<<8)|FetchB(), arB);
1223 ccrB &= 0xFD; // CLV
1224 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1225 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1228 void BOp98(void) // EORA DP
1230 arB ^= RdMemB((dprB<<8)|FetchB());
1231 ccrB &= 0xFD; // CLV
1232 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1233 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1236 void BOp99(void) // ADCA DP
1238 tmp = RdMemB((dprB<<8)|FetchB());
1239 addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
1240 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
1241 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1242 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1243 arB = addr & 0xFF; // Set accumulator
1244 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
1245 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative
1248 void BOp9A(void) // ORA DP
1250 arB |= RdMemB((dprB<<8)|FetchB());
1251 ccrB &= 0xFD; // CLV
1252 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1253 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1256 void BOp9B(void) // ADDA DP
1258 tmp = RdMemB((dprB<<8)|FetchB());
1259 addr = (WORD)arB + (WORD)tmp;
1260 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1261 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1262 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1263 arB = addr & 0xFF; // Set accumulator
1264 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1265 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1268 void BOp9C(void) // CMPX DP
1270 addr = (dprB<<8)|FetchB();
1271 WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1272 WORD dw = xrB - adr2;
1273 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1274 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1275 (xrB < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1276 ((xrB^adr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
1279 void BOp9D(void) // JSR DP
1281 addr = (dprB<<8) | FetchB();
1282 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
1283 pcrB = addr; // JSR to DP location...
1286 void BOp9E(void) // LDX DP
1288 addr = (dprB<<8) | FetchB();
1289 xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
1290 ccrB &= 0xFD; // CLV
1291 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1292 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1295 void BOp9F(void) // STX DP
1297 addr = (dprB<<8) | FetchB();
1298 WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
1299 ccrB &= 0xFD; // CLV
1300 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1301 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1304 void BOpA0(void) // SUBA IDX
1306 tmp = RdMemB(DecodeIDXB(FetchB())); BYTE as = arB;
1308 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1309 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1310 (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1311 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1314 void BOpA1(void) // CMPA IDX
1316 tmp = RdMemB(DecodeIDXB(FetchB()));
1317 BYTE db = arB - tmp;
1318 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1319 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1320 (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1321 ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1324 void BOpA2(void) // SBCA IDX
1326 tmp = RdMemB(DecodeIDXB(FetchB())); BYTE as = arB;
1327 arB = arB - tmp - (ccrB&0x01);
1328 (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1329 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1330 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1331 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1334 void BOpA3(void) // SUBD IDX
1336 addr = DecodeIDXB(FetchB()); WORD dr = (arB<<8)|brB, ds = dr;
1337 WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1339 (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1340 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1341 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1342 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1343 arB = dr>>8; brB = dr&0xFF;
1346 void BOpA4(void) // ANDA IDX
1348 arB &= RdMemB(DecodeIDXB(FetchB()));
1349 ccrB &= 0xFD; // Clear oVerflow flag
1350 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1351 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1354 void BOpA5(void) // BITA IDX
1356 tmp = arB & RdMemB(DecodeIDXB(FetchB()));
1357 ccrB &= 0xFD; // Clear oVerflow flag
1358 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1359 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1362 void BOpA6(void) // LDA IDX
1364 arB = RdMemB(DecodeIDXB(FetchB()));
1365 ccrB &= 0xF1; // CLV CLZ CLN
1366 if (arB == 0) ccrB |= 0x04; // Set Zero flag
1367 if (arB&0x80) ccrB |= 0x08; // Set Negative flag
1370 void BOpA7(void) // STA IDX
1372 WrMemB(DecodeIDXB(FetchB()), arB);
1373 ccrB &= 0xF1; // CLV CLZ CLN
1374 if (arB == 0) ccrB |= 0x04; // Set Zero flag
1375 if (arB&0x80) ccrB |= 0x08; // Set Negative flag
1378 void BOpA8(void) // EORA IDX
1380 arB ^= RdMemB(DecodeIDXB(FetchB()));
1381 ccrB &= 0xFD; // CLV
1382 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1383 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1386 void BOpA9(void) // ADCA IDX
1388 tmp = RdMemB(DecodeIDXB(FetchB()));
1389 addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
1390 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1391 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1392 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1393 arB = addr & 0xFF; // Set accumulator
1394 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1395 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1398 void BOpAA(void) // ORA IDX
1400 arB |= RdMemB(DecodeIDXB(FetchB()));
1401 ccrB &= 0xFD; // CLV
1402 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1403 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1406 void BOpAB(void) // ADDA IDX
1408 tmp = RdMemB(DecodeIDXB(FetchB()));
1409 addr = (WORD)arB + (WORD)tmp;
1410 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1411 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1412 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1413 arB = addr & 0xFF; // Set accumulator
1414 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1415 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1418 void BOpAC(void) // CMPX IDX
1420 addr = DecodeIDXB(FetchB());
1421 WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1422 WORD dw = xrB - addr2;
1423 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1424 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1425 (xrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1426 ((xrB^addr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1429 void BOpAD(void) // JSR IDX
1431 addr = DecodeIDXB(FetchB());
1432 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
1433 pcrB = addr; // JSR directly to IDX ptr
1436 void BOpAE(void) // LDX IDX
1438 addr = DecodeIDXB(FetchB());
1439 xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
1440 ccrB &= 0xFD; // CLV
1441 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1442 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1445 void BOpAF(void) // STX IDX
1447 addr = DecodeIDXB(FetchB());
1448 WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
1449 ccrB &= 0xF1; // CLV CLZ CLN
1450 if (xrB == 0) ccrB |= 0x04; // Set Zero flag
1451 if (xrB&0x8000) ccrB |= 0x08; // Set Negative flag
1454 void BOpB0(void) // SUBA ABS
1456 tmp = RdMemB(FetchWB()); BYTE as = arB;
1458 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1459 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1460 (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1461 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1464 void BOpB1(void) // CMPA ABS
1466 tmp = RdMemB(FetchWB());
1467 BYTE db = arB - tmp;
1468 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1469 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1470 (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1471 ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1474 void BOpB2(void) // SBCA ABS
1476 tmp = RdMemB(FetchWB()); BYTE as = arB;
1477 arB = arB - tmp - (ccrB&0x01);
1478 (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1479 ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1480 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1481 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1484 void BOpB3(void) // SUBD ABS
1486 addr = FetchWB(); WORD dr = (arB<<8)|brB, ds = dr;
1487 WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1489 (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1490 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
1491 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1492 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1493 arB = dr>>8; brB = dr&0xFF;
1496 void BOpB4(void) // ANDA ABS
1498 arB &= RdMemB(FetchWB());
1499 ccrB &= 0xFD; // Clear oVerflow flag
1500 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1501 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1504 void BOpB5(void) // BITA ABS
1506 tmp = arB & RdMemB(FetchWB());
1507 ccrB &= 0xFD; // Clear oVerflow flag
1508 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1509 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1512 void BOpB6(void) // LDA ABS
1514 arB = RdMemB(FetchWB());
1515 ccrB &= 0xFD; // CLV
1516 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1517 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1520 void BOpB7(void) // STA ABS
1522 WrMemB(FetchWB(), arB);
1523 ccrB &= 0xFD; // CLV
1524 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1525 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1528 void BOpB8(void) // EORA ABS
1530 arB ^= RdMemB(FetchWB());
1531 ccrB &= 0xFD; // CLV
1532 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1533 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1536 void BOpB9(void) // ADCA ABS
1538 tmp = RdMemB(FetchWB());
1539 addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
1540 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1541 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1542 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1543 arB = addr; // Set accumulator
1544 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1545 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1548 void BOpBA(void) // ORA ABS
1550 arB |= RdMemB(FetchWB());
1551 ccrB &= 0xFD; // CLV
1552 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1553 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1556 void BOpBB(void) // ADDA ABS
1558 tmp = RdMemB(FetchWB());
1559 addr = (WORD)arB + (WORD)tmp;
1560 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1561 ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1562 ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1563 arB = addr & 0xFF; // Set accumulator
1564 (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1565 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1568 void BOpBC(void) // CMPX ABS
1570 addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
1571 WORD dw = xrB - addr2;
1572 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1573 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1574 (xrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1575 ((xrB^addr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1578 void BOpBD(void) // JSR ABS
1581 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
1582 pcrB = addr; // Go to absolute address (Not indir)
1585 void BOpBE(void) // LDX ABS
1588 xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
1589 ccrB &= 0xFD; // CLV
1590 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1591 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1594 void BOpBF(void) // STX ABS
1597 WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
1598 ccrB &= 0xFD; // CLV
1599 (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1600 (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1603 void BOpC0(void) // SUBB #
1605 tmp = FetchB(); BYTE bs = brB;
1607 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1608 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1609 (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1610 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1613 void BOpC1(void) // CMPB #
1616 BYTE db = brB - tmp;
1617 (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1618 ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1619 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1620 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1623 void BOpC2(void) // SBCB #
1625 tmp = FetchB(); BYTE bs = brB;
1626 brB = brB - tmp - (ccrB&0x01);
1627 (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1628 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1629 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1630 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1633 void BOpC3(void) // ADDD #
1635 addr = FetchWB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
1637 (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1639 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1640 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1641 ((ds^addr^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
1642 arB = dr>>8; brB = dr&0xFF;
1645 void BOpC4(void) // ANDB #
1648 ccrB &= 0xFD; // Clear oVerflow flag
1649 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1650 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1653 void BOpC5(void) // BITB #
1655 tmp = brB & FetchB();
1656 ccrB &= 0xF1; // CLV CLZ CLN
1657 if (tmp == 0) ccrB |= 0x04; // Set Zero flag
1658 if (tmp&0x80) ccrB |= 0x08; // Set Negative flag
1661 void BOpC6(void) // LDB #
1664 ccrB &= 0xF1; // CLV CLZ CLN
1665 if (brB == 0) ccrB |= 0x04; // Set Zero flag
1666 if (brB&0x80) ccrB |= 0x08; // Set Negative flag
1669 void BOpC8(void) // EORB #
1672 ccrB &= 0xFD; // CLV
1673 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1674 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1677 void BOpC9(void) // ADCB #
1680 addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
1681 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1682 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1683 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1684 brB = addr & 0xFF; // Set accumulator
1685 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1686 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1689 void BOpCA(void) // ORB #
1692 ccrB &= 0xFD; // CLV
1693 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1694 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1697 void BOpCB(void) // ADDB #
1699 tmp = FetchB(); addr = brB + tmp;
1700 (addr > 0xFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1701 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1702 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
1703 brB = addr & 0xFF; // Set accumulator
1704 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1705 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1708 void BOpCC(void) // LDD #
1710 arB = FetchB(); brB = FetchB();
1711 ccrB &= 0xFD; // CLV
1712 ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1713 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1716 void BOpCE(void) // LDU #
1719 ccrB &= 0xFD; // CLV
1720 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1721 (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1724 void BOpD0(void) // SUBB DP
1726 tmp = RdMemB((dprB<<8)|FetchB()); BYTE bs = brB;
1728 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1729 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1730 (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1731 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1734 void BOpD1(void) // CMPB DP
1736 tmp = RdMemB((dprB<<8)|FetchB());
1737 BYTE db = brB - tmp;
1738 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1739 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1740 (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1741 ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1744 void BOpD2(void) // SBCB DP
1746 tmp = RdMemB((dprB<<8)|FetchB()); BYTE bs = brB;
1747 brB = brB - tmp - (ccrB&0x01);
1748 (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1749 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1750 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1751 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1754 void BOpD3(void) // ADDD DP
1756 addr = (dprB<<8)|FetchB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
1757 WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
1759 (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1761 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1762 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1763 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1764 arB = dr>>8; brB = dr&0xFF;
1767 void BOpD4(void) // ANDB DP
1769 brB &= RdMemB((dprB<<8)|FetchB());
1770 ccrB &= 0xFD; // Clear oVerflow flag
1771 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1772 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1775 void BOpD5(void) // BITB DP
1777 tmp = brB & RdMemB((dprB<<8)|FetchB());
1778 ccrB &= 0xFD; // Clear oVerflow flag
1779 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1780 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1783 void BOpD6(void) // LDB DP
1785 brB = RdMemB((dprB<<8)|FetchB());
1786 ccrB &= 0xFD; // CLV
1787 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1788 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1791 void BOpD7(void) // STB DP
1793 WrMemB((dprB<<8)|FetchB(), brB);
1794 ccrB &= 0xFD; // CLV
1795 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1796 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1799 void BOpD8(void) // EORB DP
1801 brB ^= RdMemB((dprB<<8)|FetchB());
1802 ccrB &= 0xFD; // CLV
1803 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1804 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1807 void BOpD9(void) // ADCB DP
1809 tmp = RdMemB((dprB<<8)|FetchB());
1810 addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
1811 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1812 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1813 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1814 brB = addr; // Set accumulator
1815 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1816 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1819 void BOpDA(void) // ORB DP
1821 brB |= RdMemB((dprB<<8)|FetchB());
1822 ccrB &= 0xFD; // CLV
1823 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1824 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1827 void BOpDB(void) // ADDB DP
1829 tmp = RdMemB((dprB<<8)|FetchB());
1830 addr = (WORD)brB + (WORD)tmp;
1831 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1832 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1833 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1834 brB = addr & 0xFF; // Set accumulator
1835 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1836 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1839 void BOpDC(void) // LDD DP
1841 addr = (dprB<<8)|FetchB();
1842 arB = RdMemB(addr); brB = RdMemB(addr+1);
1843 ccrB &= 0xFD; // CLV
1844 ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1845 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1848 void BOpDD(void) // STD DP
1850 addr = (dprB<<8)|FetchB();
1851 WrMemB(addr, arB); WrMemB(addr+1, brB);
1852 ccrB &= 0xFD; // CLV
1853 ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1854 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1857 void BOpDE(void) // LDU DP
1859 addr = (dprB<<8)|FetchB();
1860 urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
1861 ccrB &= 0xFD; // CLV
1862 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1863 (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1866 void BOpDF(void) // STU DP
1868 addr = (dprB<<8)|FetchB();
1869 WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
1870 ccrB &= 0xFD; // CLV
1871 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1872 (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1875 void BOpE0(void) // SUBB IDX
1877 tmp = RdMemB(DecodeIDXB(FetchB())); BYTE bs = brB;
1879 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1880 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1881 (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1882 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1885 void BOpE1(void) // CMPB IDX
1887 tmp = RdMemB(DecodeIDXB(FetchB()));
1888 BYTE db = brB - tmp;
1889 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1890 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1891 (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1892 ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1895 void BOpE2(void) // SBCB IDX
1897 tmp = RdMemB(DecodeIDXB(FetchB())); BYTE bs = brB;
1898 brB = brB - tmp - (ccrB&0x01);
1899 (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1900 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1901 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1902 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1905 void BOpE3(void) // ADDD IDX
1907 addr = DecodeIDXB(FetchB()); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
1908 WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
1910 (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
1912 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1913 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1914 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1915 arB = dr>>8; brB = dr&0xFF;
1918 void BOpE4(void) // ANDB IDX
1920 brB &= RdMemB(DecodeIDXB(FetchB()));
1921 ccrB &= 0xFD; // Clear oVerflow flag
1922 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1923 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1926 void BOpE5(void) // BITB IDX
1928 tmp = brB & RdMemB(DecodeIDXB(FetchB()));
1929 ccrB &= 0xFD; // Clear oVerflow flag
1930 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1931 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1934 void BOpE6(void) // LDB IDX
1936 brB = RdMemB(DecodeIDXB(FetchB()));
1937 ccrB &= 0xFD; // CLV
1938 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1939 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1942 void BOpE7(void) // STB IDX
1944 WrMemB(DecodeIDXB(FetchB()), brB);
1945 ccrB &= 0xF1; // CLV CLZ CLN
1946 if (brB == 0) ccrB |= 0x04; // Adjust Zero flag
1947 if (brB&0x80) ccrB |= 0x08; // Adjust Negative flag
1950 void BOpE8(void) // EORB IDX
1952 brB ^= RdMemB(DecodeIDXB(FetchB()));
1953 ccrB &= 0xFD; // CLV
1954 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1955 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1958 void BOpE9(void) // ADCB IDX
1960 tmp = RdMemB(DecodeIDXB(FetchB()));
1961 addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
1962 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1963 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1964 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1965 brB = addr; // Set accumulator
1966 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1967 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1970 void BOpEA(void) // ORB IDX
1972 brB |= RdMemB(DecodeIDXB(FetchB()));
1973 ccrB &= 0xFD; // CLV
1974 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
1975 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
1978 void BOpEB(void) // ADDB IDX
1980 tmp = RdMemB(DecodeIDXB(FetchB()));
1981 addr = (WORD)brB + (WORD)tmp;
1982 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
1983 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
1984 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
1985 brB = addr; // Set accumulator
1986 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
1987 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
1990 void BOpEC(void) // LDD IDX
1992 addr = DecodeIDXB(FetchB());
1993 arB = RdMemB(addr); brB = RdMemB(addr+1);
1994 ccrB &= 0xF1; // CLV CLZ CLN
1995 if (!(arB|brB)) ccrB |= 0x04; // Adjust Zero flag
1996 if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
1999 void BOpED(void) // STD IDX
2001 addr = DecodeIDXB(FetchB());
2002 WrMemB(addr, arB); WrMemB(addr+1, brB);
2003 ccrB &= 0xF1; // CLV CLZ CLZ
2004 if (!(arB|brB)) ccrB |= 0x04; // Adjust Zero flag
2005 if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
2008 void BOpEE(void) // LDU IDX
2010 addr = DecodeIDXB(FetchB());
2011 urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
2012 ccrB &= 0xF1; // CLV CLZ CLN
2013 if (urB == 0) ccrB |= 0x04; // Set Zero flag
2014 if (urB&0x8000) ccrB |= 0x08; // Set Negative flag
2017 void BOpEF(void) // STU IDX
2019 addr = DecodeIDXB(FetchB());
2020 WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
2021 ccrB &= 0xF1; // CLV CLZ CLN
2022 if (urB == 0) ccrB |= 0x04; // Set Zero flag
2023 if (urB&0x8000) ccrB |= 0x08; // Set Negative flag
2026 void BOpF0(void) // SUBB ABS
2028 tmp = RdMemB(FetchWB()); BYTE bs = brB;
2030 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2031 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2032 (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2033 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
2035 void BOpF1(void) // CMPB ABS
2037 tmp = RdMemB(FetchWB());
2038 BYTE db = brB - tmp;
2039 (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2040 (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2041 (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2042 ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
2045 void BOpF2(void) // SBCB ABS
2047 tmp = RdMemB(FetchWB()); BYTE bs = brB;
2048 brB = brB - tmp - (ccrB&0x01);
2049 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2050 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2051 (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2052 ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
2055 void BOpF3(void) // ADDD ABS
2057 addr = FetchWB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
2058 WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
2060 (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2062 (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2063 (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2064 ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2065 arB = dr>>8; brB = dr&0xFF;
2068 void BOpF4(void) // ANDB ABS
2070 brB &= RdMemB(FetchWB());
2071 ccrB &= 0xFD; // Clear oVerflow flag
2072 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2073 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2076 void BOpF5(void) // BITB ABS
2078 tmp = brB & RdMemB(FetchWB());
2079 ccrB &= 0xFD; // Clear oVerflow flag
2080 (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2081 (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2084 void BOpF6(void) // LDB ABS
2086 brB = RdMemB(FetchWB());
2087 ccrB &= 0xFD; // CLV
2088 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2089 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2092 void BOpF7(void) // STB ABS
2094 WrMemB(FetchWB(), brB);
2095 ccrB &= 0xFD; // CLV
2096 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2097 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2100 void BOpF8(void) // EORB ABS
2102 brB ^= RdMemB(FetchWB());
2103 ccrB &= 0xFD; // CLV
2104 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2105 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2108 void BOpF9(void) // ADCB ABS
2110 tmp = RdMemB(FetchWB());
2111 addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
2112 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
2113 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
2114 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
2115 brB = addr & 0xFF; // Set accumulator
2116 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
2117 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
2120 void BOpFA(void) // ORB ABS
2122 brB |= RdMemB(FetchWB());
2123 ccrB &= 0xFD; // CLV
2124 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2125 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2128 void BOpFB(void) // ADDB ABS
2130 tmp = RdMemB(FetchWB());
2131 addr = (WORD)brB + (WORD)tmp;
2132 (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
2133 ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
2134 ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
2135 brB = addr & 0xFF; // Set accumulator
2136 (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
2137 (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
2140 void BOpFC(void) // LDD ABS
2143 arB = RdMemB(addr); brB = RdMemB(addr+1);
2144 ccrB &= 0xFD; // CLV
2145 ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2146 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2149 void BOpFD(void) // STD ABS
2152 WrMemB(addr, arB); WrMemB(addr+1, brB);
2153 ccrB &= 0xFD; // CLV
2154 ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2155 (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2158 void BOpFE(void) // LDU ABS
2161 urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
2162 ccrB &= 0xFD; // CLV
2163 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2164 (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2167 void BOpFF(void) // STU ABS
2170 WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
2171 ccrB &= 0xFD; // CLV
2172 (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2173 (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2178 // Page one opcodes' execute code
2181 void BOp1021(void) // LBRN
2186 void BOp1022(void) // LBHI
2189 if (!((ccrB&0x01)|(ccrB&0x04))) pcrB += SignedW(addr);
2192 void BOp1023(void) // LBLS
2195 if ((ccrB&0x01)|(ccrB&0x04)) pcrB += SignedW(addr);
2198 void BOp1024(void) // LBCC (LBHS)
2201 if (!(ccrB&0x01)) pcrB += SignedW(addr);
2204 void BOp1025(void) // LBCS (LBLO)
2207 if (ccrB&0x01) pcrB += SignedW(addr);
2210 void BOp1026(void) // LBNE
2213 if (!(ccrB&0x04)) pcrB += SignedW(addr);
2216 void BOp1027(void) // LBEQ
2219 if (ccrB&0x04) pcrB += SignedW(addr);
2222 void BOp1028(void) // LBVC
2225 if (!(ccrB&0x02)) pcrB += SignedW(addr);
2228 void BOp1029(void) // LBVS
2231 if (ccrB&0x02) pcrB += SignedW(addr);
2234 void BOp102A(void) // LBPL
2237 if (!(ccrB&0x08)) pcrB += SignedW(addr);
2240 void BOp102B(void) // LBMI
2243 if (ccrB&0x08) pcrB += SignedW(addr);
2246 void BOp102C(void) // LBGE
2249 if (!(((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedW(addr);
2252 void BOp102D(void) // LBLT
2255 if (((ccrB&0x08) >> 2) ^ (ccrB&0x02)) pcrB += SignedW(addr);
2258 void BOp102E(void) // LBGT
2261 if (!((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02)))) pcrB += SignedW(addr);
2264 void BOp102F(void) // LBLE
2267 if ((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedW(addr);
2270 void BOp103F(void) // SWI2 (Not yet implemented)
2274 void BOp1083(void) // CMPD #
2276 addr = FetchWB(); WORD dr = (arB<<8)|brB;
2277 WORD dw = dr - addr;
2278 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2279 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2280 (dr < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2281 ((dr^addr^dw^((WORD)ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2284 void BOp108C(void) // CMPY #
2287 WORD dw = yrB - addr;
2288 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2289 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2290 (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2291 ((yrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2294 void BOp108E(void) // LDY #
2297 ccrB &= 0xFD; // CLV
2298 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2299 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2302 void BOp1093(void) // CMPD DP
2304 WORD adr2 = (dprB<<8)|FetchB(), dr = (arB<<8)|brB;
2305 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2306 WORD dw = dr - addr;
2307 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2308 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2309 (dr < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2310 ((dr^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2313 void BOp109C(void) // CMPY DP
2315 WORD adr2 = (dprB<<8)|FetchB();
2316 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2317 WORD dw = yrB - addr;
2318 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2319 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2320 (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2321 ((yrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2324 void BOp109E(void) // LDY DP
2326 addr = (dprB<<8)|FetchB();
2327 yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2328 ccrB &= 0xFD; // CLV
2329 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2330 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2333 void BOp109F(void) // STY DP
2335 addr = (dprB<<8)|FetchB();
2336 WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
2337 ccrB &= 0xFD; // CLV
2338 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2339 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2342 void BOp10A3(void) // CMPD IDX
2344 WORD adr2 = DecodeIDXB(FetchB()), dr = (arB<<8)|brB;
2345 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2346 WORD dw = dr - addr;
2347 ccrB &= 0xF0; // CLC CLV CLZ CLN
2348 if (dr < addr) ccrB |= 0x01; // Set Carry flag
2349 if ((dr^addr^dw^(ccrB<<15))&0x8000) ccrB |= 0x02; // Set oVerflow
2350 if (dw == 0) ccrB |= 0x04; // Set Zero flag
2351 if (dw&0x8000) ccrB |= 0x08; // Set Negative flag
2354 void BOp10AC(void) // CMPY IDX
2356 WORD adr2 = DecodeIDXB(FetchB());
2357 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2358 WORD dw = yrB - addr;
2359 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2360 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2361 (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2362 (((ccrB<<15)^yrB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2365 void BOp10AE(void) // LDY IDX
2367 addr = DecodeIDXB(FetchB());
2368 yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2369 ccrB &= 0xF1; // CLV CLZ CLN
2370 if (yrB == 0) ccrB |= 0x04; // Adjust Zero flag
2371 if (yrB&0x8000) ccrB |= 0x08; // Adjust Negative flag
2374 void BOp10AF(void) // STY IDX
2376 addr = DecodeIDXB(FetchB());
2377 WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
2378 ccrB &= 0xFD; // CLV
2379 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2380 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2383 void BOp10B3(void) // CMPD ABS
2385 addr = FetchWB(); WORD dr = (arB<<8)|brB;
2386 WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
2387 WORD dw = dr - addr2;
2388 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2389 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2390 (dr < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2391 (((ccrB<<15)^dr^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2394 void BOp10BC(void) // CMPY ABS
2396 addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
2397 WORD dw = yrB - addr2;
2398 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2399 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2400 (yrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2401 (((ccrB<<15)^yrB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2404 void BOp10BE(void) // LDY ABS
2407 yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2408 ccrB &= 0xFD; // CLV
2409 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2410 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2413 void BOp10BF(void) // STY ABS
2416 WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
2417 ccrB &= 0xFD; // CLV
2418 (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2419 (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2422 void BOp10CE(void) // LDS #
2425 ccrB &= 0xFD; // CLV
2426 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2427 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2430 void BOp10DE(void) // LDS DP
2432 addr = (dprB<<8)|FetchB();
2433 srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2434 ccrB &= 0xFD; // CLV
2435 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2436 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2439 void BOp10DF(void) // STS DP
2441 addr = (dprB<<8)|FetchB();
2442 WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
2443 ccrB &= 0xFD; // CLV
2444 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2445 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2448 void BOp10EE(void) // LDS IDX
2450 addr = DecodeIDXB(FetchB());
2451 srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2452 ccrB &= 0xFD; // CLV
2453 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2454 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2457 void BOp10EF(void) // STS IDX
2459 addr = DecodeIDXB(FetchB());
2460 WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
2461 ccrB &= 0xFD; // CLV
2462 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2463 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2466 void BOp10FE(void) // LDS ABS
2469 srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
2470 ccrB &= 0xFD; // CLV
2471 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2472 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2475 void BOp10FF(void) // STS ABS
2478 WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
2479 ccrB &= 0xFD; // CLV
2480 (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2481 (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2486 // Page two opcodes' execute code
2489 void BOp113F(void) // SWI3
2493 void BOp1183(void) // CMPU #
2496 WORD dw = urB - addr;
2497 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2498 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2499 (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2500 (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2503 void BOp118C(void) // CMPS #
2506 WORD dw = srB - addr;
2507 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2508 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2509 (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2510 (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2513 void BOp1193(void) // CMPU DP
2515 WORD adr2 = (dprB<<8)|FetchB();
2516 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2517 WORD dw = urB - addr;
2518 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2519 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2520 (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2521 (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2524 void BOp119C(void) // CMPS DP
2526 WORD adr2 = (dprB<<8)|FetchB();
2527 addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
2528 WORD dw = srB - addr;
2529 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2530 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2531 (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2532 (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2535 void BOp11A3(void) // CMPU IDX
2537 WORD addr2 = DecodeIDXB(FetchB());
2538 addr = (RdMemB(addr2)<<8) | RdMemB(addr2+1);
2539 WORD dw = urB - addr;
2540 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2541 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2542 (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2543 (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2546 void BOp11AC(void) // CMPS IDX
2548 WORD addr2 = DecodeIDXB(FetchB());
2549 addr = (RdMemB(addr2)<<8) | RdMemB(addr2+1);
2550 WORD dw = srB - addr;
2551 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2552 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2553 (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2554 (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2557 void BOp11B3(void) // CMPU ABS
2559 addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
2560 WORD dw = urB - addr2;
2561 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2562 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2563 (urB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2564 (((ccrB<<15)^urB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2567 void BOp11BC(void) // CMPS ABS
2569 addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
2570 WORD dw = srB - addr2;
2571 (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
2572 (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
2573 (srB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
2574 (((ccrB<<15)^srB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
2578 void IllegalBOp(void) { iclockB++; illegalB = true; }
2581 // Initialize 6809 function adressess
2583 void Init_6809B(void)
2585 for(int i=0; i<256; i++) // Set all functions to illegal
2587 exec_op0B[i] = IllegalBOp;
2588 exec_op1B[i] = IllegalBOp;
2589 exec_op2B[i] = IllegalBOp;
2591 exec_op0B[0x00] = BOp00; exec_op0B[0x03] = BOp03; exec_op0B[0x04] = BOp04;
2592 exec_op0B[0x06] = BOp06; exec_op0B[0x07] = BOp07; exec_op0B[0x08] = BOp08;
2593 exec_op0B[0x09] = BOp09; exec_op0B[0x0A] = BOp0A; exec_op0B[0x0C] = BOp0C;
2594 exec_op0B[0x0D] = BOp0D; exec_op0B[0x0E] = BOp0E; exec_op0B[0x0F] = BOp0F;
2595 exec_op0B[0x12] = BOp12; exec_op0B[0x13] = BOp13; exec_op0B[0x16] = BOp16;
2596 exec_op0B[0x17] = BOp17; exec_op0B[0x19] = BOp19; exec_op0B[0x1A] = BOp1A;
2597 exec_op0B[0x1C] = BOp1C; exec_op0B[0x1D] = BOp1D; exec_op0B[0x1E] = BOp1E;
2598 exec_op0B[0x1F] = BOp1F; exec_op0B[0x20] = BOp20; exec_op0B[0x21] = BOp21;
2599 exec_op0B[0x22] = BOp22; exec_op0B[0x23] = BOp23; exec_op0B[0x24] = BOp24;
2600 exec_op0B[0x25] = BOp25; exec_op0B[0x26] = BOp26; exec_op0B[0x27] = BOp27;
2601 exec_op0B[0x28] = BOp28; exec_op0B[0x29] = BOp29; exec_op0B[0x2A] = BOp2A;
2602 exec_op0B[0x2B] = BOp2B; exec_op0B[0x2C] = BOp2C; exec_op0B[0x2D] = BOp2D;
2603 exec_op0B[0x2E] = BOp2E; exec_op0B[0x2F] = BOp2F; exec_op0B[0x30] = BOp30;
2604 exec_op0B[0x31] = BOp31; exec_op0B[0x32] = BOp32; exec_op0B[0x33] = BOp33;
2605 exec_op0B[0x34] = BOp34; exec_op0B[0x35] = BOp35; exec_op0B[0x36] = BOp36;
2606 exec_op0B[0x37] = BOp37; exec_op0B[0x39] = BOp39; exec_op0B[0x3A] = BOp3A;
2607 exec_op0B[0x3B] = BOp3B; exec_op0B[0x3C] = BOp3C; exec_op0B[0x3D] = BOp3D;
2608 exec_op0B[0x3E] = BOp3E; exec_op0B[0x3F] = BOp3F; exec_op0B[0x40] = BOp40;
2609 exec_op0B[0x43] = BOp43; exec_op0B[0x44] = BOp44; exec_op0B[0x46] = BOp46;
2610 exec_op0B[0x47] = BOp47; exec_op0B[0x48] = BOp48; exec_op0B[0x49] = BOp49;
2611 exec_op0B[0x4A] = BOp4A; exec_op0B[0x4C] = BOp4C; exec_op0B[0x4D] = BOp4D;
2612 exec_op0B[0x4F] = BOp4F; exec_op0B[0x50] = BOp50; exec_op0B[0x53] = BOp53;
2613 exec_op0B[0x54] = BOp54; exec_op0B[0x56] = BOp56; exec_op0B[0x57] = BOp57;
2614 exec_op0B[0x58] = BOp58; exec_op0B[0x59] = BOp59; exec_op0B[0x5A] = BOp5A;
2615 exec_op0B[0x5C] = BOp5C; exec_op0B[0x5D] = BOp5D; exec_op0B[0x5F] = BOp5F;
2616 exec_op0B[0x60] = BOp60; exec_op0B[0x63] = BOp63; exec_op0B[0x64] = BOp64;
2617 exec_op0B[0x66] = BOp66; exec_op0B[0x67] = BOp67; exec_op0B[0x68] = BOp68;
2618 exec_op0B[0x69] = BOp69; exec_op0B[0x6A] = BOp6A; exec_op0B[0x6C] = BOp6C;
2619 exec_op0B[0x6D] = BOp6D; exec_op0B[0x6E] = BOp6E; exec_op0B[0x6F] = BOp6F;
2620 exec_op0B[0x70] = BOp70; exec_op0B[0x73] = BOp73; exec_op0B[0x74] = BOp74;
2621 exec_op0B[0x76] = BOp76; exec_op0B[0x77] = BOp77; exec_op0B[0x78] = BOp78;
2622 exec_op0B[0x79] = BOp79; exec_op0B[0x7A] = BOp7A; exec_op0B[0x7C] = BOp7C;
2623 exec_op0B[0x7D] = BOp7D; exec_op0B[0x7E] = BOp7E; exec_op0B[0x7F] = BOp7F;
2624 exec_op0B[0x80] = BOp80; exec_op0B[0x81] = BOp81; exec_op0B[0x82] = BOp82;
2625 exec_op0B[0x83] = BOp83; exec_op0B[0x84] = BOp84; exec_op0B[0x85] = BOp85;
2626 exec_op0B[0x86] = BOp86; exec_op0B[0x88] = BOp88; exec_op0B[0x89] = BOp89;
2627 exec_op0B[0x8A] = BOp8A; exec_op0B[0x8B] = BOp8B; exec_op0B[0x8C] = BOp8C;
2628 exec_op0B[0x8D] = BOp8D; exec_op0B[0x8E] = BOp8E; exec_op0B[0x90] = BOp90;
2629 exec_op0B[0x91] = BOp91; exec_op0B[0x92] = BOp92; exec_op0B[0x93] = BOp93;
2630 exec_op0B[0x94] = BOp94; exec_op0B[0x95] = BOp95; exec_op0B[0x96] = BOp96;
2631 exec_op0B[0x97] = BOp97; exec_op0B[0x98] = BOp98; exec_op0B[0x99] = BOp99;
2632 exec_op0B[0x9A] = BOp9A; exec_op0B[0x9B] = BOp9B; exec_op0B[0x9C] = BOp9C;
2633 exec_op0B[0x9D] = BOp9D; exec_op0B[0x9E] = BOp9E; exec_op0B[0x9F] = BOp9F;
2634 exec_op0B[0xA0] = BOpA0; exec_op0B[0xA1] = BOpA1; exec_op0B[0xA2] = BOpA2;
2635 exec_op0B[0xA3] = BOpA3; exec_op0B[0xA4] = BOpA4; exec_op0B[0xA5] = BOpA5;
2636 exec_op0B[0xA6] = BOpA6; exec_op0B[0xA7] = BOpA7; exec_op0B[0xA8] = BOpA8;
2637 exec_op0B[0xA9] = BOpA9; exec_op0B[0xAA] = BOpAA; exec_op0B[0xAB] = BOpAB;
2638 exec_op0B[0xAC] = BOpAC; exec_op0B[0xAD] = BOpAD; exec_op0B[0xAE] = BOpAE;
2639 exec_op0B[0xAF] = BOpAF; exec_op0B[0xB0] = BOpB0; exec_op0B[0xB1] = BOpB1;
2640 exec_op0B[0xB2] = BOpB2; exec_op0B[0xB3] = BOpB3; exec_op0B[0xB4] = BOpB4;
2641 exec_op0B[0xB5] = BOpB5; exec_op0B[0xB6] = BOpB6; exec_op0B[0xB7] = BOpB7;
2642 exec_op0B[0xB8] = BOpB8; exec_op0B[0xB9] = BOpB9; exec_op0B[0xBA] = BOpBA;
2643 exec_op0B[0xBB] = BOpBB; exec_op0B[0xBC] = BOpBC; exec_op0B[0xBD] = BOpBD;
2644 exec_op0B[0xBE] = BOpBE; exec_op0B[0xBF] = BOpBF; exec_op0B[0xC0] = BOpC0;
2645 exec_op0B[0xC1] = BOpC1; exec_op0B[0xC2] = BOpC2; exec_op0B[0xC3] = BOpC3;
2646 exec_op0B[0xC4] = BOpC4; exec_op0B[0xC5] = BOpC5; exec_op0B[0xC6] = BOpC6;
2647 exec_op0B[0xC8] = BOpC8; exec_op0B[0xC9] = BOpC9; exec_op0B[0xCA] = BOpCA;
2648 exec_op0B[0xCB] = BOpCB; exec_op0B[0xCC] = BOpCC;
2649 exec_op0B[0xCE] = BOpCE; exec_op0B[0xD0] = BOpD0; exec_op0B[0xD1] = BOpD1;
2650 exec_op0B[0xD2] = BOpD2; exec_op0B[0xD3] = BOpD3; exec_op0B[0xD4] = BOpD4;
2651 exec_op0B[0xD5] = BOpD5; exec_op0B[0xD6] = BOpD6; exec_op0B[0xD7] = BOpD7;
2652 exec_op0B[0xD8] = BOpD8; exec_op0B[0xD9] = BOpD9; exec_op0B[0xDA] = BOpDA;
2653 exec_op0B[0xDB] = BOpDB; exec_op0B[0xDC] = BOpDC; exec_op0B[0xDD] = BOpDD;
2654 exec_op0B[0xDE] = BOpDE; exec_op0B[0xDF] = BOpDF; exec_op0B[0xE0] = BOpE0;
2655 exec_op0B[0xE1] = BOpE1; exec_op0B[0xE2] = BOpE2; exec_op0B[0xE3] = BOpE3;
2656 exec_op0B[0xE4] = BOpE4; exec_op0B[0xE5] = BOpE5; exec_op0B[0xE6] = BOpE6;
2657 exec_op0B[0xE7] = BOpE7; exec_op0B[0xE8] = BOpE8; exec_op0B[0xE9] = BOpE9;
2658 exec_op0B[0xEA] = BOpEA; exec_op0B[0xEB] = BOpEB; exec_op0B[0xEC] = BOpEC;
2659 exec_op0B[0xED] = BOpED; exec_op0B[0xEE] = BOpEE; exec_op0B[0xEF] = BOpEF;
2660 exec_op0B[0xF0] = BOpF0;
2661 exec_op0B[0xF1] = BOpF1; exec_op0B[0xF2] = BOpF2; exec_op0B[0xF3] = BOpF3;
2662 exec_op0B[0xF4] = BOpF4; exec_op0B[0xF5] = BOpF5; exec_op0B[0xF6] = BOpF6;
2663 exec_op0B[0xF7] = BOpF7; exec_op0B[0xF8] = BOpF8; exec_op0B[0xF9] = BOpF9;
2664 exec_op0B[0xFA] = BOpFA; exec_op0B[0xFB] = BOpFB; exec_op0B[0xFC] = BOpFC;
2665 exec_op0B[0xFD] = BOpFD; exec_op0B[0xFE] = BOpFE; exec_op0B[0xFF] = BOpFF;
2667 exec_op1B[0x21] = BOp1021; exec_op1B[0x22] = BOp1022; exec_op1B[0x23] = BOp1023;
2668 exec_op1B[0x24] = BOp1024; exec_op1B[0x25] = BOp1025; exec_op1B[0x26] = BOp1026;
2669 exec_op1B[0x27] = BOp1027; exec_op1B[0x28] = BOp1028; exec_op1B[0x29] = BOp1029;
2670 exec_op1B[0x2A] = BOp102A; exec_op1B[0x2B] = BOp102B; exec_op1B[0x2C] = BOp102C;
2671 exec_op1B[0x2D] = BOp102D; exec_op1B[0x2E] = BOp102E; exec_op1B[0x2F] = BOp102F;
2672 exec_op1B[0x3F] = BOp103F; exec_op1B[0x83] = BOp1083; exec_op1B[0x8C] = BOp108C;
2673 exec_op1B[0x8E] = BOp108E; exec_op1B[0x93] = BOp1093; exec_op1B[0x9C] = BOp109C;
2674 exec_op1B[0x9E] = BOp109E; exec_op1B[0x9F] = BOp109F; exec_op1B[0xA3] = BOp10A3;
2675 exec_op1B[0xAC] = BOp10AC; exec_op1B[0xAE] = BOp10AE; exec_op1B[0xAF] = BOp10AF;
2676 exec_op1B[0xB3] = BOp10B3; exec_op1B[0xBC] = BOp10BC; exec_op1B[0xBE] = BOp10BE;
2677 exec_op1B[0xBF] = BOp10BF; exec_op1B[0xCE] = BOp10CE; exec_op1B[0xDE] = BOp10DE;
2678 exec_op1B[0xDF] = BOp10DF; exec_op1B[0xEE] = BOp10EE; exec_op1B[0xEF] = BOp10EF;
2679 exec_op1B[0xFE] = BOp10FE; exec_op1B[0xFF] = BOp10FF;
2681 exec_op2B[0x3F] = BOp113F; exec_op2B[0x83] = BOp1183; exec_op2B[0x8C] = BOp118C;
2682 exec_op2B[0x93] = BOp1193; exec_op2B[0x9C] = BOp119C; exec_op2B[0xA3] = BOp11A3;
2683 exec_op2B[0xAC] = BOp11AC; exec_op2B[0xB3] = BOp11B3; exec_op2B[0xBC] = BOp11BC;
2687 // Function to execute one 6809 instruction
2689 void Execute_6809B(long num_of_instrs_to_exec)
2691 for(long i=0; i<num_of_instrs_to_exec; i++)
2693 BYTE opcode = FetchB(); // Get the opcode
2694 if (opcode == 0x10) { exec_op1B[FetchB()](); goto EXE_NEXT; }
2695 if (opcode == 0x11) { exec_op2B[FetchB()](); goto EXE_NEXT; }
2696 exec_op0B[opcode]();
2699 if (iclockB > 24550) // Slightly faster IRQs for SUB processor
2702 if (!(ccrB&0x10) /*&& (!inter)*/) // Process an interrupt?
2704 ccrB |= 0x80; // Set E
2705 WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8); // Save all regs...
2706 WrMemB(--srB, urB&0xFF); WrMemB(--srB, urB>>8);
2707 WrMemB(--srB, yrB&0xFF); WrMemB(--srB, yrB>>8);
2708 WrMemB(--srB, xrB&0xFF); WrMemB(--srB, xrB>>8);
2709 WrMemB(--srB, dprB); WrMemB(--srB, brB);
2710 WrMemB(--srB, arB); WrMemB(--srB, ccrB);
2711 ccrB |= 0x50; // Set F,I
2712 pcrB = (RdMemB(0xFFF8)<<8) | RdMemB(0xFFF9); // And do it!