2 // RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
3 // AMODE.C - DSP 56001 Addressing Modes
4 // Copyright (C) 199x Landon Dyer, 2011-2020 Reboot and Friends
5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
6 // Source utilised with the kind permission of Landon Dyer
9 #include "dsp56k_amode.h"
23 // Address-mode information
24 //int nmodes; // Number of addr'ing modes found
25 int dsp_am0; // Addressing mode
26 int dsp_a0reg; // Register
27 TOKEN dsp_a0expr[EXPRSIZE]; // Expression
28 uint64_t dsp_a0exval; // Expression's value
29 WORD dsp_a0exattr; // Expression's attribute
30 LONG dsp_a0memspace; // Addressing mode's memory space (P, X, Y)
31 SYM * dsp_a0esym; // External symbol involved in expr
33 int dsp_am1; // Addressing mode
34 int dsp_a1reg; // Register
35 TOKEN dsp_a1expr[EXPRSIZE]; // Expression
36 uint64_t dsp_a1exval; // Expression's value
37 WORD dsp_a1exattr; // Expression's attribute
38 LONG dsp_a1memspace; // Addressing mode's memory space (P, X, Y)
39 SYM * dsp_a1esym; // External symbol involved in expr
41 int dsp_am2; // Addressing mode
42 int dsp_a2reg; // Register
43 TOKEN dsp_a2expr[EXPRSIZE]; // Expression
44 uint64_t dsp_a2exval; // Expression's value
45 WORD dsp_a2exattr; // Expression's attribute
46 SYM * dsp_a2esym; // External symbol involved in expr
48 int dsp_am3; // Addressing mode
49 int dsp_a3reg; // Register
50 TOKEN dsp_a3expr[EXPRSIZE]; // Expression
51 uint64_t dsp_a3exval; // Expression's value
52 WORD dsp_a3exattr; // Expression's attribute
53 SYM * dsp_a3esym; // External symbol involved in expr
55 TOKEN dspImmedEXPR[EXPRSIZE]; // Expression
56 uint64_t dspImmedEXVAL; // Expression's value
57 WORD dspImmedEXATTR; // Expression's attribute
58 SYM * dspImmedESYM; // External symbol involved in expr
59 int deposit_extra_ea; // Optional effective address extension
60 TOKEN dspaaEXPR[EXPRSIZE]; // Expression
61 uint64_t dspaaEXVAL; // Expression's value
62 WORD dspaaEXATTR; // Expression's attribute
63 SYM * dspaaESYM; // External symbol involved in expr
65 LONG dsp_a0perspace; // Peripheral space (X, Y - used in movep)
66 LONG dsp_a1perspace; // Peripheral space (X, Y - used in movep)
68 int dsp_k; // Multiplications sign
70 static inline LONG checkea(const uint32_t termchar, const int strings);
72 // ea checking error strings put into a table because I'm not sure there's an easy way to do otherwise
73 // (the messages start getting differerent in many places so it will get awkward to code those in)
74 // (I'd rather burn some RAM in order to have more helpful error messages than the other way round)
81 const char *ea_errors[][12] = {
84 "unrecognised X: parallel move syntax: expected '(' after 'X:-'", // 0
85 "unrecognised X: parallel move syntax: expected ')' after 'X:-(Rn'", // 1
86 "unrecognised X: parallel move syntax: expected R0-R7 after 'X:-('", // 2
87 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn+'", // 3
88 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn+Nn)'", // 4
89 "unrecognised X: parallel move syntax: expected ')' after 'X:(Rn+Nn'", // 5
90 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn)+Nn'", // 6
91 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn)+'", // 7
92 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn)-Nn'", // 8
93 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn)-'", // 9
94 "unrecognised X: parallel move syntax: expected '+', '-' or ',' after 'X:(Rn)'", // 10
95 "unrecognised X: parallel move syntax: expected '+' or ')' after 'X:(Rn'", // 11
99 "unrecognised Y: parallel move syntax: expected '(' after 'Y:-'", // 0
100 "unrecognised Y: parallel move syntax: expected ')' after 'Y:-(Rn'", // 1
101 "unrecognised Y: parallel move syntax: expected R0-R7 after 'Y:-('", // 2
102 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn+'", // 3
103 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn+Nn)'", // 4
104 "unrecognised Y: parallel move syntax: expected ')' after 'Y:(Rn+Nn'", // 5
105 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn)+Nn'", // 6
106 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn)+'", // 7
107 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn)-Nn'", // 8
108 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn)-'", // 9
109 "unrecognised Y: parallel move syntax: expected '+', '-' or ',' after 'Y:(Rn)'", // 10
110 "unrecognised Y: parallel move syntax: expected '+' or ')' after 'Y:(Rn'", // 11
114 "unrecognised L: parallel move syntax: expected '(' after 'L:-'", // 0
115 "unrecognised L: parallel move syntax: expected ')' after 'L:-(Rn'", // 1
116 "unrecognised L: parallel move syntax: expected R0-R7 after 'L:-('", // 2
117 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn+'", // 3
118 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn+Nn)'", // 4
119 "unrecognised L: parallel move syntax: expected ')' after 'L:(Rn+Nn'", // 5
120 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn)+Nn'", // 6
121 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn)+'", // 7
122 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn)-Nn'", // 8
123 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn)-'", // 9
124 "unrecognised L: parallel move syntax: expected '+', '-' or ',' after 'L:(Rn)'", // 10
125 "unrecognised L: parallel move syntax: expected '+' or ')' after 'L:(Rn'", // 11
129 "unrecognised P: effective address syntax: expected '(' after 'P:-'", // 0
130 "unrecognised P: effective address syntax: expected ')' after 'P:-(Rn'", // 1
131 "unrecognised P: effective address syntax: expected R0-R7 after 'P:-('", // 2
132 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn+'", // 3
133 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn+Nn)'", // 4
134 "unrecognised P: effective address syntax: expected ')' after 'P:(Rn+Nn'", // 5
135 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn)+Nn'", // 6
136 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn)+'", // 7
137 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn)-Nn'", // 8
138 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn)-'", // 9
139 "unrecognised P: effective address syntax: expected '+', '-' or ',' after 'P:(Rn)'", // 10
140 "unrecognised P: effective address syntax: expected '+' or ')' after 'P:(Rn'", // 11
152 // Parse a single addressing mode
154 static inline int dsp_parmode(int *am, int *areg, TOKEN * AnEXPR, uint64_t * AnEXVAL, WORD * AnEXATTR, SYM ** AnESYM, LONG *memspace, LONG *perspace, const int operand)
156 if (*tok == KW_A || *tok == KW_B)
162 else if (*tok == '#')
168 // Immediate Short Addressing Mode Force Operator
170 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
173 if (*AnEXVAL > 0xFFF && *AnEXVAL < -4096)
174 return error("immediate short addressing mode forced but address is bigger than $FFF");
176 if ((int32_t)*AnEXVAL <= 0xFF && (int32_t)*AnEXVAL > -0x100)
185 else if (*tok == '>')
187 // Immediate Long Addressing Mode Force Operator
190 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
193 if ((int32_t)*AnEXVAL > 0xFFFFFF || (int32_t)*AnEXVAL < -0xFFFFFF)
194 return error("long immediate is bigger than $FFFFFF");
200 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
203 if (*AnEXATTR & DEFINED)
205 if ((int32_t)*AnEXVAL < 0x100 && (int32_t)*AnEXVAL >= -0x100)
210 else if (*AnEXVAL < 0x1000)
217 // We have no clue what size our immediate will be
218 // so we have to assume the worst
224 else if (*tok >= KW_X0 && *tok <= KW_Y1)
230 else if (*tok == KW_X && *(tok + 1) == ':')
234 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
236 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
239 if (*AnEXATTR & DEFINED)
241 if (*AnEXVAL > 0xFFFFFF)
242 return error("long address is bigger than $FFFFFF");
244 *memspace = 0 << 6; // Mark we're on X memory space
246 // Check if value is between $FFC0 and $FFFF, AKA X:pp
247 uint32_t temp = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
249 if ((temp >= 0xFFFFFFC0 /* Check for 32bit sign extended number */
250 && ((int32_t)*AnEXVAL < 0)) /* Check if 32bit signed number is negative*/
251 || (*AnEXVAL < 0xFFFF && *AnEXVAL >= 0x8000)) /* Check if 16bit number is negative*/
255 *memspace = 0 << 6; // Mark we're on X memory space
256 *perspace = 0 << 16; // Mark we're on X peripheral space
257 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
261 // If the symbol/expression is defined then check for valid range.
262 // Otherwise the value had better fit or Fixups will bark!
276 *memspace = 0 << 6; // Mark we're on X memory space
283 else if (*tok == '<')
286 // Short Addressing Mode Force Operator in the case of '<'
289 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
292 // If the symbol/expression is defined then check for valid range.
293 // Otherwise the value had better fit or Fixups will bark!
294 if (*AnEXATTR & DEFINED)
297 return error("short addressing mode forced but address is bigger than $3F");
301 // Mark it as a fixup
302 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
306 *memspace = 0 << 6; // Mark we're on X memory space
307 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
310 else if (*tok == '>')
312 // Long Addressing Mode Force Operator
315 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
317 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
320 if (*AnEXATTR&DEFINED)
322 if (*AnEXVAL > 0xFFFFFF)
323 return error("long address is bigger than $FFFFFF");
325 *memspace = 0 << 6; // Mark we're on X memory space
332 *memspace = 0 << 6; // Mark we're on X memory space
339 else if (*tok == SHL) // '<<'
341 // I/O Short Addressing Mode Force Operator
345 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
348 // If the symbol/expression is defined then check for valid range.
349 // Otherwise the value had better fit or Fixups will bark!
350 if (*AnEXATTR & DEFINED)
352 *AnEXVAL = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
354 if (*AnEXVAL < 0xFFFFFFC0)
355 return error("I/O Short Addressing Mode addresses must be between $FFC0 and $FFFF");
359 *memspace = 0 << 6; // Mark we're on X memory space
360 *perspace = 0 << 16; // Mark we're on X peripheral space
361 *areg = *AnEXVAL & 0x3f; // Since this is only going to get used in dsp_ea_imm5...
365 if ((*areg = checkea(0, X_ERRORS)) != ERROR)
367 // TODO: what if we need M_DSPAA here????
368 *memspace = 0 << 6; // Mark we're on X memory space
375 else if (*tok == KW_Y && *(tok + 1) == ':')
379 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
381 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
384 if (*AnEXVAL > 0xFFFFFF)
385 return error("long address is bigger than $FFFFFF");
387 *memspace = 1 << 6; // Mark we're on Y memory space
389 // Check if value is between $ffc0 and $ffff, AKA Y:pp
390 uint32_t temp = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
392 if ((temp >= 0xFFFFFFC0 /* Check for 32bit sign extended number */
393 && ((int32_t)*AnEXVAL < 0)) /* Check if 32bit signed number is negative*/
394 || (*AnEXVAL < 0xFFFF && *AnEXVAL >= 0x8000)) /* Check if 16bit number is negative*/
398 *perspace = 1 << 16; // Mark we're on X peripheral space
399 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
403 // If the symbol/expression is defined then check for valid range.
404 // Otherwise the value had better fit or Fixups will bark!
405 if (*AnEXATTR & DEFINED)
425 else if (*tok == '<')
428 // Short Addressing Mode Force Operator in the case of '<'
431 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
434 // If the symbol/expression is defined then check for valid range.
435 // Otherwise the value had better fit or Fixups will bark!
436 if (*AnEXATTR & DEFINED)
440 warn("short addressing mode forced but address is bigger than $3F - switching to long");
442 *memspace = 1 << 6; // Mark we're on Y memory space
449 // Mark it as a fixup
450 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
454 *memspace = 1 << 6; // Mark we're on Y memory space
455 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
458 else if (*tok == '>')
460 // Long Addressing Mode Force Operator
463 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
465 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
468 if (*AnEXATTR&DEFINED)
470 if (*AnEXVAL > 0xFFFFFF)
471 return error("long address is bigger than $FFFFFF");
473 *memspace = 1 << 6; // Mark we're on Y memory space
481 *memspace = 1 << 6; // Mark we're on Y memory space
488 else if (*tok == SHL) // '<<'
490 // I/O Short Addressing Mode Force Operator
494 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
497 // If the symbol/expression is defined then check for valid range.
498 // Otherwise the value had better fit or Fixups will bark!
499 if (*AnEXATTR & DEFINED)
501 *AnEXVAL = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
503 if (*AnEXVAL < 0xFFFFFFC0)
504 return error("I/O Short Addressing Mode addresses must be between $FFE0 and $1F");
508 *memspace = 1 << 6; // Mark we're on Y memory space
509 *perspace = 1 << 16; // Mark we're on Y peripheral space
510 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
514 if ((*areg = checkea(0, X_ERRORS)) != ERROR)
516 *memspace = 1 << 6; // Mark we're on Y memory space
522 // TODO: add absolute address checks
524 else if ((*tok >= KW_X) && (*tok <= KW_Y))
530 else if ((*tok >= KW_M0) && (*tok <= KW_M7))
533 *areg = (*tok++) & 7;
536 else if ((*tok >= KW_R0) && (*tok <= KW_R7))
539 *areg = (*tok++) - KW_R0;
542 else if ((*tok >= KW_N0) && (*tok <= KW_N7))
545 *areg = (*tok++) & 7;
548 else if ((*tok == KW_A0) || (*tok == KW_A1) || (*tok == KW_B0)
555 else if ((*tok == KW_A2) || (*tok == KW_B2))
561 else if ((*tok == '-') && (*(tok + 1) == KW_X0 || *(tok + 1) == KW_X1 || *(tok + 1) == KW_Y0 || *(tok + 1) == KW_Y1))
563 // '-X0', '-Y0', '-X1' or '-Y1', used in multiplications
566 // Check to see if this is the first operand
568 return error("-x0/-x1/-y0/-y1 only allowed in the first operand");
575 else if (*tok == '+' && (*(tok + 1) == KW_X0 || *(tok + 1) == KW_X1 || *(tok + 1) == KW_Y0 || *(tok + 1) == KW_Y1))
577 // '+X0', '+Y0', '+X1' or '+Y1', used in multiplications
580 // Check to see if this is the first operand
582 return error("+x0/+x1/+y0/+y1 only allowed in the first operand");
589 else if (*tok == '(' || *tok == '-')
591 // Could be either an expression or ea mode
592 if (*tok + 1 == SYMBOL)
596 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
603 if ((*areg = checkea(0, P_ERRORS)) != ERROR)
611 // TODO: add absolute address checks
612 return error("internal assembler error: parmode checking for '(' and '-' does not have absolute address checks yet!");
614 else if (*tok == KW_P && *(tok + 1) == ':')
618 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
621 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
624 if (*AnEXVAL > 0xFFFFFF)
625 return error("long address is bigger than $FFFFFF");
634 *areg = (int)*AnEXVAL; // Lame, but what the hell
640 else if (*tok == '<')
643 // Short Addressing Mode Force Operator in the case of '<'
646 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
650 return error("short addressing mode forced but address is bigger than $3F");
653 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
656 else if (*tok == '>')
658 // Long Addressing Mode Force Operator
661 // Immediate Short Addressing Mode Force Operator
662 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
665 if (*AnEXATTR & DEFINED)
667 if (*AnEXVAL > 0xFFFFFF)
668 return error("long address is bigger than $FFFFFF");
676 if ((*areg = checkea(0, P_ERRORS)) != ERROR)
684 else if (*tok == SHL)
686 // I/O Short Addressing Mode Force Operator
689 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
692 if (*AnEXVAL > 0xFFF)
693 return error("I/O short addressing mode forced but address is bigger than $FFF");
698 else if (*tok == '<')
700 // Short Addressing Mode Force Operator
703 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
706 if (*AnEXATTR & DEFINED)
708 if (*AnEXVAL > 0xFFF)
709 return error("short addressing mode forced but address is bigger than $FFF");
715 else if (*tok == '>')
717 // Long Addressing Mode Force Operator
720 // Immediate Short Addressing Mode Force Operator
721 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
724 if (*AnEXATTR & DEFINED)
726 if (*AnEXVAL > 0xFFFFFF)
727 return error("long address is bigger than $FFFFFF");
734 else if (*tok == KW_PC || *tok == KW_CCR || *tok == KW_SR || *tok == KW_SP || (*tok >= KW_MR&&*tok <= KW_SS))
743 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
746 // We'll store M_DSPEA_ABS in areg and if we have
747 // any extra info, it'll go in am
748 if (*AnEXATTR & DEFINED)
752 if (*AnEXVAL < 0x1000)
754 else if (*AnEXVAL < 0x10000)
756 else if (*AnEXVAL < 0x1000000)
759 return error("address must be smaller than $1000000");
765 // Well, we have no opinion on the expression's size, so let's assume the worst
772 return error("internal assembler error: Please report this error message: 'reached the end of dsp_parmode' with the line of code that caused it. Thanks, and sorry for the inconvenience"); // Something bad happened
777 // Parse all addressing modes except parallel moves
779 int dsp_amode(int maxea)
782 // Initialize global return values
783 nmodes = dsp_a0reg = dsp_a1reg = 0;
784 dsp_am0 = dsp_am1 = M_AM_NONE;
785 dsp_a0expr[0] = dsp_a1expr[0] = ENDEXPR;
788 dsp_a0exattr = dsp_a1exattr = 0;
789 dsp_a0esym = dsp_a1esym = (SYM *)NULL;
790 dsp_a0memspace = dsp_a1memspace = -1;
791 dsp_a0perspace = dsp_a1perspace = -1;
794 // If at EOL, then no addr modes at all
798 if (dsp_parmode(&dsp_am0, &dsp_a0reg, dsp_a0expr, &dsp_a0exval, &dsp_a0exattr, &dsp_a0esym, &dsp_a0memspace, &dsp_a0perspace, 0) == ERROR)
802 // If caller wants only one mode, return just one (ignore comma);
803 // If there is no second addressing mode (no comma), then return just one anyway.
809 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
817 // Parse second addressing mode
818 if (dsp_parmode(&dsp_am1, &dsp_a1reg, dsp_a1expr, &dsp_a1exval, &dsp_a1exattr, &dsp_a1esym, &dsp_a1memspace, &dsp_a1perspace, 1) == ERROR)
821 if (maxea == 2 || *tok == EOL)
824 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
832 // Only MAC-like or jsset/clr/tst/chg instructions here
834 if (dsp_parmode(&dsp_am2, &dsp_a2reg, dsp_a2expr, &dsp_a2exval, &dsp_a2exattr, &dsp_a2esym, &dummy, &dummy, 2) == ERROR)
839 return error(extra_stuff);
845 // Only Tcc instructions here, and then only those that accept 4 operands
847 if (dsp_parmode(&dsp_am2, &dsp_a2reg, dsp_a2expr, &dsp_a2exval, &dsp_a2exattr, &dsp_a2esym, &dummy, &dummy, 2) == ERROR)
851 return error("expected 4 parameters");
853 if (dsp_parmode(&dsp_am3, &dsp_a3reg, dsp_a3expr, &dsp_a3exval, &dsp_a3exattr, &dsp_a3esym, &dummy, &dummy, 3) == ERROR)
859 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
866 // Tcc instructions do not support parallel moves, so any remaining tokens are garbage
867 return error(extra_stuff);
870 return error("internal assembler error: Please report this error message: 'reached the end of dsp_amode' with the line of code that caused it. Thanks, and sorry for the inconvenience"); //Something bad happened
875 // Helper function which gives us the encoding of a DSP register
877 static inline int SDreg(int reg)
879 if (reg >= KW_X0 && reg <= KW_N7)
881 else if (reg >= KW_A0&® <= KW_A2)
882 return (8 >> (reg & 7)) | 8;
883 else //if (reg>=KW_R0&®<=KW_R7)
884 return reg - KW_R0 + 16;
885 // Handy map for the above:
886 // (values are of course taken from keytab)
887 // Register | Value | Return value
920 // Check for X:Y: parallel mode syntax
922 static inline LONG check_x_y(LONG ea1, LONG S1)
925 LONG eax_temp, eay_temp;
926 LONG D1, D2, S2, ea2;
928 LONG w = 1 << 7; // S1=0, D1=1<<14
930 if ((ea1 & 0x38) == DSP_EA_POSTINC || (ea1 & 0x38) == DSP_EA_POSTINC1 ||
931 (ea1 & 0x38) == DSP_EA_POSTDEC1 || (ea1 & 0x38) == DSP_EA_NOUPD)
935 case DSP_EA_POSTINC: ea1 = (ea1 & (~0x38)) | 0x8; break;
936 case DSP_EA_POSTINC1: ea1 = (ea1 & (~0x38)) | 0x18; break;
937 case DSP_EA_POSTDEC1: ea1 = (ea1 & (~0x38)) | 0x10; break;
938 case DSP_EA_NOUPD: ea1 = (ea1 & (~0x38)) | 0x00; break;
943 // 'X:eax,D1 Y:eay,D2', 'X:eax,D1 S2,Y:eay'
945 switch (K_D1 = *tok++)
947 case KW_X0: D1 = 0 << 10; break;
948 case KW_X1: D1 = 1 << 10; break;
949 case KW_A: D1 = 2 << 10; break;
950 case KW_B: D1 = 3 << 10; break;
951 default: return error("unrecognised X:Y: parallel move syntax: expected x0, x1, a or b after 'X:eax,'");
956 // 'S1,X:eax Y:eay,D2' 'S1,X:eax S2,Y:eay'
961 case 4: D1 = 0 << 10; break;
962 case 5: D1 = 1 << 10; break;
963 case 14: D1 = 2 << 10; break;
964 case 15: D1 = 3 << 10; break;
965 default: return error("unrecognised X:Y: parallel move syntax: S1 can only be x0, x1, a or b in 'S1,X:eax'");
972 // 'X:eax,D1 Y:eay,D2' 'S1,X:eax Y:eay,D2'
974 return error("unrecognised X:Y: parallel move syntax: expected ':' after 'X:ea,D1/S1,X:ea Y'");
978 if (*tok >= KW_R0 && *tok <= KW_R7)
980 ea2 = (*tok++ - KW_R0);
982 if (((ea1 & 7) < 4 && ea2 < 4) || ((ea1 & 7) >= 4 && ea2 > 4))
983 return error("unrecognised X:Y: parallel move syntax: eax and eay register banks must be different in 'X:ea,D1/S1,X:ea Y:eay,D2'");
986 return error("unrecognised X:Y: parallel move syntax: expected 'Rn' after 'X:ea,D1/S1,X:ea Y:('");
988 // If eax register is r0-r3 then eay register is r4-r7.
989 // Encode that to 2 bits (i.e. eay value is 0-3)
990 eax_temp = (ea2 & 3) << 5; // Store register temporarily
993 return error("unrecognised X:Y: parallel move syntax: expected ')' after 'X:ea,D1/S1,X:ea Y:(Rn'");
1005 else if (*tok >= KW_N0 && *tok <= KW_N7)
1008 if ((*tok++ & 7) != ea2)
1009 return error("unrecognised X:Y: parallel move syntax(Same register number expected for Rn, Nn in 'X:ea,D1/S1,X:ea Y:(Rn)+Nn,D')");
1014 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:(Rn)+Nn'");
1017 return error("unrecognised X:Y: parallel move syntax: expected ',' or 'Nn' after 'X:ea,D1/S1,X:ea Y:(Rn)+'");
1020 else if (*tok == '-')
1027 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:(Rn)-'");
1029 else if (*tok++ == ',')
1035 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:eay'");
1037 ea2 |= eax_temp; // OR eay back from temp
1039 switch (K_D2 = *tok++)
1041 case KW_Y0: D2 = 0 << 8; break;
1042 case KW_Y1: D2 = 1 << 8; break;
1043 case KW_A: D2 = 2 << 8; break;
1044 case KW_B: D2 = 3 << 8; break;
1045 default: return error("unrecognised X:Y: parallel move syntax: expected y0, y1, a or b after 'X:ea,D1/S1,X:ea Y:eay,'");
1049 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea Y:eay,D'");
1053 return error("unrecognised X:Y: parallel move syntax: D1 and D2 cannot be the same in 'X:ea,D1 Y:eay,D2'");
1055 inst = B16(11000000, 00000000) | w;
1056 inst |= ea1 | D1 | ea2 | D2;
1060 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' after 'X:ea,D1/S1,X:ea Y:'");
1062 else if (*tok == KW_Y0 || *tok == KW_Y1 || *tok == KW_A || *tok == KW_B)
1064 // 'X:eax,D1 S2,Y:eay' 'S1,X:eax1 S2,Y:eay'
1067 case KW_Y0: S2 = 0 << 8; break;
1068 case KW_Y1: S2 = 1 << 8; break;
1069 case KW_A: S2 = 2 << 8; break;
1070 case KW_B: S2 = 3 << 8; break;
1071 default: return error("unrecognised X:Y: parallel move syntax: expected y0, y1, a or b after 'X:ea,D1/S1,X:ea Y:eay,'");
1075 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea S2'");
1079 // 'X:eax,D1 Y:eay,D2' 'S1,X:eax Y:eay,D2'
1081 return error("unrecognised X:Y: parallel move syntax: expected ':' after 'X:ea,D1/S1,X:ea Y'");
1085 if (*tok >= KW_R0 && *tok <= KW_R7)
1087 ea2 = (*tok++ - KW_R0);
1089 if (((ea1 & 7) < 4 && ea2 < 4) || ((ea1 & 7) >= 4 && ea2 > 4))
1090 return error("unrecognised X:Y: parallel move syntax: eax and eay register banks must be different in 'X:ea,D1/S1,X:ea S2,Y:eay'");
1093 return error("unrecognised X:Y: parallel move syntax: expected 'Rn' after 'X:ea,D1/S1,X:ea S2,Y:('");
1094 // If eax register is r0-r3 then eay register is r4-r7.
1095 // Encode that to 2 bits (i.e. eay value is 0-3)
1096 eay_temp = (ea2 & 3) << 5; //Store register temporarily
1099 return error("unrecognised X:Y: parallel move syntax: expected ')' after 'X:ea,D1/S1,X:ea S2,Y:(Rn'");
1108 else if (*tok >= KW_N0 && *tok <= KW_N7)
1111 if ((*tok++ & 7) != ea2)
1112 return error("unrecognised X:Y: parallel move syntax(Same register number expected for Rn, Nn in 'X:ea,D1/S1,X:ea S2,Y:(Rn)+Nn')");
1117 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:(Rn)+Nn'");
1120 return error("unrecognised X:Y: parallel move syntax: expected ',' or 'Nn' after 'X:ea,D1/S1,X:ea S2,Y:(Rn)+'");
1123 else if (*tok == '-')
1129 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:(Rn)-'");
1131 else if (*tok == EOL)
1137 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:eay'");
1139 ea2 |= eay_temp; //OR eay back from temp
1141 inst = B16(10000000, 00000000) | w;
1142 inst |= (ea1 & 0x1f) | D1 | S2 | ea2;
1146 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' after 'X:ea,D1/S1,X:ea Y:'");
1149 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' in 'X:ea,D1/S1,X:ea'");
1152 return error("unrecognised X:Y: or X:R parallel move syntax: expected Y:, A or B after 'X:ea,D1/S1,X:ea S2,'");
1155 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' in 'X:ea,D1/S1,X:ea'");
1159 // Parse X: addressing space parallel moves
1161 static inline LONG parse_x(const int W, LONG inst, const LONG S1, const int check_for_x_y)
1163 int immreg; // Immediate register destination
1164 LONG S2, D1, D2; // Source and Destinations
1165 LONG ea1; // ea bitfields
1166 uint32_t termchar = ','; // Termination character for ea checks
1167 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1168 ea1 = -1; // initialise e1 (useful for some code paths)
1175 if (tok[1] == CONST || tok[1] == FCONST)
1178 dspImmedEXVAL = *tok++;
1182 // This could be either -(Rn), -aa or -ea. Check for immediate first
1183 if (tok[1] == SYMBOL)
1185 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1190 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B', 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1191 if (*tok == KW_X0 && tok[1] == ',' && tok[2] == KW_A)
1194 if (ea1 == DSP_EA_ABS)
1195 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1198 return error("unrecognised X:R parallel move syntax: S1 can only be a in 'a,X:ea x0,a'");
1201 return error("unrecognised X:R parallel move syntax: absolute address not allowed in 'a,X:ea x0,a'");
1203 if (ea1 == B8(00110100))
1204 return error("unrecognised X:R parallel move syntax: immediate data not allowed in 'a,X:ea x0,a'");
1206 inst = B16(00001000, 00000000) | ea1 | (0 << 8);
1209 else if (*tok == KW_X0 && tok[1] == ',' && tok[2] == KW_B)
1212 if (ea1 == DSP_EA_ABS)
1213 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1216 return error("unrecognised X:R parallel move syntax: S1 can only be b in 'b,X:ea x0,b'");
1219 return error("unrecognised X:R parallel move syntax: absolute address not allowed in 'b,X:ea x0,b'");
1221 if (ea1 == B8(00110100))
1222 return error("unrecognised X:R parallel move syntax: immediate data not allowed in 'b,X:ea x0,b'");
1224 inst = B16(00001001, 00000000) | ea1 | (1 << 8);
1227 else if (*tok == KW_A || *tok == KW_B)
1229 // 'S1,X:ea S2,D2', 'S1,X:eax S2,Y:eay'
1232 case 4: D1 = 0 << 10; break;
1233 case 5: D1 = 1 << 10; break;
1234 case 14: D1 = 2 << 10; break;
1235 case 15: D1 = 3 << 10; break;
1236 default: return error("unrecognised X:R parallel move syntax: S1 can only be x0, x1, a or b in 'S1,X:ea S2,D2'");
1239 if (tok[1] == ',' && tok[2] == KW_Y)
1241 // 'S1,X:eax S2,Y:eay'
1242 return check_x_y(ea1, S1);
1246 if (ea1 == DSP_EA_ABS)
1247 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1251 case KW_A: S2 = 0 << 9; break;
1252 case KW_B: S2 = 1 << 9; break;
1253 default: return error("unrecognised X:R parallel move syntax: expected a or b after 'S1,X:eax'");
1257 return error("unrecognised X:R parallel move syntax: expected ',' after 'S1,X:eax S2'");
1259 if (*tok == KW_Y0 || *tok == KW_Y1)
1261 if (*tok++ == KW_Y0)
1267 return error("unrecognised X:R parallel move syntax: unexpected text after 'X:eax,D1 S2,S2'");
1269 inst = B16(00010000, 00000000) | (0 << 7);
1270 inst |= ea1 | D1 | S2 | D2;
1274 return error("unrecognised X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1 S2,'");
1276 else if (*tok == KW_Y)
1278 // 'S1,X:eax Y:eay,D2'
1279 return check_x_y(ea1, S1);
1281 else if (*tok == KW_Y0 || *tok == KW_Y1)
1283 // 'S1,X:eax S2,Y:eay'
1284 return check_x_y(ea1, S1);
1287 return error("unrecognised X:Y or X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1/X:ea,D1");
1291 // Only check for aa if we have a defined number in our hands or we've
1292 // been asked to use a short number format. The former case we'll just test
1293 // it to see if it's small enough. The later - it's the programmer's call
1294 // so he'd better have a small address or the fixups will bite him/her in the arse!
1295 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1298 // It's an immediate, so ea or eax is probably an absolute address
1299 // (unless it's aa if the immediate is small enough)
1300 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
1302 // Check for aa (which is 6 bits zero extended)
1303 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1307 // It might be X:aa but we're not 100% sure yet.
1308 // If it is, the only possible syntax here is 'X:aa,D'.
1309 // So check ahead to see if EOL follows D, then we're good to go.
1310 if (*tok == ',' && ((*(tok + 1) >= KW_X0 && *(tok + 1) <= KW_N7) || (*(tok + 1) >= KW_R0 && *(tok + 1) <= KW_R7) || (*(tok + 1) >= KW_A0 && *(tok + 1) <= KW_A2)) && *(tok + 2) == EOL)
1312 // Yup, we're good to go - 'X:aa,D' it is
1314 immreg = SDreg(*tok++);
1315 inst = inst | (uint32_t)dspImmedEXVAL;
1316 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
1317 inst |= 1 << 7; // W
1326 inst = inst | (uint32_t)dspImmedEXVAL;
1327 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1332 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B',
1333 // 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1335 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1336 goto x_checkea_right;
1342 // Well, that settles it - we do have an ea in our hands
1345 // 'X:ea,D' [... S2,d2]
1347 return error("unrecognised X: parallel move syntax: expected ',' after 'X:ea'");
1349 if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
1356 inst = inst | B8(01000000) | (1 << 7);
1357 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1360 if (ea1 == DSP_EA_ABS)
1361 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1368 if (*tok == KW_A || *tok == KW_B)
1373 return error("unrecognised X:R parallel move syntax: expected comma after X:ea,D1 S2");
1375 if (*tok == KW_Y0 || *tok == KW_Y1)
1380 return error("unrecognised X:R parallel move syntax: expected EOL after X:ea,D1 S2,D2");
1382 inst = B16(00010000, 00000000) | (1 << 7);
1383 inst |= ((D1 & 0x8) << (12 - 4)) + ((D1 & 1) << 10);
1384 inst |= (S2 & 1) << 9;
1385 inst |= (D2 & 1) << 8;
1390 return error("unrecognised X:R parallel move syntax: expected y0,y1 after X:ea,D1 S2,");
1393 return error("unrecognised X:R parallel move syntax: expected a,b after X:ea,D1");
1397 return error("unrecognised X: parallel move syntax: expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after 'X:ea,'");
1404 inst = inst | B8(01000000) | (0 << 7);
1405 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1408 if (ea1 == DSP_EA_ABS)
1409 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1415 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B',
1416 // 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1417 goto x_checkea_right;
1426 // It's not an immediate, check for '-(Rn)'
1427 ea1 = checkea(termchar, X_ERRORS);
1436 else if (*tok == '#')
1440 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1443 // Okay so we have immediate data - mark it down
1445 // Now, proceed to the main code for this branch
1448 else if (*tok == '(')
1450 // Maybe we got an expression here, check for it
1451 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
1453 // Evaluate the expression and go to immediate code path
1454 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
1458 // Nope, let's check for ea then
1459 ea1 = checkea(termchar, X_ERRORS);
1468 return error("Comma expected after 'X:(Rn)')");
1470 // It might be 'X:(Rn..)..,D' but we're not 100% sure yet.
1471 // If it is, the only possible syntax here is 'X:ea,D'.
1472 // So check ahead to see if EOL follows D, then we're good to go.
1473 if (((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)) && *(tok + 1) == EOL)
1478 inst = inst | B8(01000000) | (1 << 7);
1480 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1489 inst = inst | B8(01000000) | (0 << 7);
1491 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1496 goto x_checkea_right;
1500 // 'X:eax,D1 Y:eay,D2', 'X:eax,D1 S2,Y:eay' or 'X:ea,D1 S2,D2'
1501 // Check ahead for S2,D2 - if that's true then we have 'X:ea,D1 S2,D2'
1502 if ((*tok == KW_X0 || *tok == KW_X1 || *tok == KW_A || *tok == KW_B) && (*(tok + 1) == KW_A || *(tok + 1) == KW_B) && (*(tok + 2) == ',') && (*(tok + 3) == KW_Y0 || (*(tok + 3) == KW_Y1)))
1505 // Check if D1 is x0, x1, a or b
1508 case KW_X0: D1 = 0 << 10; break;
1509 case KW_X1: D1 = 1 << 10; break;
1510 case KW_A: D1 = 2 << 10; break;
1511 case KW_B: D1 = 3 << 10; break;
1512 default: return error("unrecognised X:R parallel move syntax: expected x0, x1, a or b after 'X:eax,'");
1517 case KW_A: S2 = 0 << 9; break;
1518 case KW_B: S2 = 1 << 9; break;
1519 default: return error("unrecognised X:R parallel move syntax: expected a or b after 'X:eax,D1 '");
1523 return error("unrecognised X:R parallel move syntax: expected ',' after 'X:eax,D1 S2'");
1525 if (*tok == KW_Y0 || *tok == KW_Y1)
1527 if (*tok++ == KW_Y0)
1533 return error("unrecognised X:R parallel move syntax: unexpected text after 'X:eax,D1 S2,S2'");
1535 inst = B16(00010000, 00000000) | (W << 7);
1536 inst |= ea1 | D1 | S2 | D2;
1540 return error("unrecognised X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1 S2,'");
1543 // Check to see if we got eax (which is a subset of ea)
1546 if ((inst = check_x_y(ea1, 0)) != 0)
1550 // Rewind pointer as it might be an expression and check for it
1553 if (expr(dspaaEXPR, &dspaaEXVAL, &dspaaEXATTR, &dspaaESYM) != OK)
1556 // Yes, we have an expression, so we now check for
1557 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
1562 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
1564 // Check for immediate address
1565 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1568 // We set ea1 here - if it's aa instead of ea
1569 // then it won't be used anyway
1572 if (!(dspImmedEXATTR&DEFINED))
1574 force_imm = NUM_FORCE_LONG;
1575 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1580 else if (*tok == '>')
1582 // Check for immediate address forced long
1585 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1588 if (dspImmedEXATTR & DEFINED)
1589 if (dspImmedEXVAL > 0xffffff)
1590 return error("long address is bigger than $ffffff");
1592 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1594 force_imm = NUM_FORCE_LONG;
1598 else if (*tok == '<')
1600 // Check for immediate address forced short
1603 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1606 force_imm = NUM_FORCE_SHORT;
1608 if (dspImmedEXATTR & DEFINED)
1610 if (dspImmedEXVAL > 0x3F)
1612 warn("short addressing mode forced but address is bigger than $3F - switching to long");
1613 force_imm = NUM_FORCE_LONG;
1614 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1620 // This might end up as something like 'move Y:<adr,register'
1621 // so let's mark it as an extra aa fixup here.
1622 // Note: we are branching to x_check_immed without a
1623 // defined dspImmed so it's going to be 0. It probably
1624 // doesn't harm anything.
1625 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
1631 return error("unknown x: addressing mode");
1636 // Parse Y: addressing space parallel moves
1638 static inline LONG parse_y(LONG inst, LONG S1, LONG D1, LONG S2)
1640 int immreg; // Immediate register destination
1641 LONG D2; // Destination
1642 LONG ea1; // ea bitfields
1643 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1646 if (tok[1] == CONST || tok[1] == FCONST)
1649 dspImmedEXVAL = *tok++;
1652 // This could be either -(Rn), -aa or -ea. Check for immediate first
1653 if (*tok == SYMBOL || tok[1] == SYMBOL)
1655 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1657 // Only check for aa if we have a defined number in our hands or we've
1658 // been asked to use a short number format. The former case we'll just test
1659 // it to see if it's small enough. The later - it's the programmer's call
1660 // so he'd better have a small address or the fixups will bite him/her in the arse!
1661 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1663 // It's an immediate, so ea is probably an absolute address
1664 // (unless it's aa if the immediate is small enough)
1665 // 'Y:ea,D', 'Y:aa,D', 'S,Y:ea' or 'S,Y:aa'
1667 // Check for aa (which is 6 bits zero extended)
1668 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1670 // It might be Y:aa but we're not 100% sure yet.
1671 // If it is, the only possible syntax here is 'Y:aa,D'/'S,Y:aa'.
1672 // So check ahead to see if EOL follows D, then we're good to go.
1673 if (*tok == EOL && S1 != 0)
1676 inst = B16(01001000, 00000000);
1677 inst |= dspImmedEXVAL;
1678 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1681 if (*tok == ',' && ((*(tok + 1) >= KW_X0 && *(tok + 1) <= KW_N7) || (*(tok + 1) >= KW_R0 && *(tok + 1) <= KW_R7) || (*(tok + 1) >= KW_A0 && *(tok + 1) <= KW_A2)) && *(tok + 2) == EOL)
1683 // Yup, we're good to go - 'Y:aa,D' it is
1685 immreg = SDreg(*tok++);
1686 inst |= dspImmedEXVAL;
1687 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
1692 // Well, that settles it - we do have a ea in our hands
1693 if (*tok == EOL && S1 != 0)
1696 inst = B16(01001000, 01110000);
1698 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1699 if (ea1 == DSP_EA_ABS)
1700 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1704 return error("unrecognised Y: parallel move syntax: expected ',' after 'Y:ea'");
1705 if (D1 == 0 && S1 == 0)
1708 if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
1712 return error("unrecognised Y: parallel move syntax: expected EOL after 'Y:ea,D'");
1713 inst |= B16(00000000, 01110000);
1715 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1716 if (ea1 == DSP_EA_ABS)
1717 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1721 return error("unrecognised Y: parallel move syntax: expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after 'Y:ea,'");
1726 if (*tok == KW_A || *tok == KW_B || *tok == KW_Y0 || *tok == KW_Y1)
1731 inst |= (S1 & 1) << 11;
1732 inst |= (D1 & 1) << 10;
1733 inst |= (D2 & 8) << (9 - 3);
1734 inst |= (D2 & 1) << 8;
1738 return error("unrecognised R:Y: parallel move syntax: expected a,b after 'S1,D1 Y:ea,'");
1746 // It's not an immediate, check for '-(Rn)'
1747 ea1 = checkea(',', Y_ERRORS);
1756 else if (*tok == '#')
1759 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1761 // Okay so we have immediate data - mark it down
1763 // Now, proceed to the main code for this branch
1766 else if (*tok == '(')
1768 // Maybe we got an expression here, check for it
1769 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
1771 // Evaluate the expression and go to immediate code path
1772 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
1776 // Nope, let's check for ea then
1777 if (S1 == 0 || (S1 != 0 && D1 != 0))
1778 ea1 = checkea(',', Y_ERRORS);
1780 ea1 = checkea(EOL, Y_ERRORS);
1786 if (S1 != 0 && *tok == EOL)
1789 inst = B16(01001000, 01000000);
1791 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1794 else if (S1 != 0 && D1 != 0 && S2 == 0)
1799 case 14: S1 = 0 << 11; break; // A
1800 case 15: S1 = 1 << 11; break; // B
1801 default: return error("unrecognised R:Y parallel move syntax: S1 can only be A or B in 'S1,D1 Y:ea,D2'"); break;
1805 case 4: D1 = 0 << 10; break; // X0
1806 case 5: D1 = 1 << 10; break; // X1
1807 default: return error("unrecognised R:Y parallel move syntax: D1 can only be x0 or x1 in 'S1,D1 Y:ea,D2'");break;
1810 return error("unrecognised R:Y parallel move syntax: expected ',' after 'S1,D1 Y:ea'");
1813 case KW_Y0: D2 = 0 << 8; break;
1814 case KW_Y1: D2 = 1 << 8; break;
1815 case KW_A: D2 = 2 << 8; break;
1816 case KW_B: D2 = 3 << 8; break;
1817 default: return error("unrecognised R:Y parallel move syntax: D2 can only be y0, y1, a or b after 'S1,D1 Y:ea'");
1819 inst = B16(00010000, 11000000);
1820 inst |= S1 | D1 | D2;
1825 return error("Comma expected after 'Y:(Rn)')");
1826 // It might be 'Y:(Rn..)..,D' but we're not 100% sure yet.
1827 // If it is, the only possible syntax here is 'Y:ea,D'.
1828 // So check ahead to see if EOL follows D, then we're good to go.
1829 if (((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)) && *(tok + 1) == EOL)
1833 inst |= B16(00000000, 01000000);
1835 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1839 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
1841 // Check for immediate address
1842 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1845 // Yes, we have an expression, so we now check for
1846 // 'Y:ea,D' or 'Y:aa,D'
1847 ea1 = DSP_EA_ABS; // Reluctant - but it's probably correct
1848 if (!(dspImmedEXATTR&DEFINED))
1850 force_imm = NUM_FORCE_LONG;
1851 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1856 else if (*tok == '>')
1858 // Check for immediate address forced long
1860 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1862 if (dspImmedEXATTR & DEFINED)
1863 if (dspImmedEXVAL > 0xffffff)
1864 return error("long address is bigger than $ffffff");
1866 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1868 force_imm = NUM_FORCE_LONG;
1872 else if (*tok == '<')
1875 if (S1 != 0 && D1 != 0)
1877 // We're in 'S1,D1 Y:ea,D2' or 'S1,D1 S1,Y:ea'
1878 // there's no Y:aa mode here, so we'll force long
1879 warn("forced short addressing in R:Y mode is not allowed - switching to long");
1881 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1886 force_imm = NUM_FORCE_LONG;
1887 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1892 // Check for immediate address forced short
1893 ea1 = DSP_EA_ABS; // Reluctant - but it's probably correct
1895 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1897 force_imm = NUM_FORCE_SHORT;
1898 if (dspImmedEXATTR & DEFINED)
1900 if (dspImmedEXVAL > 0xfff)
1902 warn("short addressing mode forced but address is bigger than $fff - switching to long");
1904 force_imm = NUM_FORCE_LONG;
1905 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1910 // This might end up as something like 'move Y:<adr,register'
1911 // so let's mark it as an extra aa fixup here.
1912 // Note: we are branching to y_check_immed without a
1913 // defined dspImmed so it's going to be 0. It probably
1914 // doesn't harm anything.
1915 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
1922 return error("unrecognised Y: parallel move syntax");
1927 // Parse L: addressing space parallel moves
1929 static inline LONG parse_l(const int W, LONG inst, LONG S1)
1931 int immreg; // Immediate register destination
1932 LONG D1; // Source and Destinations
1933 LONG ea1; // ea bitfields
1934 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1937 if (*tok == CONST || tok[1] == FCONST)
1940 dspImmedEXVAL = *tok++;
1943 // This could be either -(Rn), -aa or -ea. Check for immediate first
1944 // Maybe we got an expression here, check for it
1945 if (*tok == SYMBOL || tok[1] == SYMBOL)
1947 // Evaluate the expression and go to immediate code path
1948 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1950 // Only check for aa if we have a defined number in our hands or we've
1951 // been asked to use a short number format. The former case we'll just test
1952 // it to see if it's small enough. The later - it's the programmer's call
1953 // so he'd better have a small address or the fixups will bite him/her in the arse!
1954 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1956 // It's an immediate, so ea is probably an absolute address
1957 // (unless it's aa if the immediate is small enough)
1958 // 'L:ea,D' or 'L:aa,D'
1960 // Check for aa (which is 6 bits zero extended)
1964 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1969 else if (S1 == KW_B)
1974 inst = B16(01000000, 00000000);
1975 inst |= dspImmedEXVAL;
1976 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
1984 else if (S1 == KW_B)
1989 if (ea1 == DSP_EA_ABS)
1990 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1992 inst |= B16(01000000, 01110000);
1993 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
2000 return error("unrecognised L: parallel move syntax: expected ',' after 'L:ea/L:aa'");
2001 // Check for allowed registers for D (a0, b0, x, y, a, b, ab or ba)
2002 if (!((*tok >= KW_A10 && *(tok + 1) <= KW_BA) || (*tok >= KW_A && *tok <= KW_B)))
2003 return error("unrecognised L: parallel move syntax: expected a0, b0, x, y, a, b, ab or ba after 'L:ea/L:aa'");
2005 if (dspImmedEXVAL < (1 << 6) && (dspImmedEXATTR&DEFINED))
2012 else if (immreg == KW_B)
2018 return error("unrecognised L: parallel move syntax: expected End-Of-Line after L:aa,D");
2020 inst &= B16(11111111, 10111111);
2021 inst |= dspImmedEXVAL;
2022 inst |= ((immreg & 0x4) << (11 - 2)) + ((immreg & 3) << 8);
2027 if (deposit_extra_ea == DEPOSIT_EXTRA_FIXUP)
2029 // Hang on, we've got a L:<aa here, let's do that instead
2033 // Well, that settles it - we do have a ea in our hands
2038 else if (D1 == KW_B)
2044 return error("unrecognised L: parallel move syntax: expected End-Of-Line after L:ea,D");
2046 inst |= B16(00000000, 00110000);
2047 inst |= ((D1 & 0x4) << (11 - 2)) + ((D1 & 3) << 8);
2053 //It's not an immediate, check for '-(Rn)'
2054 ea1 = checkea(',', L_ERRORS);
2063 else if (*tok == '(')
2065 // Maybe we got an expression here, check for it
2066 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
2068 // Evaluate the expression and go to immediate code path
2069 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
2073 //Nope, let's check for ea then
2075 ea1 = checkea(',', L_ERRORS);
2077 ea1 = checkea(EOL, L_ERRORS);
2086 inst = B16(01000000, 01000000);
2089 else if (S1 == KW_B)
2095 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
2098 else if (*tok++ != ',')
2099 return error("Comma expected after 'L:(Rn)')");
2101 // It might be 'L:(Rn..)..,D' but we're not 100% sure yet.
2102 // If it is, the only possible syntax here is 'L:ea,D'.
2103 // So check ahead to see if EOL follows D, then we're good to go.
2104 if (((*tok >= KW_A10 && *tok <= KW_BA) || (*tok >= KW_A && *tok <= KW_B)) && *(tok + 1) == EOL)
2110 else if (D1 == KW_B)
2116 inst |= ((D1 & 0x4) << (11 - 2)) + ((D1 & 3) << 8);
2120 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
2122 // Check for immediate address
2123 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2126 // We set ea1 here - if it's aa instead of ea
2127 // then it won't be used anyway
2129 if (!(dspImmedEXATTR & DEFINED))
2131 force_imm = NUM_FORCE_LONG;
2132 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2134 else if (dspImmedEXVAL > 0x3f)
2136 // Definitely no aa material, so it's going to be a long
2137 // Mark that we need to deposit an extra word
2138 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2141 // Yes, we have an expression, so we now check for
2142 // 'L:ea,D' or 'L:aa,D'
2145 else if (*tok == '>')
2147 // Check for immediate address forced long
2149 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2151 if (dspImmedEXATTR & DEFINED)
2152 if (dspImmedEXVAL > 0xffffff)
2153 return error("long address is bigger than $ffffff");
2155 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2157 force_imm = NUM_FORCE_LONG;
2160 else if (*tok == '<')
2162 // Check for immediate address forced short
2164 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2166 if (dspImmedEXATTR & DEFINED)
2168 if (dspImmedEXVAL > 0xfff)
2169 return error("short addressing mode forced but address is bigger than $fff");
2173 // This might end up as something like 'move Y:<adr,register'
2174 // so let's mark it as an extra aa fixup here.
2175 // Note: we are branching to l_check_immed without a
2176 // defined dspImmed so it's going to be 0. It probably
2177 // doesn't harm anything.
2178 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
2181 force_imm = NUM_FORCE_SHORT;
2185 return error("internal assembler error: Please report this error message: 'reached the end of parse_l' with the line of code that caused it. Thanks, and sorry for the inconvenience");
2190 // Checks for all ea cases where indexed addressing is concenred
2192 static inline LONG checkea(const uint32_t termchar, const int strings)
2200 return error(ea_errors[strings][0]);
2201 if (*tok >= KW_R0 && *tok <= KW_R7)
2203 // We got '-(Rn' so mark it down
2204 ea = DSP_EA_PREDEC1 | (*tok++ - KW_R0);
2206 return error(ea_errors[strings][1]);
2207 // Now, proceed to the main code for this branch
2211 return error(ea_errors[strings][2]);
2213 else if (*tok == '(')
2215 // Checking for ea of type (Rn)
2217 if (*tok >= KW_R0 && *tok <= KW_R7)
2219 // We're in 'X:(Rn..)..,D', 'X:(Rn..)..,D1 Y:eay,D2', 'X:(Rn..)..,D1 S2,Y:eay'
2220 ea = *tok++ - KW_R0;
2225 if (*tok < KW_N0 || *tok > KW_N7)
2226 return error(ea_errors[strings][3]);
2227 if ((*tok++ & 7) != ea)
2228 return error(ea_errors[strings][4]);
2231 return error(ea_errors[strings][5]);
2234 else if (*tok == ')')
2236 // Check to see if we have '(Rn)+', '(Rn)-', '(Rn)-Nn', '(Rn)+Nn' or '(Rn)'
2241 if (termchar == ',')
2246 ea |= DSP_EA_POSTINC1;
2249 else if (*tok >= KW_N0 && *tok <= KW_N7)
2252 if ((*tok++ & 7) != ea)
2253 return error(ea_errors[strings][6]);
2254 ea |= DSP_EA_POSTINC;
2258 return error(ea_errors[strings][7]);
2262 if (*tok >= KW_N0 && *tok <= KW_N7)
2265 if ((*tok++ & 7) != ea)
2266 return error(ea_errors[strings][6]);
2267 ea |= DSP_EA_POSTINC;
2273 ea |= DSP_EA_POSTINC1;
2278 else if (*tok == '-')
2281 if (termchar == ',')
2286 ea |= DSP_EA_POSTDEC1;
2289 else if (*tok >= KW_N0 && *tok <= KW_N7)
2292 if ((*tok++ & 7) != ea)
2293 return error(ea_errors[strings][8]);
2294 ea |= DSP_EA_POSTDEC;
2298 return error(ea_errors[strings][9]);
2302 if (*tok >= KW_N0 && *tok <= KW_N7)
2305 if ((*tok++ & 7) != ea)
2306 return error(ea_errors[strings][8]);
2307 ea |= DSP_EA_POSTDEC;
2313 ea |= DSP_EA_POSTDEC1;
2318 else if (termchar == ',')
2327 return error(ea_errors[strings][10]);
2337 return error(ea_errors[strings][11]);
2340 return error("internal assembler error: Please report this error message: 'reached the end of checkea' with the line of code that caused it. Thanks, and sorry for the inconvenience");
2345 // Checks for all ea cases, i.e. all addressing modes that checkea handles
2346 // plus immediate addresses included forced short/long ones.
2347 // In other words this is a superset of checkea (and in fact calls checkea).
2349 LONG checkea_full(const uint32_t termchar, const int strings)
2353 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
2355 // Check for immediate address
2356 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2359 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2361 // Yes, we have an expression
2364 else if (*tok == '>')
2366 // Check for immediate address forced long
2368 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2370 if (dspImmedEXATTR & DEFINED)
2371 if (dspImmedEXVAL > 0xffffff)
2372 return error("long address is bigger than $ffffff");
2374 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2376 // Yes, we have an expression
2379 else if (*tok == '<')
2381 // Check for immediate address forced short
2383 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2385 if (dspImmedEXATTR & DEFINED)
2386 if (dspImmedEXVAL > 0xfff)
2387 return error("short addressing mode forced but address is bigger than $fff");
2389 // Yes, we have an expression
2394 ea1 = checkea(termchar, strings);
2405 // Main routine to check parallel move modes.
2406 // It's quite complex so it's split into a few procedures (in fact most of the
2407 // above ones). A big effort was made so this can be managable and not too
2408 // hacky, however one look at the 56001 manual regarding parallel moves and
2409 // you'll know that this is not an easy // problem to deal with!
2410 // dest=destination register from the main opcode. This must not be the same
2411 // as D1 or D2 and that even goes for stuff like dest=A, D1=A0/1/2!!!
2413 LONG parmoves(WORD dest)
2415 int force_imm; // Addressing mode force operator
2416 int immreg; // Immediate register destination
2417 LONG inst; // 16 bit bitfield that has the parallel move opcode
2418 LONG S1, S2, D1, D2; // Source and Destinations
2419 LONG ea1; // ea bitfields
2424 return B16(00100000, 00000000);
2429 // '#xxxxxx,D', '#xx,D'
2431 force_imm = NUM_NORMAL;
2435 force_imm = NUM_FORCE_LONG;
2438 else if (*tok == '<')
2440 force_imm = NUM_FORCE_SHORT;
2444 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2448 return error("expected comma");
2450 if (!((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)))
2451 return error("expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after immediate");
2453 immreg = SDreg(*tok++);
2457 if (!(dspImmedEXATTR & FLOAT))
2459 if (dspImmedEXATTR & DEFINED)
2461 // From I parallel move:
2462 // "If the destination register D is X0, X1, Y0, Y1, A, or B, the 8-bit immediate short operand
2463 // is interpreted as a signed fraction and is stored in the specified destination register.
2464 // That is, the 8 - bit data is stored in the eight MS bits of the destination operand, and the
2465 // remaining bits of the destination operand D are zeroed."
2466 // The funny bit is that Motorola assembler can parse something like 'move #$FF0000,b' into an
2467 // I (immediate short move) - so let's do that as well then...
2468 if (((immreg >= 4 && immreg <= 7) || immreg == 14 || immreg == 15) && force_imm != NUM_FORCE_LONG)
2470 if ((dspImmedEXVAL & 0xffff) == 0)
2472 dspImmedEXVAL >>= 16;
2476 if (force_imm == NUM_FORCE_SHORT)
2478 if (dspImmedEXVAL < 0xFF && (int32_t)dspImmedEXVAL > -0x100)
2481 // value fits in 8 bits - immediate move
2482 inst = B16(00100000, 00000000) + (immreg << 8) + (uint32_t)dspImmedEXVAL;
2487 warn("forced short immediate value doesn't fit in 8 bits - switching to long");
2488 force_imm = NUM_FORCE_LONG;
2492 if (force_imm == NUM_FORCE_LONG)
2496 // X or Y Data move. I don't think it matters much
2497 // which of the two it will be, so let's use X.
2498 deposit_immediate_long_with_register:
2499 inst = B16(01000000, 11110100);
2500 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
2501 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2505 if (((int32_t)dspImmedEXVAL < 0x100) && ((int32_t)dspImmedEXVAL >= -0x100))
2507 // value fits in 8 bits - immediate move
2508 deposit_immediate_short_with_register:
2509 inst = B16(00100000, 00000000) + (immreg << 8) + (uint32_t)dspImmedEXVAL;
2514 // value doesn't fit in 8 bits, so it can either be
2515 // X or Y Data move. I don't think it matters much
2516 // which of the two it will be, so let's use X:.
2517 // TODO: if we're just goto'ing perhaps the logic can be simplified
2518 goto deposit_immediate_long_with_register;
2523 if (force_imm != NUM_FORCE_SHORT)
2526 // TODO: if we're just goto'ing perhaps the logic can be simplified
2527 goto deposit_immediate_long_with_register;
2532 // No visibility of the number so let's add a fixup for this
2533 AddFixup(FU_DSPIMM8, sloc, dspImmedEXPR);
2534 inst = B16(00100000, 00000000);
2535 inst |= ((immreg & 0x18) << (11 - 3)) + ((immreg & 7) << 8);
2543 if (dspImmedEXATTR & DEFINED)
2545 double f = *(double *)&dspImmedEXVAL;
2546 // Check direct.c for ossom comments regarding conversion!
2547 //N.B.: This is bogus, we need to fix this so it does this the right way... !!! FIX !!!
2548 dspImmedEXVAL = ((uint32_t)(int32_t)round(f * (1 << 23))) & 0xFFFFFF;
2553 if ((dspImmedEXVAL & 0xFFFF) == 0)
2555 // Value's 16 lower bits are not set so the value can fit in a single byte
2556 // (check parallel I move quoted above)
2557 warn("Immediate value fits inside 8 bits, so using instruction short format");
2558 dspImmedEXVAL >>= 16;
2559 goto deposit_immediate_short_with_register;
2562 if (force_imm == NUM_FORCE_SHORT)
2564 if ((dspImmedEXVAL & 0xFFFF) != 0)
2566 warn("Immediate value short format forced but value does not fit inside 8 bits - switching to long format");
2567 goto deposit_immediate_long_with_register;
2570 return error("internal assembler error: we haven't implemented floating point constants in parallel mode parser yet!");
2573 // If we reach here we either have NUM_FORCE_LONG or nothing, so we might as well store a long.
2574 goto deposit_immediate_long_with_register;
2578 if (force_imm == NUM_FORCE_SHORT)
2580 goto deposit_immediate_short_with_register;
2584 // Just deposit a float fixup
2585 AddFixup(FU_DSPIMMFL8, sloc, dspImmedEXPR);
2586 inst = B16(00100000, 00000000);
2587 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
2595 // At this point we can only have '#xxxxxx,D1 S2,D2' (X:R Class I)
2598 case 4: D1 = 0 << 10;break; // X0
2599 case 5: D1 = 1 << 10;break; // X1
2600 case 14: D1 = 2 << 10;break; // A
2601 case 15: D1 = 3 << 10;break; // B
2602 default: return error("unrecognised X:R parallel move syntax: D1 can only be x0,x1,a,b in '#xxxxxx,D1 S2,D2'"); break;
2607 case KW_A: S2 = 0 << 9; break;
2608 case KW_B: S2 = 1 << 9; break;
2609 default: return error("unrecognised X:R parallel move syntax: S2 can only be A or B in '#xxxxxx,D1 S2,D2'"); break;
2613 return error("unrecognised X:R parallel move syntax: expected comma after '#xxxxxx,D1 S2'");
2617 case KW_Y0: D2 = 0 << 8; break;
2618 case KW_Y1: D2 = 1 << 8; break;
2619 default: return error("unrecognised X:R parallel move syntax: D2 can only be Y0 or Y1 in '#xxxxxx,D1 S2,D2'"); break;
2623 return error("unrecognised X:R parallel move syntax: expected end-of-line after '#xxxxxx,D1 S2,D2'");
2625 inst = B16(00010000, 10110100) | D1 | S2 | D2;
2626 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2630 else if (*tok == KW_X)
2633 // Hey look, it's just the register X and not the addressing mode - fall through to general case
2634 goto parse_everything_else;
2639 return error("expected ':' after 'X' in parallel move (i.e. X:)");
2641 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
2642 return parse_x(1, B16(01000000, 00000000), 0, 1);
2644 else if (*tok == KW_Y)
2647 // Hey look, it's just the register y and not the addressing mode - fall through to general case
2648 goto parse_everything_else;
2653 return error("expected ':' after 'Y' in parallel move (i.e. Y:)");
2655 // 'Y:ea,D' or 'Y:aa,D'
2656 return parse_y(B16(01001000, 10000000), 0, 0, 0);
2658 else if (*tok == KW_L)
2660 // 'L:ea,D' or 'L:aa,D'
2663 return error("expected ':' after 'L' in parallel move (i.e. L:)");
2665 return parse_l(1, B16(01000000, 11000000), 0);
2667 else if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2) || (*tok >= KW_A10 && *tok <= KW_BA))
2669 // Everything else - brace for impact!
2671 // X: 'S,X:ea' 'S,X:aa'
2672 // X:R 'S,X:ea S2,D2' 'A,X:ea X0,A' 'B,X:ea X0,B'
2673 // Y: 'S,Y:ea' 'S,Y:aa'
2674 // R:Y: 'S1,D1 Y:ea,D2' 'S1,D1 S2,Y:ea' 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' 'S1,D1 #xxxxxx,D2' 'Y0,A A,Y:ea' 'Y0,B B,Y:ea'
2675 // L: 'S,L:ea' 'S,L:aa'
2677 parse_everything_else:
2682 return error("Comma expected after 'S')");
2686 // 'S,X:ea' 'S,X:aa' 'S,X:ea S2,D2' 'S1,X:eax Y:eay,D2' 'S1,X:eax S2,Y:eay'
2687 // 'A,X:ea X0,A' 'B,X:ea X0,B'
2691 return error("unrecognised X: parallel move syntax: expected ':' after 'S,X'");
2693 return parse_x(0, B16(01000000, 00000000), S1, 1);
2695 else if (*tok == KW_Y)
2697 // 'S,Y:ea' 'S,Y:aa'
2701 return error("unrecognised Y: parallel move syntax: expected ':' after 'S,Y'");
2703 return parse_y(B16(0000000, 00000000), S1, 0, 0);
2705 else if (*tok == KW_L)
2707 // 'S,L:ea' 'S,L:aa'
2711 return error("unrecognised L: parallel move syntax: expected ':' after 'S,L'");
2713 return parse_l(1, B16(00000000, 00000000), L_S1);
2715 else if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
2718 // 'S1,D1 Y:ea,D2' 'S1,D1 S2,Y:ea' 'S1,D1 #xxxxxx,D2'
2719 // 'Y0,A A,Y:ea' 'Y0,B B,Y:ea'
2725 inst = B16(00100000, 00000000);
2726 inst |= (S1 << 5) | (D1);
2729 else if (*tok == KW_Y)
2734 return error("expected ':' after 'Y' in parallel move (i.e. Y:)");
2735 return parse_y(B16(00010000, 01000000), S1, D1, 0);
2738 else if (*tok == KW_A || *tok == KW_B || *tok == KW_Y0 || *tok == KW_Y1)
2740 // 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' 'S1,D1 S2,Y:ea'
2743 if (S1 == 6 && D1 == 14 && S2 == 14)
2747 return error("unrecognised Y: parallel move syntax: expected ',' after Y0,A A");
2750 return error("unrecognised Y: parallel move syntax: expected 'Y' after Y0,A A,");
2753 return error("unrecognised Y: parallel move syntax: expected ':' after Y0,A A,Y");
2755 ea1 = checkea_full(EOL, Y_ERRORS);
2760 inst = B16(00001000, 10000000);
2765 else if (S1 == 6 && D1 == 15 && S2 == 15)
2769 return error("unrecognised Y: parallel move syntax: expected ',' after Y0,B B");
2772 return error("unrecognised Y: parallel move syntax: expected 'Y' after Y0,B B,");
2775 return error("unrecognised Y: parallel move syntax: expected ':' after Y0,B B,Y");
2777 ea1 = checkea_full(EOL, Y_ERRORS);
2782 inst = B16(00001000, 10000000);
2787 else if ((S1 == 14 || S1 == 15) && (D1 == 4 || D1 == 5) && (S2 == 6 || S2 == 7 || S2 == 14 || S2 == 15))
2791 return error("unrecognised Y: parallel move syntax: expected ',' after S1,D1 S2");
2794 return error("unrecognised Y: parallel move syntax: expected 'Y' after S1,D1 S2,");
2797 return error("unrecognised Y: parallel move syntax: expected ':' after S1,D1 S2,Y");
2799 ea1 = checkea_full(EOL, Y_ERRORS);
2804 inst = B16(00010000, 01000000);
2805 inst |= (S1 & 1) << 11;
2806 inst |= (D1 & 1) << 10;
2807 inst |= ((S2 & 8) << (10 - 4)) | ((S2 & 1) << 8);
2812 return error("unrecognised Y: parallel move syntax: only 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' allowed'");
2815 else if (*tok == '#')
2817 // R:Y: 'S1,D1 #xxxxxx,D2'
2822 // Well, forcing an immediate to be 24 bits is legal here
2823 // but then it's the only available option so my guess is that this
2824 // is simply superfluous. So let's just eat the character
2828 if (expr(dspaaEXPR, &dspaaEXVAL, &dspaaEXATTR, &dspaaESYM) != OK)
2831 if (dspImmedEXATTR & DEFINED)
2832 if (dspImmedEXVAL > 0xffffff)
2833 return error("immediate is bigger than $ffffff");
2835 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2838 return error("Comma expected after 'S1,D1 #xxxxxx')");
2840 // S1 is a or b, D1 is x0 or x1 and d2 is y0, y1, a or b
2843 case KW_Y0: D2 = 0 << 8; break;
2844 case KW_Y1: D2 = 1 << 8; break;
2845 case KW_A: D2 = 2 << 8; break;
2846 case KW_B: D2 = 3 << 8; break;
2847 default: return error("unrecognised R:Y: parallel move syntax: D2 must be y0, y1, a or b in 'S1,D1 #xxxxxx,D2'");
2850 if (S1 == 14 || S1 == 15)
2852 if (D1 == 4 || D1 == 5)
2854 inst = B16(00010000, 11110100);
2855 inst |= (S1 & 1) << 11;
2856 inst |= (D1 & 1) << 10;
2858 dspImmedEXVAL = dspaaEXVAL;
2862 return error("unrecognised R:Y: parallel move syntax: D1 must be x0 or x1 in 'S1,D1 #xxxxxx,D2'");
2865 return error("unrecognised R:Y: parallel move syntax: S1 must be a or b in 'S1,D1 #xxxxxx,D2'");
2868 return error("unrecognised R:Y: parallel move syntax: Unexpected text after S,D in 'S1,D1 #xxxxxx,D2'");
2871 return error("unrecognised R:Y: parallel move syntax: Unexpected text after 'S,'");
2873 else if (*tok == '(')
2876 // U 'ea' can only be '(Rn)-Nn', '(Rn)+Nn', '(Rn)-' or '(Rn)+'
2879 if (*tok >= KW_R0 && *tok <= KW_R7)
2881 ea1 = (*tok++ - KW_R0);
2884 return error("unrecognised U parallel move syntax: expected 'Rn' after '('");
2887 return error("unrecognised U parallel move syntax: expected ')' after '(Rn'");
2896 else if (*tok >= KW_N0 && *tok <= KW_N7)
2899 if ((*tok++ & 7) != ea1)
2900 return error("unrecognised U parallel move syntax: Same register number expected for Rn, Nn in '(Rn)+Nn')");
2905 return error("unrecognised U parallel move syntax: expected End-Of-Line after '(Rn)+Nn'");
2908 return error("unrecognised U parallel move syntax: expected End-Of-Line or 'Nn' after '(Rn)+'");
2910 else if (*tok == '-')
2920 else if (*tok >= KW_N0 && *tok <= KW_N7)
2923 if ((*tok++ & 7) != ea1)
2924 return error("unrecognised U parallel move syntax: Same register number expected for Rn, Nn in '(Rn)-Nn')");
2929 return error("unrecognised U parallel move syntax: expected End-Of-Line after '(Rn)-Nn'");
2933 inst = B16(00100000, 01000000);
2938 return error("extra (unexpected) text found");