Code cleanup.

[thunder] / src / v6809.cpp

diff --git a/src/v6809.cpp b/src/v6809.cpp
index 3dd47b5eb20a4872037d96a49fc64d2cc10cf602..862f1a82dc19b9d38e259d770adb12bfb9c3e368 100644 (file)
--- a/src/v6809.cpp
+++ b/src/v6809.cpp
@@ -1,13 +1,13 @@
 //
 // Virtual 6809 v1.3
 //
-// by James L. Hammons
-// (c) 1997, 2006 Underground Software
+// by James Hammons
+// (c) 1997, 2014 Underground Software
 //
-// JLH = James L. Hammons <jlhamm@acm.org>
+// JLH = James Hammons <jlhamm@acm.org>
 //
 // WHO  WHEN        WHAT
-// ---  ----------  ------------------------------------------------------------
+// ---  ----------  -----------------------------------------------------------
 // JLH  06/15/2006  Added changelog ;-)
 // JLH  06/15/2006  Scrubbed all BYTE, WORD & DWORD references from the code
 // JLH  11/11/2006  Removed all SignedX() references
@@ -36,9 +36,9 @@
 #define SET_N(r)                       (regs.cc = ((r) & 0x80 ? regs.cc | FLAG_N : regs.cc & ~FLAG_N))
 
 //Not sure that this code is computing the carry correctly... Investigate! [Seems to be]
-#define SET_C_ADD(a,b)         (regs.cc = ((uint8)(b) > (uint8)(~(a)) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
-//#define SET_C_SUB(a,b)               (regs.cc = ((uint8)(b) >= (uint8)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
-#define SET_C_CMP(a,b)         (regs.cc = ((uint8)(b) >= (uint8)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+#define SET_C_ADD(a,b)         (regs.cc = ((uint8_t)(b) > (uint8_t)(~(a)) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+//#define SET_C_SUB(a,b)               (regs.cc = ((uint8_t)(b) >= (uint8_t)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+#define SET_C_CMP(a,b)         (regs.cc = ((uint8_t)(b) >= (uint8_t)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
 #define SET_ZN(r)                      SET_N(r); SET_Z(r)
 #define SET_ZNC_ADD(a,b,r)     SET_N(r); SET_Z(r); SET_C_ADD(a,b)
 //#define SET_ZNC_SUB(a,b,r)   SET_N(r); SET_Z(r); SET_C_SUB(a,b)
@@ -69,15 +69,15 @@
 #define READ_IND_ZP_Y          regs.RdMem(EA_IND_ZP_Y)
 #define READ_IND_ZP                    regs.RdMem(EA_IND_ZP)
 
-#define READ_IMM_WB(v)         uint16 addr = EA_IMM;      v = regs.RdMem(addr)
-#define READ_ZP_WB(v)          uint16 addr = EA_ZP;       v = regs.RdMem(addr)
-#define READ_ZP_X_WB(v)                uint16 addr = EA_ZP_X;     v = regs.RdMem(addr)
-#define READ_ABS_WB(v)         uint16 addr = EA_ABS;      v = regs.RdMem(addr); regs.pc += 2
-#define READ_ABS_X_WB(v)       uint16 addr = EA_ABS_X;    v = regs.RdMem(addr); regs.pc += 2
-#define READ_ABS_Y_WB(v)       uint16 addr = EA_ABS_Y;    v = regs.RdMem(addr); regs.pc += 2
-#define READ_IND_ZP_X_WB(v)    uint16 addr = EA_IND_ZP_X; v = regs.RdMem(addr)
-#define READ_IND_ZP_Y_WB(v)    uint16 addr = EA_IND_ZP_Y; v = regs.RdMem(addr)
-#define READ_IND_ZP_WB(v)      uint16 addr = EA_IND_ZP;   v = regs.RdMem(addr)
+#define READ_IMM_WB(v)         uint16_t addr = EA_IMM;      v = regs.RdMem(addr)
+#define READ_ZP_WB(v)          uint16_t addr = EA_ZP;       v = regs.RdMem(addr)
+#define READ_ZP_X_WB(v)                uint16_t addr = EA_ZP_X;     v = regs.RdMem(addr)
+#define READ_ABS_WB(v)         uint16_t addr = EA_ABS;      v = regs.RdMem(addr); regs.pc += 2
+#define READ_ABS_X_WB(v)       uint16_t addr = EA_ABS_X;    v = regs.RdMem(addr); regs.pc += 2
+#define READ_ABS_Y_WB(v)       uint16_t addr = EA_ABS_Y;    v = regs.RdMem(addr); regs.pc += 2
+#define READ_IND_ZP_X_WB(v)    uint16_t addr = EA_IND_ZP_X; v = regs.RdMem(addr)
+#define READ_IND_ZP_Y_WB(v)    uint16_t addr = EA_IND_ZP_Y; v = regs.RdMem(addr)
+#define READ_IND_ZP_WB(v)      uint16_t addr = EA_IND_ZP;   v = regs.RdMem(addr)
 
 #define WRITE_BACK(d)          regs.WrMem(addr, (d))
 
@@ -85,18 +85,18 @@
 
 static V6809REGS regs;
 //Let's see if we can nuke this shit.
-static uint16 addr;                                                            // Temporary variables common to all funcs...
-static uint8 tmp;
+static uint16_t addr;                                                          // Temporary variables common to all funcs...
+static uint8_t tmp;
 
 // Private function prototypes
 
-static uint16 FetchW(void);
-static uint16 RdMemW(uint16 addr);
-static void WrMemW(uint16 addr, uint16 w);
-static uint16 ReadEXG(uint8);                                  // Read TFR/EXG post byte
-static void WriteEXG(uint8, uint16);                   // Set TFR/EXG data
-static uint16 DecodeReg(uint8);                                        // Decode register data
-static uint16 DecodeIDX(uint8);                                        // Decode IDX data
+static uint16_t FetchW(void);
+static uint16_t RdMemW(uint16_t addr);
+static void WrMemW(uint16_t addr, uint16_t w);
+static uint16_t ReadEXG(uint8_t);                                      // Read TFR/EXG post byte
+static void WriteEXG(uint8_t, uint16_t);                       // Set TFR/EXG data
+static uint16_t DecodeReg(uint8_t);                                    // Decode register data
+static uint16_t DecodeIDX(uint8_t);                                    // Decode IDX data
 
 //static void (* exec_op1[256])();
 //static void (* exec_op2[256])();
@@ -213,9 +213,9 @@ static void (* exec_op2[256])() = {
 // Fetch a word out of 6809 memory (little endian format)
 // This is a leftover from when fetches were separated from garden variety reads...
 //
-static uint16 FetchW()
+static uint16_t FetchW()
 {
-       uint16 w = RdMemW(regs.pc);
+       uint16_t w = RdMemW(regs.pc);
        regs.pc += 2;
        return w;
 }
@@ -223,15 +223,15 @@ static uint16 FetchW()
 //
 // Read word from memory function
 //
-uint16 RdMemW(uint16 addr)
+uint16_t RdMemW(uint16_t addr)
 {
-       return (uint16)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
+       return (uint16_t)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
 }
 
 //
 // Write word to memory function
 //
-void WrMemW(uint16 addr, uint16 w)
+void WrMemW(uint16_t addr, uint16_t w)
 {
        regs.WrMem(addr + 0, w >> 8);
        regs.WrMem(addr + 1, w & 0xFF);
@@ -240,9 +240,9 @@ void WrMemW(uint16 addr, uint16 w)
 //
 // Function to read TFR/EXG post byte
 //
-uint16 ReadEXG(uint8 code)
+uint16_t ReadEXG(uint8_t code)
 {
-       uint16 retval;
+       uint16_t retval;
 
        switch (code)
        {
@@ -286,7 +286,7 @@ uint16 ReadEXG(uint8 code)
 //
 // Function to set TFR/EXG data
 //
-void WriteEXG(uint8 code, uint16 data)
+void WriteEXG(uint8_t code, uint16_t data)
 {
        switch (code)
        {
@@ -316,9 +316,9 @@ void WriteEXG(uint8 code, uint16 data)
 //
 // Function to decode register data
 //
-uint16 DecodeReg(uint8 reg)
+uint16_t DecodeReg(uint8_t reg)
 {
-       uint16 retval;
+       uint16_t retval;
 
        switch (reg)
        {
@@ -338,10 +338,10 @@ uint16 DecodeReg(uint8 reg)
 //
 // Function to decode IDX data
 //
-uint16 DecodeIDX(uint8 code)
+uint16_t DecodeIDX(uint8_t code)
 {
-       uint16 addr, woff;
-       uint8 reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
+       uint16_t addr, woff;
+       uint8_t reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
 
        if (!(code & 0x80))                                                     // Hi bit unset? Then decode 4 bit offset
                addr = DecodeReg(reg) + (idxind ? lo_nyb - 16 : lo_nyb);
@@ -378,15 +378,15 @@ uint16 DecodeIDX(uint8 code)
                                addr = RdMemW(woff);
                                break;
                        case 5:
-                               woff = DecodeReg(reg) + (int16)(int8)regs.b;
+                               woff = DecodeReg(reg) + (int16_t)(int8_t)regs.b;
                                addr = RdMemW(woff);
                                break;
                        case 6:
-                               woff = DecodeReg(reg) + (int16)(int8)regs.a;
+                               woff = DecodeReg(reg) + (int16_t)(int8_t)regs.a;
                                addr = RdMemW(woff);
                                break;
                        case 8:
-                               woff = DecodeReg(reg) + (int16)(int8)regs.RdMem(regs.pc++);
+                               woff = DecodeReg(reg) + (int16_t)(int8_t)regs.RdMem(regs.pc++);
                                addr = RdMemW(woff);
                                break;
                        case 9:
@@ -398,7 +398,7 @@ uint16 DecodeIDX(uint8 code)
                                addr = RdMemW(woff);
                                break;
                        case 12:
-                               woff = regs.pc + (int16)(int8)regs.RdMem(regs.pc++);
+                               woff = regs.pc + (int16_t)(int8_t)regs.RdMem(regs.pc++);
                                addr = RdMemW(woff);
                                break;
                        case 13:
@@ -452,12 +452,12 @@ uint16 DecodeIDX(uint8 code)
                    }
                    addr = DecodeReg(reg);  break; }
         case 4:  { addr = DecodeReg(reg);  break; }
-        case 5:  { addr = DecodeReg(reg) + (int16)(int8)regs.b;  break; }
-        case 6:  { addr = DecodeReg(reg) + (int16)(int8)regs.a;  break; }
-        case 8:  { addr = DecodeReg(reg) + (int16)(int8)regs.RdMem(regs.pc++);  break; }
+        case 5:  { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.b;  break; }
+        case 6:  { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.a;  break; }
+        case 8:  { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.RdMem(regs.pc++);  break; }
         case 9:  { addr = DecodeReg(reg) + FetchW();  break; }
         case 11: { addr = DecodeReg(reg) + ((regs.a << 8) | regs.b);  break; }
-        case 12: { addr = regs.pc + (int16)(int8)regs.RdMem(regs.pc++);  break; }
+        case 12: { addr = regs.pc + (int16_t)(int8_t)regs.RdMem(regs.pc++);  break; }
         case 13: { addr = regs.pc + FetchW();  break; }
                        }
                }
@@ -514,7 +514,7 @@ static void Op04(void)  // LSR DP
 }
 static void Op06(void)  // ROR DP
 {
-  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8 tmp2 = regs.RdMem(addr);
+  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8_t tmp2 = regs.RdMem(addr);
   tmp = (tmp2>>1) + (regs.cc&0x01)*128;
   regs.WrMem(addr, tmp);
   (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -546,7 +546,7 @@ static void Op08(void)  // LSL DP
 }
 static void Op09(void)  // ROL DP
 {
-  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8 tmp2 = regs.RdMem(addr);
+  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8_t tmp2 = regs.RdMem(addr);
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -626,7 +626,7 @@ static void Op16(void)                                                      // LBRA
 
 static void Op17(void)                                                 // LBSR
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
        regs.WrMem(--regs.s, regs.pc & 0xFF);
        regs.WrMem(--regs.s, regs.pc >> 8);
 //     regs.pc += SignedW(addr);
@@ -638,7 +638,7 @@ static void Op17(void)                                                      // LBSR
 static void Op19(void)  // DAA
 {
 #if 0
-       uint8 result = regs.a;
+       uint8_t result = regs.a;
 
        if ((regs.cc&0x20) || ((regs.a&0x0F) > 0x09))    // H set or lo nyb too big?
        {
@@ -660,7 +660,7 @@ static void Op19(void)  // DAA
        if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
        if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
 #else
-       uint16 result = (uint16)regs.a;
+       uint16_t result = (uint16_t)regs.a;
 
        if ((regs.a & 0x0F) > 0x09 || (regs.cc & FLAG_H))
                result += 0x06;
@@ -668,7 +668,7 @@ static void Op19(void)  // DAA
        if ((regs.a & 0xF0) > 0x90 || (regs.cc & FLAG_C) || ((regs.a & 0xF0) > 0x80 && (regs.a & 0x0F) > 0x09))
                result += 0x60;
 
-       regs.a = (uint8)result;
+       regs.a = (uint8_t)result;
 //     SET_ZN(result);
 //     CLR_V;                                                                          // Not sure this is correct...
        regs.cc &= 0xF1;                             // CL NZV
@@ -724,7 +724,7 @@ static void Op1F(void)  // TFR
 static void Op20(void)                                                 // BRA
 {
 //     regs.pc += SignedB(regs.RdMem(regs.pc++));  // Branch always
-       regs.pc += (int16)(int8)regs.RdMem(regs.pc) + 1;        // Branch always
+       regs.pc += (int16_t)(int8_t)regs.RdMem(regs.pc) + 1;    // Branch always
 
        regs.clock += 3;
 }
@@ -738,7 +738,7 @@ static void Op21(void)                                                      // BRN
 
 static void Op22(void)                                                 // BHI
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(regs.cc & 0x05))
                regs.pc += word;
@@ -748,7 +748,7 @@ static void Op22(void)                                                      // BHI
 
 static void Op23(void)                                                 // BLS
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (regs.cc & 0x05)
                regs.pc += word;
@@ -758,7 +758,7 @@ static void Op23(void)                                                      // BLS
 
 static void Op24(void)                                                 // BCC (BHS)
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(regs.cc & 0x01))
                regs.pc += word;
@@ -768,7 +768,7 @@ static void Op24(void)                                                      // BCC (BHS)
 
 static void Op25(void)                                                 // BCS (BLO)
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (regs.cc & 0x01)
                regs.pc += word;
@@ -778,7 +778,7 @@ static void Op25(void)                                                      // BCS (BLO)
 
 static void Op26(void)                                                 // BNE
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(regs.cc & 0x04))
                regs.pc += word;
@@ -788,7 +788,7 @@ static void Op26(void)                                                      // BNE
 
 static void Op27(void)                                                 // BEQ
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (regs.cc & 0x04)
                regs.pc += word;
@@ -798,7 +798,7 @@ static void Op27(void)                                                      // BEQ
 
 static void Op28(void)                                                 // BVC
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(regs.cc & 0x02))
                regs.pc += word;
@@ -808,7 +808,7 @@ static void Op28(void)                                                      // BVC
 
 static void Op29(void)                                                 // BVS
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (regs.cc & 0x02)
                regs.pc += word;
@@ -818,7 +818,7 @@ static void Op29(void)                                                      // BVS
 
 static void Op2A(void)                                                 // BPL
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(regs.cc & 0x08))
                regs.pc += word;
@@ -828,7 +828,7 @@ static void Op2A(void)                                                      // BPL
 
 static void Op2B(void)                                                 // BMI
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (regs.cc & 0x08)
                regs.pc += word;
@@ -838,7 +838,7 @@ static void Op2B(void)                                                      // BMI
 
 static void Op2C(void)                                                 // BGE
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!(((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
                regs.pc += word;
@@ -848,7 +848,7 @@ static void Op2C(void)                                                      // BGE
 
 static void Op2D(void)                                                 // BLT
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))
                regs.pc += word;
@@ -858,7 +858,7 @@ static void Op2D(void)                                                      // BLT
 
 static void Op2E(void)                                                 // BGT
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if (!((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))))
                regs.pc += word;
@@ -868,7 +868,7 @@ static void Op2E(void)                                                      // BGT
 
 static void Op2F(void)                                                 // BLE
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
 
        if ((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
                regs.pc += word;
@@ -1180,7 +1180,7 @@ static void Op5F(void)  // CLRB
 static void Op60(void)  // NEG IDX
       {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
-        tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
+        tmp = regs.RdMem(addr);  uint8_t res = 256 - tmp;
         regs.WrMem(addr, res);
 //        ((res^tmp)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Adjust H carry
         (res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1212,7 +1212,7 @@ static void Op64(void)  // LSR IDX
 static void Op66(void)  // ROR IDX
       {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
-        tmp = regs.RdMem(addr);  uint8 tmp2 = tmp;
+        tmp = regs.RdMem(addr);  uint8_t tmp2 = tmp;
         tmp = (tmp >> 1) + (regs.cc&0x01)*128;
         regs.WrMem(addr, tmp);
         (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -1245,7 +1245,7 @@ static void Op68(void)  // LSL IDX
       }
 static void Op69(void)  // ROL IDX
 {
-  uint8 tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
+  uint8_t tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -1255,7 +1255,7 @@ static void Op69(void)  // ROL IDX
 }
 static void Op6A(void)  // DEC IDX
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = DecodeIDX(regs.RdMem(regs.pc++));
         tmp = regs.RdMem(addr) - 1;
         regs.WrMem(addr, tmp);
@@ -1296,7 +1296,7 @@ static void Op6F(void)  // CLR IDX
 static void Op70(void)  // NEG ABS
       {
         addr = FetchW();
-        tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
+        tmp = regs.RdMem(addr);  uint8_t res = 256 - tmp;
         regs.WrMem(addr, res);
         (res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
         (res == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
@@ -1326,9 +1326,9 @@ static void Op74(void)  // LSR ABS
       }
 static void Op76(void)  // ROR ABS
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = FetchW();
-        tmp = regs.RdMem(addr);  uint8 tmp2 = tmp;
+        tmp = regs.RdMem(addr);  uint8_t tmp2 = tmp;
         tmp = (tmp >> 1) + (regs.cc&0x01)*128;
         regs.WrMem(addr, tmp);
         (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -1338,7 +1338,7 @@ static void Op76(void)  // ROR ABS
       }
 static void Op77(void)  // ASR ABS
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = FetchW();
         tmp = regs.RdMem(addr);
         (tmp&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Shift bit into carry
@@ -1351,7 +1351,7 @@ static void Op77(void)  // ASR ABS
       }
 static void Op78(void)  // LSL ABS
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = FetchW();
         tmp = regs.RdMem(addr);
         (tmp&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Shift hi bit into carry
@@ -1363,7 +1363,7 @@ static void Op78(void)  // LSL ABS
       }
 static void Op79(void)  // ROL ABS
 {
-  uint8 tmp2 = regs.RdMem(FetchW());
+  uint8_t tmp2 = regs.RdMem(FetchW());
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -1373,7 +1373,7 @@ static void Op79(void)  // ROL ABS
 }
 static void Op7A(void)  // DEC ABS
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = FetchW();
         tmp = regs.RdMem(addr) - 1;
         regs.WrMem(addr, tmp);
@@ -1384,7 +1384,7 @@ static void Op7A(void)  // DEC ABS
       }
 static void Op7C(void)  // INC ABS
       {
-  uint8 tmp;  uint16 addr;
+  uint8_t tmp;  uint16_t addr;
         addr = FetchW();
         tmp = regs.RdMem(addr) + 1;
         regs.WrMem(addr, tmp);
@@ -1396,7 +1396,7 @@ static void Op7C(void)  // INC ABS
 
 static void Op7D(void)  // TST ABS
 {
-       uint8 tmp = regs.RdMem(FetchW());
+       uint8_t tmp = regs.RdMem(FetchW());
 
        (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
        (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
@@ -1417,7 +1417,7 @@ static void Op7F(void)  // CLR ABS
       }
 static void Op80(void)  // SUBA #
 {
-  uint8 tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
+  uint8_t tmp = regs.RdMem(regs.pc++);  uint8_t as = regs.a;
   regs.a -= tmp;
   (as < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1428,7 +1428,7 @@ static void Op80(void)  // SUBA #
 static void Op81(void)  // CMPA #
 {
   tmp = regs.RdMem(regs.pc++);
-  uint8 db = regs.a - tmp;
+  uint8_t db = regs.a - tmp;
   (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((regs.a^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -1437,7 +1437,7 @@ static void Op81(void)  // CMPA #
 }
 static void Op82(void)  // SBCA #
 {
-  tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
+  tmp = regs.RdMem(regs.pc++);  uint8_t as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1447,7 +1447,7 @@ static void Op82(void)  // SBCA #
 }
 static void Op83(void)  // SUBD #
 {
-  addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
+  addr = FetchW();  uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
   dr -= addr;
   (ds < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^addr^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1491,7 +1491,7 @@ static void Op88(void)  // EORA #
 static void Op89(void)  // ADCA #
 {
   tmp = regs.RdMem(regs.pc++);
-  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1522,7 +1522,7 @@ static void Op8B(void)  // ADDA #
 static void Op8C(void)  // CMPX #
 {
         addr = FetchW();
-        uint16 dw = regs.x - addr;
+        uint16_t dw = regs.x - addr;
         (regs.x < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
         ((regs.x^addr^dw^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
         (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -1532,7 +1532,7 @@ static void Op8C(void)  // CMPX #
 
 static void Op8D(void)                                                 // Bregs.s
 {
-       uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+       uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
        regs.WrMem(--regs.s, regs.pc & 0xFF);
        regs.WrMem(--regs.s, regs.pc >> 8);
        regs.pc += word;
@@ -1550,7 +1550,7 @@ static void Op8E(void)  // LDX #
       }
 static void Op90(void)  // SUBA DP
       {
-        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
+        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8_t as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1561,7 +1561,7 @@ static void Op90(void)  // SUBA DP
 static void Op91(void)  // CMPA DP
       {
         tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-        uint8 db = regs.a - tmp;
+        uint8_t db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1570,7 +1570,7 @@ static void Op91(void)  // CMPA DP
       }
 static void Op92(void)  // SBCA DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8_t as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1580,8 +1580,8 @@ static void Op92(void)  // SBCA DP
 }
 static void Op93(void)  // SUBD DP
 {
-  addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1633,7 +1633,7 @@ static void Op98(void)  // EORA DP
 static void Op99(void)  // ADCA DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1653,7 +1653,7 @@ static void Op9A(void)  // ORA DP
 static void Op9B(void)  // ADDA DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (uint16)regs.a + (uint16)tmp;
+  addr = (uint16_t)regs.a + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -1665,8 +1665,8 @@ static void Op9B(void)  // ADDA DP
 static void Op9C(void)  // CMPX DP
       {
         addr = (regs.dp<<8)|regs.RdMem(regs.pc++);
-        uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-        uint16 dw = regs.x - adr2;
+        uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+        uint16_t dw = regs.x - adr2;
         (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.x < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1700,7 +1700,7 @@ static void Op9F(void)  // STX DP
       }
 static void OpA0(void)  // SUBA IDX
       {
-        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
+        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8_t as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1711,7 +1711,7 @@ static void OpA0(void)  // SUBA IDX
 static void OpA1(void)  // CMPA IDX
       {
         tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-        uint8 db = regs.a - tmp;
+        uint8_t db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1720,7 +1720,7 @@ static void OpA1(void)  // CMPA IDX
       }
 static void OpA2(void)  // SBCA IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8_t as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1730,8 +1730,8 @@ static void OpA2(void)  // SBCA IDX
 }
 static void OpA3(void)  // SUBD IDX
 {
-  addr = DecodeIDX(regs.RdMem(regs.pc++));  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = DecodeIDX(regs.RdMem(regs.pc++));  uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1783,7 +1783,7 @@ static void OpA8(void)  // EORA IDX
 static void OpA9(void)  // ADCA IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -1803,7 +1803,7 @@ static void OpAA(void)  // ORA IDX
 static void OpAB(void)  // ADDA IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (uint16)regs.a + (uint16)tmp;
+  addr = (uint16_t)regs.a + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -1815,8 +1815,8 @@ static void OpAB(void)  // ADDA IDX
 static void OpAC(void)  // CMPX IDX
 {
   addr = DecodeIDX(regs.RdMem(regs.pc++));
-  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-  uint16 dw = regs.x - addr2;
+  uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  uint16_t dw = regs.x - addr2;
   (dw == 0    ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (dw&0x8000  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1850,7 +1850,7 @@ static void OpAF(void)  // STX IDX
 }
 static void OpB0(void)  // SUBA ABS
       {
-        tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
+        tmp = regs.RdMem(FetchW());  uint8_t as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1861,7 +1861,7 @@ static void OpB0(void)  // SUBA ABS
 static void OpB1(void)  // CMPA ABS
       {
         tmp = regs.RdMem(FetchW());
-        uint8 db = regs.a - tmp;
+        uint8_t db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1870,7 +1870,7 @@ static void OpB1(void)  // CMPA ABS
       }
 static void OpB2(void)  // SBCA ABS
 {
-  tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
+  tmp = regs.RdMem(FetchW());  uint8_t as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1880,8 +1880,8 @@ static void OpB2(void)  // SBCA ABS
 }
 static void OpB3(void)  // SUBD ABS
 {
-  addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = FetchW();  uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
@@ -1933,7 +1933,7 @@ static void OpB8(void)  // EORA ABS
 static void OpB9(void)  // ADCA ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1953,7 +1953,7 @@ static void OpBA(void)  // ORA ABS
 static void OpBB(void)  // ADDA ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (uint16)regs.a + (uint16)tmp;
+  addr = (uint16_t)regs.a + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -1964,8 +1964,8 @@ static void OpBB(void)  // ADDA ABS
 }
 static void OpBC(void)  // CMPX ABS
 {
-  addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-  uint16 dw = regs.x - addr2;
+  addr = FetchW();  uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  uint16_t dw = regs.x - addr2;
   (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2008,7 +2008,7 @@ static void OpBF(void)                                                                    // STX ABS
 
 static void OpC0(void)  // SUBB #
       {
-        tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
+        tmp = regs.RdMem(regs.pc++);  uint8_t bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2019,7 +2019,7 @@ static void OpC0(void)  // SUBB #
 static void OpC1(void)  // CMPB #
       {
         tmp = regs.RdMem(regs.pc++);
-        uint8 db = regs.b - tmp;
+        uint8_t db = regs.b - tmp;
         (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
         ((regs.b^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -2028,7 +2028,7 @@ static void OpC1(void)  // CMPB #
       }
 static void OpC2(void)  // SBCB #
 {
-  tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
+  tmp = regs.RdMem(regs.pc++);  uint8_t bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2083,7 +2083,7 @@ static void OpC8(void)  // EORB #
 static void OpC9(void)  // ADCB #
 {
   tmp = regs.RdMem(regs.pc++);
-  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -2129,7 +2129,7 @@ static void OpCE(void)  // LDU #
 }
 static void OpD0(void)  // SUBB DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8_t bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2140,7 +2140,7 @@ static void OpD0(void)  // SUBB DP
 static void OpD1(void)  // CMPB DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  uint8 db = regs.b - tmp;
+  uint8_t db = regs.b - tmp;
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2149,7 +2149,7 @@ static void OpD1(void)  // CMPB DP
 }
 static void OpD2(void)  // SBCB DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8_t bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2160,7 +2160,7 @@ static void OpD2(void)  // SBCB DP
 static void OpD3(void)  // ADDD DP
 {
   addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2213,7 +2213,7 @@ static void OpD8(void)  // EORB DP
 static void OpD9(void)  // ADCB DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2233,7 +2233,7 @@ static void OpDA(void)  // ORB DP
 static void OpDB(void)  // ADDB DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (uint16)regs.b + (uint16)tmp;
+  addr = (uint16_t)regs.b + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2280,7 +2280,7 @@ static void OpDF(void)  // STU DP
 }
 static void OpE0(void)  // SUBB IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8_t bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2291,7 +2291,7 @@ static void OpE0(void)  // SUBB IDX
 static void OpE1(void)  // CMPB IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  uint8 db = regs.b - tmp;
+  uint8_t db = regs.b - tmp;
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2300,7 +2300,7 @@ static void OpE1(void)  // CMPB IDX
 }
 static void OpE2(void)  // SBCB IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8_t bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2311,7 +2311,7 @@ static void OpE2(void)  // SBCB IDX
 static void OpE3(void)  // ADDD IDX
 {
   addr = DecodeIDX(regs.RdMem(regs.pc++));  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2364,7 +2364,7 @@ static void OpE8(void)  // EORB IDX
 static void OpE9(void)  // ADCB IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2384,7 +2384,7 @@ static void OpEA(void)  // ORB IDX
 static void OpEB(void)  // ADDB IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (uint16)regs.b + (uint16)tmp;
+  addr = (uint16_t)regs.b + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2431,7 +2431,7 @@ static void OpEF(void)  // STU IDX
 }
 static void OpF0(void)  // SUBB ABS
       {
-        tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
+        tmp = regs.RdMem(FetchW());  uint8_t bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2441,7 +2441,7 @@ static void OpF0(void)  // SUBB ABS
 static void OpF1(void)  // CMPB ABS
       {
         tmp = regs.RdMem(FetchW());
-        uint8 db = regs.b - tmp;
+        uint8_t db = regs.b - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2450,7 +2450,7 @@ static void OpF1(void)  // CMPB ABS
       }
 static void OpF2(void)  // SBCB ABS
 {
-  tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
+  tmp = regs.RdMem(FetchW());  uint8_t bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2461,7 +2461,7 @@ static void OpF2(void)  // SBCB ABS
 static void OpF3(void)  // ADDD ABS
 {
   addr = FetchW();  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2514,7 +2514,7 @@ static void OpF8(void)  // EORB ABS
 static void OpF9(void)  // ADCB ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+  addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -2534,7 +2534,7 @@ static void OpFA(void)  // ORB ABS
 static void OpFB(void)  // ADDB ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (uint16)regs.b + (uint16)tmp;
+  addr = (uint16_t)regs.b + (uint16_t)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -2593,7 +2593,7 @@ static void Op1021(void)                                          // LBRN
 
 static void Op1022(void)                                               // LBHI
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!((regs.cc & 0x01) | (regs.cc & 0x04)))
                regs.pc += word;
@@ -2603,7 +2603,7 @@ static void Op1022(void)                                          // LBHI
 
 static void Op1023(void)                                               // LBLS
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if ((regs.cc & 0x01) | (regs.cc & 0x04))
                regs.pc += word;
@@ -2613,7 +2613,7 @@ static void Op1023(void)                                          // LBLS
 
 static void Op1024(void)                                               // LBCC (LBHS)
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!(regs.cc & 0x01))
                regs.pc += word;
@@ -2623,7 +2623,7 @@ static void Op1024(void)                                          // LBCC (LBHS)
 
 static void Op1025(void)                                               // LBCS (LBLO)
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (regs.cc & 0x01)
                regs.pc += word;
@@ -2633,7 +2633,7 @@ static void Op1025(void)                                          // LBCS (LBLO)
 
 static void Op1026(void)                                               // LBNE
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!(regs.cc & 0x04))
                regs.pc += word;
@@ -2643,7 +2643,7 @@ static void Op1026(void)                                          // LBNE
 
 static void Op1027(void)                                               // LBEQ
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (regs.cc & 0x04)
                regs.pc += word;
@@ -2653,7 +2653,7 @@ static void Op1027(void)                                          // LBEQ
 
 static void Op1028(void)                                               // LBVC
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!(regs.cc & 0x02))
                regs.pc += word;
@@ -2663,7 +2663,7 @@ static void Op1028(void)                                          // LBVC
 
 static void Op1029(void)                                               // LBVS
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (regs.cc & 0x02)
                regs.pc += word;
@@ -2673,7 +2673,7 @@ static void Op1029(void)                                          // LBVS
 
 static void Op102A(void)                                               // LBPL
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!(regs.cc & 0x08))
                regs.pc += word;
@@ -2683,7 +2683,7 @@ static void Op102A(void)                                          // LBPL
 
 static void Op102B(void)                                               // LBMI
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (regs.cc & 0x08)
                regs.pc += word;
@@ -2693,7 +2693,7 @@ static void Op102B(void)                                          // LBMI
 
 static void Op102C(void)                                               // LBGE
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!(((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
                regs.pc += word;
@@ -2703,7 +2703,7 @@ static void Op102C(void)                                          // LBGE
 
 static void Op102D(void)                                               // LBLT
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))
                regs.pc += word;
@@ -2713,7 +2713,7 @@ static void Op102D(void)                                          // LBLT
 
 static void Op102E(void)                                               // LBGT
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if (!((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))))
                regs.pc += word;
@@ -2723,7 +2723,7 @@ static void Op102E(void)                                          // LBGT
 
 static void Op102F(void)                                               // LBLE
 {
-       uint16 word = FetchW();
+       uint16_t word = FetchW();
 
        if ((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
                regs.pc += word;
@@ -2737,18 +2737,18 @@ static void Op103F(void)  // SWI2 (Not yet implemented)
 }
 static void Op1083(void)  // CMPD #
     {
-      addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b;
-      uint16 dw = dr - addr;
+      addr = FetchW();  uint16_t dr = (regs.a<<8)|regs.b;
+      uint16_t dw = dr - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
-      ((dr^addr^dw^((uint16)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
+      ((dr^addr^dw^((uint16_t)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
       regs.clock += 5;
     }
 static void Op108C(void)  // CMPY #
     {
       addr = FetchW();
-      uint16 dw = regs.y - addr;
+      uint16_t dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2765,9 +2765,9 @@ static void Op108E(void)  // LDY #
     }
 static void Op1093(void)  // CMPD DP
     {
-      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
+      uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      uint16 dw = dr - addr;
+      uint16_t dw = dr - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2776,9 +2776,9 @@ static void Op1093(void)  // CMPD DP
     }
 static void Op109C(void)  // CMPY DP
     {
-      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      uint16 dw = regs.y - addr;
+      uint16_t dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2807,9 +2807,9 @@ static void Op109F(void)  // STY DP
     }
 static void Op10A3(void)  // CMPD IDX
 {
-  uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
+  uint16_t adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
   addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-  uint16 dw = dr - addr;
+  uint16_t dw = dr - addr;
   regs.cc &= 0xF0;                              // CLC CLV CLZ CLN
   if (dr < addr)  regs.cc |= 0x01;              // Set Carry flag
   if ((dr^addr^dw^(regs.cc<<15))&0x8000)  regs.cc |= 0x02; // Set oVerflow
@@ -2819,9 +2819,9 @@ static void Op10A3(void)  // CMPD IDX
 }
 static void Op10AC(void)  // CMPY IDX
     {
-      uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16_t adr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      uint16 dw = regs.y - addr;
+      uint16_t dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2848,9 +2848,9 @@ static void Op10AF(void)  // STY IDX
     }
 static void Op10B3(void)  // CMPD ABS
     {
-      addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b;
-      uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      uint16 dw = dr - addr2;
+      addr = FetchW();  uint16_t dr = (regs.a<<8)|regs.b;
+      uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16_t dw = dr - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2859,8 +2859,8 @@ static void Op10B3(void)  // CMPD ABS
     }
 static void Op10BC(void)  // CMPY ABS
     {
-      addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      uint16 dw = regs.y - addr2;
+      addr = FetchW();  uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16_t dw = regs.y - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2959,7 +2959,7 @@ static void Op113F(void)  // SWI3
 static void Op1183(void)  // CMPU #
     {
       addr = FetchW();
-      uint16 dw = regs.u - addr;
+      uint16_t dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2969,7 +2969,7 @@ static void Op1183(void)  // CMPU #
 static void Op118C(void)  // CMPS #
     {
       addr = FetchW();
-      uint16 dw = regs.s - addr;
+      uint16_t dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2978,9 +2978,9 @@ static void Op118C(void)  // CMPS #
     }
 static void Op1193(void)  // CMPU DP
     {
-      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      uint16 dw = regs.u - addr;
+      uint16_t dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2989,9 +2989,9 @@ static void Op1193(void)  // CMPU DP
     }
 static void Op119C(void)  // CMPS DP
     {
-      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      uint16 dw = regs.s - addr;
+      uint16_t dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -3000,9 +3000,9 @@ static void Op119C(void)  // CMPS DP
     }
 static void Op11A3(void)  // CMPU IDX
     {
-      uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16_t addr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
-      uint16 dw = regs.u - addr;
+      uint16_t dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -3011,9 +3011,9 @@ static void Op11A3(void)  // CMPU IDX
     }
 static void Op11AC(void)  // CMPS IDX
     {
-      uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16_t addr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
-      uint16 dw = regs.s - addr;
+      uint16_t dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -3022,8 +3022,8 @@ static void Op11AC(void)  // CMPS IDX
     }
 static void Op11B3(void)  // CMPU ABS
     {
-      addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      uint16 dw = regs.u - addr2;
+      addr = FetchW();  uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16_t dw = regs.u - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -3033,8 +3033,8 @@ static void Op11B3(void)  // CMPU ABS
 
 static void Op11BC(void)  // CMPS ABS
 {
-       addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-       uint16 dw = regs.s - addr2;
+       addr = FetchW();  uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+       uint16_t dw = regs.s - addr2;
        (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
        (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
        (regs.s < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -3044,8 +3044,8 @@ static void Op11BC(void)  // CMPS ABS
 
 //temp, for testing...
 #ifdef __DEBUG__
-static uint8 backTrace[256];
-static uint16 btPC[256];
+static uint8_t backTrace[256];
+static uint16_t btPC[256];
 static int btPtr = 0;//*/
 #endif
 static void Op__(void)                                                                 // Illegal opcode
@@ -3067,11 +3067,11 @@ for(int i=0; i<256; i++)
 //
 // Internal "memcpy" (so we don't have to link with any external libraries!)
 //
-static void myMemcpy(void * dst, void * src, uint32 size)
+static void myMemcpy(void * dst, void * src, uint32_t size)
 {
-       uint8 * d = (uint8 *)dst, * s = (uint8 *)src;
+       uint8_t * d = (uint8_t *)dst, * s = (uint8_t *)src;
 
-       for(uint32 i=0; i<size; i++)
+       for(uint32_t i=0; i<size; i++)
                d[i] = s[i];
 }
 
@@ -3082,8 +3082,8 @@ static void myMemcpy(void * dst, void * src, uint32 size)
 #ifdef DEBUG_ILLEGAL
 #include "log.h"
 #include "dis6809.h"
-uint8 btPtr = 0;
-uint8 backTrace[256];
+uint8_t btPtr = 0;
+uint8_t backTrace[256];
 V6809REGS btRegs[256];
 bool tripped = false;
 #endif
@@ -3092,7 +3092,7 @@ bool tripped = false;
 bool disasm = false;
 //bool disasm = true;
 #endif
-void Execute6809(V6809REGS * context, uint32 cycles)
+void Execute6809(V6809REGS * context, uint32_t cycles)
 {
        // If this is not in place, the clockOverrun calculations can cause the V6809 to get
        // stuck in an infinite loop.
@@ -3109,7 +3109,7 @@ void Execute6809(V6809REGS * context, uint32 cycles)
        // through we remove them from the cycles passed in in order to come out
        // approximately even. Over the long run, this unevenness in execution times
        // evens out.
-       uint64 endCycles = regs.clock + (uint64)(cycles - regs.clockOverrun);
+       uint64_t endCycles = regs.clock + (uint64_t)(cycles - regs.clockOverrun);
 
        while (regs.clock < endCycles)
        {
@@ -3125,7 +3125,7 @@ if (!tripped)
                WriteLog("V6809: Executed illegal instruction!!!!\n\nBacktrace:\n\n");
                regs.cpuFlags &= ~V6809_STATE_ILLEGAL_INST;
 
-               for(uint16 i=btPtr; i<btPtr+256; i++)
+               for(uint16_t i=btPtr; i<btPtr+256; i++)
                {
                        Decode6809(btRegs[i & 0xFF].pc);
 // Note that these values are *before* execution, so stale...
@@ -3156,8 +3156,8 @@ btPtr = (btPtr + 1) & 0xFF;//*/
                // Handle any pending interrupts
 
 // Hmm, this is bad and only works when flags are changed OUTSIDE of the running context...
-//             uint32 flags = context->cpuFlags;
-               uint32 flags = regs.cpuFlags;
+//             uint32_t flags = context->cpuFlags;
+               uint32_t flags = regs.cpuFlags;
 
                if (flags & V6809_ASSERT_LINE_RESET)                    // *** RESET handler ***
                {
@@ -3264,7 +3264,7 @@ if (disasm) WriteLog("\tCC=%s%s%s%s%s%s%s%s A=%02X B=%02X DP=%02X X=%04X Y=%04X
 #endif
        }
        // Keep track of how much we overran so we can adjust on the next run...
-       regs.clockOverrun = (uint32)(regs.clock - endCycles);
+       regs.clockOverrun = (uint32_t)(regs.clock - endCycles);
 
        myMemcpy(context, &regs, sizeof(V6809REGS));
 
@@ -3277,7 +3277,7 @@ if (disasm) WriteLog("\tCC=%s%s%s%s%s%s%s%s A=%02X B=%02X DP=%02X X=%04X Y=%04X
 //
 // Get the clock of the currently executing CPU
 //
-uint64 GetCurrentV6809Clock(void)
+uint64_t GetCurrentV6809Clock(void)
 {
        return regs.clock;
 }
@@ -3285,19 +3285,19 @@ uint64 GetCurrentV6809Clock(void)
 //
 // Get the PC of the currently executing CPU
 //
-uint16 GetCurrentV6809PC(void)
+uint16_t GetCurrentV6809PC(void)
 {
        return regs.pc;
 }
 
 // Set a line of the currently executing CPU
-void SetLineOfCurrentV6809(uint32 line)
+void SetLineOfCurrentV6809(uint32_t line)
 {
        regs.cpuFlags |= line;
 }
 
 // Clear a line of the currently executing CPU
-void ClearLineOfCurrentV6809(uint32 line)
+void ClearLineOfCurrentV6809(uint32_t line)
 {
 #ifdef __DEBUG__
 if (disasm)