According to this, the HD63701 is equivalent to a 6808! Joy! Or is it... Hmm... #if (HAS_M6800 || HAS_M6801 || HAS_M6802 || HAS_M6803 || HAS_M6808 || HAS_HD63701) #include "cpu/m6800/m6800.h" #endif roms R1-R2 contain 6809 instructions (32K) rom R3 contains 4 8K chunks. Mapped to CPU #2 ($6000-7FFF. BS is at $D803.) (32K) rom R4 contains 2 16K chunks. Mapped to CPU #2? (32K) Possibly only seen by custom IC. Possibly music data. rom R5 contains character data encoded hi nibble/lo nibble in an array of 2x8 bytes. (overlap determines 3rd color + 1x8 bytes from R6 determine 4 more colors [3 bit color]) (32K, 16K, 64K, 32K) roms R5,6 & R7,8 contain character data encoded hi/lo nibble, bits (8x8 pixels) roms R9-R16 contain sprite data in 4-bit encoded pixels, in an array of 8x16 bytes. (16x16 pixels) (all following are 64K) roms R17-R20 contain screen tile data (mapped to $6000-7FFF of CPU #1. Bank switch is at $6600. 32 8K chunks) roms R21-R22 contain PCM sample data (encoded 8 bits at 5512.5 Hz) Char matrix is 36x28 (Text mode) -> CMOS seems to be mapped to $5400 in RAM1... TOP 5 SCORE AREA INI'T 1ST 30000 5 ALB 2ND 20000 4 LIR 3RD 10000 3 GLR 4TH 8000 2 MAB 5TH 4000 1 MPI $8A14 (ROM1) is the start of the routine that puts the self-test text on the screen... $89E2 (ROM1) is entry point for self-test routine, w/0-4 in $542B (# of routine to call) Dipswitch 1&2 are mapped to $423D-4C, $424D-5C (odds only) $4268 is mapped to the test pattern switch $423D is self-test switch $4000-?(maybe to 40FF) seems to be involved with sprite processing. $4900 seems to be sprite address (to start. Normally $FF, but then $60) First byte seems to be an enable (16 bytes per sprite?) $4400-441F is Albatross sprite (32 bytes per sprite?) $9000-9002, 9004-9006, 9400-9402, 9404-9406 are screen base addresses. Initial values are: 020C, 060E, 0A0B, 0E0D (inc/dec by 2s, except last) Scr initial offsets are 0118, 1118, 2118, 3208 $6800 is bank switch for CPU #1 (32 8K banks) $D803 is bank switch for CPU #2 (4 8K banks) $6000, 6200, 6400, 6600 are voice. 6200 & 6600 are sample # to play, 6000 & 6400 are the strobe lines. PSG: CPU #1's stack is mapped to $5FFF, #2 to $43FF DIPSWITCH SETTINGS: 1-1: On-self test, off-normal 1-2 & 1-3: 00-1coin1credit (left) 01-1coin3credits 10-2coin1credit 11-3coin1credit 1-4: on-no attract sound, off-sound 1-5: Factory use only-always off, never on 1-6: Screen Hold-off normal, on hold 1-7 & 1-8: coin per credit (right) 00-1coin1credit 01-1coin2credit 10-1coin5credit 11-1coin6credit 2-1: Number of Lives-off 3, on 5 2-2: Bonus lives-off 70K/200K, on 100K/300K 2-3: Timer: off 120, on 150 2-4: Difficulty-off Normal, on easy 2-5: select level-off no, on yes 2-6 & 2-7: Cabinet type 00 Type A(upright) 01 Type B(cocktail, no flip) 10 undefined 11 Type C(cocktail, flip) 2-8: Continuation-off 6 games max, on 3 games max Date: Thu, 30 Jul 1998 18:45:51 -0500 From: Lee Saito To: Jimmy Hamm Subject: Re: Rolling Thunder clock freqs Jimmy Hamm wrote: > >> I need to know the clock frequency and IRQ frequency of both processors, > so > >> if you could look at the E and Q lines (pins 34 and 35 of the 6809s) and > the > >> IRQ lines (pin 3 of the 6809s) that would be great! > > OK. I'm looking at the signals now... First, processor at 11A: pin 3 (IRQ line): Pulses vary in duration, making it somewhat difficult to determine frequency, but it's about 60 Hz (around 16 -17ms per pulse, 60Hz would be 16.6ms, I think) This seems to be tied to the sound processor? (pulses get real short when no sounds are playing) pin 35: approx 650 ns/cycle = 1.538 MHz pin 34: same as 35 (1.538 Mhz) Processor at 9A: Pin 3: Same as 11A (looks like 60Hz to me) Pin 35: Same as other processor (1.538 MHz) pin 34: Same as other processor (1.538 MHz) Hope this helps! ;)