Fixed the dreaded demo failing bug! HUZZAH! Turned out to be an IRQ line

[stargem2] / src / v6809.cpp

diff --git a/src/v6809.cpp b/src/v6809.cpp
index 648d02b8d2f15ee5632cb545edc1c0e762add828..45e072d1363bff8b92d294049695534eb699b148 100755 (executable)
--- a/src/v6809.cpp
+++ b/src/v6809.cpp
@@ -599,8 +599,8 @@ static void Op0D(void)  // TST DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
   regs.cc &= 0xFD;                              // CLV
-  (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-  (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+  (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+  (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
   regs.clock += 6;
 }
 static void Op0E(void)  // JMP DP
@@ -666,7 +666,7 @@ static void Op19(void)  // DAA
     regs.a += 0x60;  regs.cc |= 0x01;              // Then adjust & set carry
   }
   regs.cc &= 0xF1;                             // CL NZV
-  if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag 
+  if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
   if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
   regs.clock += 2;
 }
@@ -993,7 +993,7 @@ static void Op3F(void)  // SWI
 {
 }
 static void Op40(void)  // NEGA
-{ 
+{
   regs.a = 256 - regs.a;
   (regs.a > 0x7F  ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust carry
   (regs.a == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1042,7 +1042,7 @@ static void Op48(void)  // LSLA  [Keep checking from here...]
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   regs.clock += 2;
 }
-static void Op49(void)  // ROLA  
+static void Op49(void)  // ROLA
 {
   tmp = regs.a;  regs.a = (tmp<<1) + (regs.cc&0x01);
   (tmp&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -1080,7 +1080,7 @@ static void Op4F(void)  // CLRA
   regs.clock += 2;
 }
 static void Op50(void)  // NEGB
-      { 
+      {
         regs.b = 256 - regs.b;
 //        ((regs.b^tmp)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Adjust H carry
         (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1150,7 +1150,7 @@ static void Op5A(void)  // DECB
 static void Op5C(void)  // INCB
       {
         regs.b++;
-        (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // Adjust oVerflow flag 
+        (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // Adjust oVerflow flag
         (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);    // Adjust Zero flag
         (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);    // Adjust Negative flag
         regs.clock += 2;
@@ -1169,7 +1169,7 @@ static void Op5F(void)  // CLRB
         regs.clock += 2;
       }
 static void Op60(void)  // NEG IDX
-      { 
+      {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
         tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
         regs.WrMem(addr, res);
@@ -1256,7 +1256,7 @@ static void Op6A(void)  // DEC IDX
         regs.clock += 6;
       }
 static void Op6C(void)  // INC IDX
-      {       
+      {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
         tmp = regs.RdMem(addr) + 1;
         regs.WrMem(addr, tmp);
@@ -1268,8 +1268,8 @@ static void Op6C(void)  // INC IDX
 static void Op6D(void)  // TST IDX
       {
         tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-        (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-        (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+        (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+        (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
         regs.clock += 6;
       }
 static void Op6E(void)  // JMP IDX
@@ -1285,7 +1285,7 @@ static void Op6F(void)  // CLR IDX
   regs.clock += 6;
 }
 static void Op70(void)  // NEG ABS
-      { 
+      {
         addr = FetchW();
         tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
         regs.WrMem(addr, res);
@@ -1374,7 +1374,7 @@ static void Op7A(void)  // DEC ABS
         regs.clock += 7;
       }
 static void Op7C(void)  // INC ABS
-      {       
+      {
   uint8 tmp;  uint16 addr;
         addr = FetchW();
         tmp = regs.RdMem(addr) + 1;
@@ -1389,8 +1389,8 @@ static void Op7D(void)  // TST ABS
 {
        uint8 tmp = regs.RdMem(FetchW());
 
-       (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-       (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+       (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+       (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
 
        regs.clock += 7;
 }
@@ -1407,8 +1407,8 @@ static void Op7F(void)  // CLR ABS
         regs.clock += 7;
       }
 static void Op80(void)  // SUBA #
-{ 
-  uint8 tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a; 
+{
+  uint8 tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
   regs.a -= tmp;
   (as < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1428,7 +1428,7 @@ static void Op81(void)  // CMPA #
 }
 static void Op82(void)  // SBCA #
 {
-  tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a; 
+  tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1485,7 +1485,7 @@ static void Op89(void)  // ADCA #
   addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative
@@ -1500,11 +1500,11 @@ static void Op8A(void)  // ORA #
         regs.clock += 2;
       }
 static void Op8B(void)  // ADDA #
-{       
+{
   tmp = regs.RdMem(regs.pc++);  addr = regs.a + tmp;
   (addr > 0xFF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1540,8 +1540,8 @@ static void Op8E(void)  // LDX #
         regs.clock += 3;
       }
 static void Op90(void)  // SUBA DP
-      { 
-        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a; 
+      {
+        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1561,7 +1561,7 @@ static void Op91(void)  // CMPA DP
       }
 static void Op92(void)  // SBCA DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a; 
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1627,7 +1627,7 @@ static void Op99(void)  // ADCA DP
   addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative
@@ -1642,12 +1642,12 @@ static void Op9A(void)  // ORA DP
         regs.clock += 4;
       }
 static void Op9B(void)  // ADDA DP
-{       
+{
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
   addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1690,8 +1690,8 @@ static void Op9F(void)  // STX DP
         regs.clock += 5;
       }
 static void OpA0(void)  // SUBA IDX
-      { 
-        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a; 
+      {
+        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1711,7 +1711,7 @@ static void OpA1(void)  // CMPA IDX
       }
 static void OpA2(void)  // SBCA IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a; 
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1777,7 +1777,7 @@ static void OpA9(void)  // ADCA IDX
   addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1792,12 +1792,12 @@ static void OpAA(void)  // ORA IDX
   regs.clock += 4;
 }
 static void OpAB(void)  // ADDA IDX
-{       
+{
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
   addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1840,8 +1840,8 @@ static void OpAF(void)  // STX IDX
   regs.clock += 5;
 }
 static void OpB0(void)  // SUBA ABS
-      { 
-        tmp = regs.RdMem(FetchW());  uint8 as = regs.a; 
+      {
+        tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1861,7 +1861,7 @@ static void OpB1(void)  // CMPA ABS
       }
 static void OpB2(void)  // SBCA ABS
 {
-  tmp = regs.RdMem(FetchW());  uint8 as = regs.a; 
+  tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1927,7 +1927,7 @@ static void OpB9(void)  // ADCA ABS
   addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr;                              // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1942,7 +1942,7 @@ static void OpBA(void)  // ORA ABS
   regs.clock += 5;
 }
 static void OpBB(void)  // ADDA ABS
-{       
+{
   tmp = regs.RdMem(FetchW());
   addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
@@ -1967,7 +1967,7 @@ static void OpBD(void)  // JSR ABS
 {
   addr = FetchW();
   regs.WrMem(--regs.s, regs.pc&0xFF);  regs.WrMem(--regs.s, regs.pc>>8);
-  regs.pc = addr;                          // Go to absolute address (Not indir) 
+  regs.pc = addr;                          // Go to absolute address (Not indir)
   regs.clock += 8;
 }
 
@@ -1998,8 +1998,8 @@ static void OpBF(void)                                                                    // STX ABS
 }
 
 static void OpC0(void)  // SUBB #
-      { 
-        tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b; 
+      {
+        tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2019,7 +2019,7 @@ static void OpC1(void)  // CMPB #
       }
 static void OpC2(void)  // SBCB #
 {
-  tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b; 
+  tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2077,7 +2077,7 @@ static void OpC9(void)  // ADCB #
   addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2092,11 +2092,11 @@ static void OpCA(void)  // ORB #
         regs.clock += 2;
       }
 static void OpCB(void)  // ADDB #
-{       
+{
   tmp = regs.RdMem(regs.pc++);  addr = regs.b + tmp;
   (addr > 0xFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2119,8 +2119,8 @@ static void OpCE(void)  // LDU #
   regs.clock += 3;
 }
 static void OpD0(void)  // SUBB DP
-{ 
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b; 
+{
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2140,7 +2140,7 @@ static void OpD1(void)  // CMPB DP
 }
 static void OpD2(void)  // SBCB DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b; 
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2207,7 +2207,7 @@ static void OpD9(void)  // ADCB DP
   addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2222,12 +2222,12 @@ static void OpDA(void)  // ORB DP
         regs.clock += 4;
       }
 static void OpDB(void)  // ADDB DP
-{       
+{
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
   addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2270,8 +2270,8 @@ static void OpDF(void)  // STU DP
   regs.clock += 5;
 }
 static void OpE0(void)  // SUBB IDX
-{ 
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b; 
+{
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2291,7 +2291,7 @@ static void OpE1(void)  // CMPB IDX
 }
 static void OpE2(void)  // SBCB IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b; 
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2358,7 +2358,7 @@ static void OpE9(void)  // ADCB IDX
   addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2373,12 +2373,12 @@ static void OpEA(void)  // ORB IDX
         regs.clock += 4;
       }
 static void OpEB(void)  // ADDB IDX
-{       
+{
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
   addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2421,8 +2421,8 @@ static void OpEF(void)  // STU IDX
   regs.clock += 5;
 }
 static void OpF0(void)  // SUBB ABS
-      { 
-        tmp = regs.RdMem(FetchW());  uint8 bs = regs.b; 
+      {
+        tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2441,7 +2441,7 @@ static void OpF1(void)  // CMPB ABS
       }
 static void OpF2(void)  // SBCB ABS
 {
-  tmp = regs.RdMem(FetchW());  uint8 bs = regs.b; 
+  tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2508,7 +2508,7 @@ static void OpF9(void)  // ADCB ABS
   addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2521,14 +2521,14 @@ static void OpFA(void)  // ORB ABS
         (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         regs.clock += 5;
-      }       
+      }
 static void OpFB(void)  // ADDB ABS
-{       
+{
   tmp = regs.RdMem(FetchW());
   addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2891,7 +2891,7 @@ static void Op10DE(void)  // LDS DP
       regs.cc &= 0xFD;                              // CLV
       (regs.s == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (regs.s&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
-      regs.clock += 6;                     
+      regs.clock += 6;
     }
 static void Op10DF(void)  // STS DP
     {
@@ -3184,8 +3184,9 @@ if (disasm) WriteLog("       IRQ taken...\n");
                                regs.cc |= FLAG_I;                                              // Specs say that it doesn't affect FIRQ... or FLAG_F [WAS: Set IRQ/FIRQ suppress flags]
                                regs.pc = RdMemW(0xFFF8);                               // And load PC with the IRQ vector
                                regs.clock += 19;
-                               context->cpuFlags &= ~V6809_ASSERT_LINE_IRQ;    // Reset the asserted line (IRQ)...
-                               regs.cpuFlags &= ~V6809_ASSERT_LINE_IRQ;        // Reset the asserted line (IRQ)...
+// Apparently, not done here!
+//                             context->cpuFlags &= ~V6809_ASSERT_LINE_IRQ;    // Reset the asserted line (IRQ)...
+//                             regs.cpuFlags &= ~V6809_ASSERT_LINE_IRQ;        // Reset the asserted line (IRQ)...
                        }
                }
 #ifdef __DEBUG__
@@ -3206,3 +3207,23 @@ uint32 GetCurrentV6809Clock(void)
 {
        return regs.clock;
 }
+
+//
+// Get the PC of the currently executing CPU
+//
+uint16 GetCurrentV6809PC(void)
+{
+       return regs.pc;
+}
+
+// Set a line of the currently executing CPU
+void SetLine(uint32 line)
+{
+       regs.cpuFlags |= line;
+}
+
+// Clear a line of the currently executing CPU
+void ClearLine(uint32 line)
+{
+       regs.cpuFlags &= ~line;
+}