Fixed the dreaded demo failing bug! HUZZAH! Turned out to be an IRQ line

[stargem2] / src / v6808.cpp

diff --git a/src/v6808.cpp b/src/v6808.cpp
index b26cb4af4e0a2551d2f1e86599a7d06101fdf8f2..b7691cf4122bcbca0f2b4c30a1648faa1de79051 100755 (executable)
--- a/src/v6808.cpp
+++ b/src/v6808.cpp
@@ -2021,11 +2021,11 @@ static void Op07(void)                                                  // TPA
    5 Test: Operand=01111111 prior to execution?
    6 Test: Set equal to result or N(+)C after shift has occurred.
    7 Test: Sign bit of most significant byte or result=1?
-   8 Test: 2's compliment overflow from subtraction of least 
+   8 Test: 2's compliment overflow from subtraction of least
            significant bytes?
    9 Test: Result less than zero? (Bit 15=1)
    A Load Condition Code Register from Stack.
-   B Set when interrupt occurs.  If previously set, a NMI is 
+   B Set when interrupt occurs.  If previously set, a NMI is
         required to exit the wait state.
    C Set according to the contents of Accumulator A.
 
@@ -2036,10 +2036,10 @@ static void Op07(void)                                                  // TPA
    *2    +-----------------+
          +> C -> 76543210 -+
 
-   *3       C <- 76543210 <- 0(Data) 
+   *3       C <- 76543210 <- 0(Data)
                +-+
 
-   *4          À>76543210 -> C
+   *4          �>76543210 -> C
 
    *5 (Data)0 -> 76543210 -> C