From 2ede3731285f3bc20f5493de593442e872db4d32 Mon Sep 17 00:00:00 2001 From: ggn Date: Wed, 29 Nov 2017 21:28:44 +0200 Subject: [PATCH] Various small fixes and additions to the 680x0 parts: - New command line switch -m[cpu] enables you to switch to a different cpu from the command line - BYTESWAP64 macro fix - New optimisation flags o6 and o7 turn null branches to NOP and convert clr.l Dx to moveq #0,Dx - Remove tons of FPU/PMMU codegen functions in mech.c. They are now handled in a more smart way. Condition codes now stored in 68ktab - updated 68ktab to reflect that --- 6502.c | 2 +- 68ktab | 374 ++++++++++++++++++------------------ direct.h | 12 ++ mach.c | 564 ++++++++++++++----------------------------------------- rmac.c | 42 +++++ rmac.h | 4 +- sect.c | 15 +- 7 files changed, 393 insertions(+), 620 deletions(-) diff --git a/6502.c b/6502.c index 2fc971d..8c16d8d 100644 --- a/6502.c +++ b/6502.c @@ -364,7 +364,7 @@ void m6502cg(int op) else goto badmode; - tok += 3; // Past SYMBOL ')' EOL + tok += 3; // Past SYMBOL ')' EOL zpreq = 1; // Request zeropage optimization } else if (*tok == EOL) diff --git a/68ktab b/68ktab index 2410ad5..a572a3f 100644 --- a/68ktab +++ b/68ktab @@ -113,7 +113,8 @@ cinva N M_CACHE40 M_AM_NONE %11110100cc011rrr m_cinv chk2 NBWL C_DATA M_DREG+M_AREG %00000ss011eeeeee m_chk2 -clr NBWL C_ALTDATA M_AM_NONE %01000010sseeeS00 m_ea + +clr L M_DREG M_AM_NONE %0100001010000eee m_clrd + +- NBWL C_ALTDATA M_AM_NONE %01000010sseeeS00 m_ea + - NWL M_AREG M_AM_NONE %1001rrrs11001rrr m_clra cmp NWL M_AREG M_DREG %1011rrr0sseR1S00 m_ea + @@ -199,6 +200,24 @@ cpdbsne NBW M_DREG C_LABEL %111100101s011110 m_cpdbr cprestore N C_ALL030 M_AM_NONE %1111001101eeeeee m_cprest cpsave N C_ALL030 M_AM_NONE %1111001100eeeeee m_cprest +cpsbs BN C_MOVES M_AM_NONE %111100100100000 m_fscc +cpsbc BN C_MOVES M_AM_NONE %111100100100001 m_fscc +cpsls BN C_MOVES M_AM_NONE %111100100100010 m_fscc +cpslc BN C_MOVES M_AM_NONE %111100100100011 m_fscc +cpsss BN C_MOVES M_AM_NONE %111100100100100 m_fscc +cpssc BN C_MOVES M_AM_NONE %111100100100101 m_fscc +cpsas BN C_MOVES M_AM_NONE %111100100100110 m_fscc +cpsac BN C_MOVES M_AM_NONE %111100100100111 m_fscc +cpsws BN C_MOVES M_AM_NONE %111100100101000 m_fscc +cpswc BN C_MOVES M_AM_NONE %111100100101001 m_fscc +cpsis BN C_MOVES M_AM_NONE %111100100101010 m_fscc +cpsic BN C_MOVES M_AM_NONE %111100100101011 m_fscc +cpsgc BN C_MOVES M_AM_NONE %111100100101100 m_fscc +cpsgs BN C_MOVES M_AM_NONE %111100100101101 m_fscc +cpscs BN C_MOVES M_AM_NONE %111100100101110 m_fscc +cpscc BN C_MOVES M_AM_NONE %111100100101111 m_fscc + + cpushl N CACHES M_AIND %11110100cc001rrr m_cinv cpushp N CACHES M_AIND %11110100cc010rrr m_cinv cpusha N CACHES M_AM_NONE %11110100cc011rrr m_cinv @@ -248,31 +267,31 @@ ext NW M_DREG M_AM_NONE %0100100010000rrr m_reg + - L M_DREG M_AM_NONE %0100100011000rrr m_reg extb NL M_DREG M_AM_NONE %0100100111000rrr m_reg -fabs NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fabs + +fabs NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fabs + - NX M_FREG M_FREG %1111001000eeeeee m_fabs + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fabs -fsabs NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsabs + +fsabs NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsabs + - NX M_FREG M_FREG %1111001000eeeeee m_fsabs + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsabs -fdabs NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdabs + +fdabs NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdabs + - NX M_FREG M_FREG %1111001000eeeeee m_fdabs + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fdabs -facos NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_facos + +facos NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_facos + - NX M_FREG M_FREG %1111001000eeeeee m_facos + - NX M_FREG M_AM_NONE %1111001000eeeeee m_facos -fadd NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fadd + +fadd NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fadd + - NX M_FREG M_FREG %1111001000eeeeee m_fadd -fsadd NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsadd + +fsadd NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsadd + - NX M_FREG M_FREG %1111001000eeeeee m_fsadd -fdadd NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdadd + +fdadd NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdadd + - NX M_FREG M_FREG %1111001000eeeeee m_fdadd -fasin NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fasin + +fasin NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fasin + - NX M_FREG M_FREG %1111001000eeeeee m_fasin + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fasin -fatan NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fatan + +fatan NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fatan + - NX M_FREG M_FREG %1111001000eeeeee m_fatan + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fatan -fatanh NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fatanh + +fatanh NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fatanh + - NX M_FREG M_FREG %1111001000eeeeee m_fatanh + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fatanh @@ -313,12 +332,12 @@ fbst NWL C_LABEL M_AM_NONE %111100101s011111 m_cpbr fbseq NWL C_LABEL M_AM_NONE %111100101s010001 m_cpbr fbsne NWL C_LABEL M_AM_NONE %111100101s011110 m_cpbr -fcmp NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fcmp + +fcmp NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fcmp + - NX M_FREG M_FREG %1111001000eeeeee m_fcmp -fcos NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fcos + +fcos NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fcos + - NX M_FREG M_FREG %1111001000eeeeee m_fcos + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fcos -fcosh NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fcosh + +fcosh NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fcosh + - NX M_FREG M_FREG %1111001000eeeeee m_fcosh + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fcosh @@ -359,221 +378,189 @@ fdbst N M_DREG C_LABEL %1111001001011111 m_fdbcc fdbseq N M_DREG C_LABEL %1111001001010001 m_fdbcc fdbsne N M_DREG C_LABEL %1111001001011110 m_fdbcc -fdiv NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdiv + +fdiv NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdiv + - NX M_FREG M_FREG %1111001000eeeeee m_fdiv + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fdiv -fsdiv NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsdiv + +fsdiv NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsdiv + - NX M_FREG M_FREG %1111001000eeeeee m_fsdiv + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsdiv -fddiv NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fddiv + +fddiv NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fddiv + - NX M_FREG M_FREG %1111001000eeeeee m_fddiv + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fddiv -fetox NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fetox + +fetox NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fetox + - NX M_FREG M_FREG %1111001000eeeeee m_fetox + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fetox -fetoxm1 NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fetoxm1 + +fetoxm1 NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fetoxm1 + - NX M_FREG M_FREG %1111001000eeeeee m_fetoxm1 + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fetoxm1 -fgetexp NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fgetexp + +fgetexp NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fgetexp + - NX M_FREG M_FREG %1111001000eeeeee m_fgetexp + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fgetexp -fgetman NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fgetman + +fgetman NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fgetman + - NX M_FREG M_FREG %1111001000eeeeee m_fgetman + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fgetman -fint NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fint + +fint NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fint + - NX M_FREG M_FREG %1111001000eeeeee m_fint + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fint -fintrz NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fintrz + +fintrz NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fintrz + - NX M_FREG M_FREG %1111001000eeeeee m_fintrz + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fintrz -flog10 NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_flog10 + +flog10 NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_flog10 + - NX M_FREG M_FREG %1111001000eeeeee m_flog10 + - NX M_FREG M_AM_NONE %1111001000eeeeee m_flog10 -flog2 NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_flog2 + +flog2 NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_flog2 + - NX M_FREG M_FREG %1111001000eeeeee m_flog2 + - NX M_FREG M_AM_NONE %1111001000eeeeee m_flog2 -flogn NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_flogn + +flogn NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_flogn + - NX M_FREG M_FREG %1111001000eeeeee m_flogn + - NX M_FREG M_AM_NONE %1111001000eeeeee m_flogn -flognp1 NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_flognp1 + +flognp1 NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_flognp1 + - NX M_FREG M_FREG %1111001000eeeeee m_flognp1 + - NX M_FREG M_AM_NONE %1111001000eeeeee m_flognp1 -fmod NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fmod + +fmod NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fmod + - NX M_FREG M_FREG %1111001000eeeeee m_fmod + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fmod -fmove NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fmove + -- NBWLSQXP M_FREG C_ALL030 %1111001000eeeeee m_fmove + +fmove NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fmove + +- NBWLSDXP M_FREG C_ALL030 %1111001000eeeeee m_fmove + - NX M_FREG M_FREG %1111001000eeeeee m_fmove + - NL M_FPSCR C_ALL030 %1111001000eeeeee m_fmovescr + - NL C_ALL030 M_FPSCR %1111001000eeeeee m_fmovescr + -fsmove NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsmove -fdmove NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdmove +fsmove NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsmove +fdmove NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdmove fmovecr NX M_IMMED M_FREG %1111001000000000 m_fmovecr fmovem ! M_AM_NONE M_AM_NONE %1111001000eeeeee m_fmovem -fmul NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fmul + +fmul NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fmul + - NX M_FREG M_FREG %1111001000eeeeee m_fmul -fsmul NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsmul + +fsmul NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsmul + - NX M_FREG M_FREG %1111001000eeeeee m_fsmul fdmul NX C_ALL030 M_FREG %1111001000eeeeee m_fdmul + - NX M_FREG M_FREG %1111001000eeeeee m_fdmul -fneg NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fneg + +fneg NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fneg + - NX M_FREG M_FREG %1111001000eeeeee m_fneg + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fneg -fsneg NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsneg + +fsneg NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsneg + - NX M_FREG M_FREG %1111001000eeeeee m_fsneg + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsneg -fdneg NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdneg + +fdneg NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdneg + - NX M_FREG M_FREG %1111001000eeeeee m_fdneg + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fdneg fnop N M_AM_NONE M_AM_NONE %1111001010000000 m_fnop -frem NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_frem + +frem NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_frem + - NX M_FREG M_FREG %1111001000eeeeee m_frem -fscale NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fscale + +fscale NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fscale + - NX M_FREG M_FREG %1111001000eeeeee m_fscale -fseq NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fseq +fseq NB C_ALL030 M_AM_NONE %1111001001e00001 m_fscc fsze fsz -fsge NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsge -fsgt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsgt -fsgl NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsgl -fsgle NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsgle -fsle NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsle -fslt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fslt -fsne NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsne -fsngt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsngt -fsnge NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsnge -fsngl NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsngl -fsnle NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsnle -fsnlt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsnlt -fsngle NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsngle -fsogt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsogt -fsule NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsule -fsoge NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsoge -fsult NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsult -fsolt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsolt -fsuge NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsuge -fsole NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsole -fsugt NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsugt -fsogl NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsogl -fsueq NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsueq -fsor NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsor -fsun NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsun -fst NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fst -fsf NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsf -fssf NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fssf -fsst NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsst -fsseq NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fsseq -fssne NB C_ALL030 M_AM_NONE %1111001001eeeeee m_fssne - -fsgldiv NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsgldiv + +fsne NB C_ALL030 M_AM_NONE %1111001001e01110 m_fscc +fsgt NB C_ALL030 M_AM_NONE %1111001001e10010 m_fscc +fsngt NB C_ALL030 M_AM_NONE %1111001001e11101 m_fscc +fsge NB C_ALL030 M_AM_NONE %1111001001e10011 m_fscc +fsnge NB C_ALL030 M_AM_NONE %1111001001e11100 m_fscc +fslt NB C_ALL030 M_AM_NONE %1111001001e10100 m_fscc +fsnlt NB C_ALL030 M_AM_NONE %1111001001e11011 m_fscc +fsle NB C_ALL030 M_AM_NONE %1111001001e10101 m_fscc +fsnle NB C_ALL030 M_AM_NONE %1111001001e11010 m_fscc +fsgl NB C_ALL030 M_AM_NONE %1111001001e10110 m_fscc +fsngl NB C_ALL030 M_AM_NONE %1111001001e11001 m_fscc +fsgle NB C_ALL030 M_AM_NONE %1111001001e10111 m_fscc +fsngle NB C_ALL030 M_AM_NONE %1111001001e11000 m_fscc +fsogt NB C_ALL030 M_AM_NONE %1111001001e00010 m_fscc +fsule NB C_ALL030 M_AM_NONE %1111001001e01101 m_fscc +fsoge NB C_ALL030 M_AM_NONE %1111001001e00011 m_fscc +fsult NB C_ALL030 M_AM_NONE %1111001001e01100 m_fscc +fsolt NB C_ALL030 M_AM_NONE %1111001001e00100 m_fscc +fsuge NB C_ALL030 M_AM_NONE %1111001001e01011 m_fscc +fsole NB C_ALL030 M_AM_NONE %1111001001e00101 m_fscc +fsugt NB C_ALL030 M_AM_NONE %1111001001e01010 m_fscc +fsogl NB C_ALL030 M_AM_NONE %1111001001e00110 m_fscc +fsueq NB C_ALL030 M_AM_NONE %1111001001e01001 m_fscc +fsor NB C_ALL030 M_AM_NONE %1111001001e00111 m_fscc +fsun NB C_ALL030 M_AM_NONE %1111001001e01000 m_fscc +fsf NB C_ALL030 M_AM_NONE %1111001001e00000 m_fscc +fst NB C_ALL030 M_AM_NONE %1111001001e01111 m_fscc +fssf NB C_ALL030 M_AM_NONE %1111001001e10000 m_fscc +fsst NB C_ALL030 M_AM_NONE %1111001001e11111 m_fscc +fsseq NB C_ALL030 M_AM_NONE %1111001001e10001 m_fscc +fssne NB C_ALL030 M_AM_NONE %1111001001e11110 m_fscc + +fsgldiv NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsgldiv + - NX M_FREG M_FREG %1111001000eeeeee m_fsgldiv -fsglmul NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsglmul + +fsglmul NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsglmul + - NX M_FREG M_FREG %1111001000eeeeee m_fsglmul -fsin NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsin + +fsin NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsin + - NX M_FREG M_FREG %1111001000eeeeee m_fsin + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsin -fsincos NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsincos + +fsincos NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsincos + - NX M_FREG M_FREG %1111001000eeeeee m_fsincos -fsinh NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsinh + +fsinh NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsinh + - NX M_FREG M_FREG %1111001000eeeeee m_fsinh + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsinh -fsqrt NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsqrt + +fsqrt NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsqrt + - NX M_FREG M_FREG %1111001000eeeeee m_fsqrt + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsqrt -fssqrt NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsfsqrt + +fssqrt NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsfsqrt + - NX M_FREG M_FREG %1111001000eeeeee m_fsfsqrt + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fsfsqrt -fdsqrt NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdfsqrt + +fdsqrt NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdfsqrt + - NX M_FREG M_FREG %1111001000eeeeee m_fdfsqrt + - NX M_FREG M_AM_NONE %1111001000eeeeee m_fdfsqrt -fsub NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsub + +fsub NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsub + - NX M_FREG M_FREG %1111001000eeeeee m_fsub -fssub NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fsub + +fssub NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fsub + - NX M_FREG M_FREG %1111001000eeeeee m_fsub -fdsub NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_fdsub + +fdsub NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_fdsub + - NX M_FREG M_FREG %1111001000eeeeee m_fdsub -ftan NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_ftan + +ftan NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_ftan + - NX M_FREG M_FREG %1111001000eeeeee m_ftan + - NX M_FREG M_AM_NONE %1111001000eeeeee m_ftan -ftanh NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_ftanh + +ftanh NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_ftanh + - NX M_FREG M_FREG %1111001000eeeeee m_ftanh + - NX M_FREG M_AM_NONE %1111001000eeeeee m_ftanh -ftentox NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_ftentox + +ftentox NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_ftentox + - NX M_FREG M_FREG %1111001000eeeeee m_ftentox + - NX M_FREG M_AM_NONE %1111001000eeeeee m_ftentox -ftst NBWLSQXP C_ALL030 M_AM_NONE %1111001000eeeeee m_ftst + +ftst NBWLSDXP C_ALL030 M_AM_NONE %1111001000eeeeee m_ftst + - NX M_FREG M_AM_NONE %1111001000eeeeee m_ftst -ftwotox NBWLSQXP C_ALL030 M_FREG %1111001000eeeeee m_ftwotox + +ftwotox NBWLSDXP C_ALL030 M_FREG %1111001000eeeeee m_ftwotox + - NX M_FREG M_FREG %1111001000eeeeee m_ftwotox + - NX M_FREG M_AM_NONE %1111001000eeeeee m_ftwotox -ftrapeq WL M_IMMED M_AM_NONE %1111001001111e10 m_ftrapeq + -- N M_AM_NONE M_AM_NONE %1111001001111eee m_ftrapeqn -ftrapze -ftrapz -ftrapge WL M_IMMED M_AM_NONE %111100100111101e m_ftrapge + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapgen -ftrapgt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapgt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapgtn -ftrapgl WL M_IMMED M_AM_NONE %111100100111101e m_ftrapgl + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapgln -ftrapgle WL M_IMMED M_AM_NONE %111100100111101e m_ftrapgle + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapglen -ftraple WL M_IMMED M_AM_NONE %111100100111101e m_ftraple + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftraplen -ftraplt WL M_IMMED M_AM_NONE %111100100111101e m_ftraplt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapltn -ftrapne WL M_IMMED M_AM_NONE %111100100111101e m_ftrapne + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapnen -ftrapngt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapngt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapngtn -ftrapnge WL M_IMMED M_AM_NONE %111100100111101e m_ftrapnge + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapngen -ftrapngl WL M_IMMED M_AM_NONE %111100100111101e m_ftrapngl + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapngln -ftrapnle WL M_IMMED M_AM_NONE %111100100111101e m_ftrapnle + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapnlen -ftrapnlt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapnlt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapnltn -ftrapngle WL M_IMMED M_AM_NONE %111100100111101e m_ftrapngle + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapnglen -ftrapogt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapogt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapogtn -ftrapule WL M_IMMED M_AM_NONE %111100100111101e m_ftrapule + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapulen -ftrapoge WL M_IMMED M_AM_NONE %111100100111101e m_ftrapoge + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapogen -ftrapult WL M_IMMED M_AM_NONE %111100100111101e m_ftrapult + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapultn -ftrapolt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapolt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapoltn -ftrapuge WL M_IMMED M_AM_NONE %111100100111101e m_ftrapuge + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapugen -ftrapole WL M_IMMED M_AM_NONE %111100100111101e m_ftrapole + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapolen -ftrapugt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapugt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapugtn -ftrapogl WL M_IMMED M_AM_NONE %111100100111101e m_ftrapogl + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapogln -ftrapueq WL M_IMMED M_AM_NONE %111100100111101e m_ftrapueq + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapueqn -ftrapor WL M_IMMED M_AM_NONE %111100100111101e m_ftrapor + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftraporn -ftrapun WL M_IMMED M_AM_NONE %111100100111101e m_ftrapun + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapunn -ftrapt WL M_IMMED M_AM_NONE %111100100111101e m_ftrapt + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftraptn -ftrapf WL M_IMMED M_AM_NONE %111100100111101e m_ftrapf + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapfn -ftrapsf WL M_IMMED M_AM_NONE %111100100111101e m_ftrapsf + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapsfn -ftrapst WL M_IMMED M_AM_NONE %111100100111101e m_ftrapst + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapstn -ftrapseq WL M_IMMED M_AM_NONE %111100100111101e m_ftrapseq + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapseqn -ftrapsne WL M_IMMED M_AM_NONE %111100100111101e m_ftrapsne + -- N M_AM_NONE M_AM_NONE %1111001001111100 m_ftrapsnen +ftrapeq WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000001mmm m_ftrapcc +ftrapze WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000001mmm m_ftrapcc +ftrapz WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000001mmm m_ftrapcc +ftrapge WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001110mmm m_ftrapcc +ftrapgt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010010mmm m_ftrapcc +ftrapgl WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011101mmm m_ftrapcc +ftrapgle WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010011mmm m_ftrapcc +ftraple WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011100mmm m_ftrapcc +ftraplt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010100mmm m_ftrapcc +ftrapne WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011011mmm m_ftrapcc +ftrapngt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010101mmm m_ftrapcc +ftrapnge WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011010mmm m_ftrapcc +ftrapngl WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010110mmm m_ftrapcc +ftrapnle WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011001mmm m_ftrapcc +ftrapnlt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010111mmm m_ftrapcc +ftrapngle WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011000mmm m_ftrapcc +ftrapogt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000010mmm m_ftrapcc +ftrapule WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001101mmm m_ftrapcc +ftrapoge WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000011mmm m_ftrapcc +ftrapult WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001100mmm m_ftrapcc +ftrapolt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000100mmm m_ftrapcc +ftrapuge WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001011mmm m_ftrapcc +ftrapole WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000101mmm m_ftrapcc +ftrapugt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001010mmm m_ftrapcc +ftrapogl WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000110mmm m_ftrapcc +ftrapueq WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001001mmm m_ftrapcc +ftrapor WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000111mmm m_ftrapcc +ftrapun WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001000mmm m_ftrapcc +ftrapt WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001000000mmm m_ftrapcc +ftrapf WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001001111mmm m_ftrapcc +ftrapsf WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010000mmm m_ftrapcc +ftrapst WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011111mmm m_ftrapcc +ftrapseq WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001010001mmm m_ftrapcc +ftrapsne WLN M_IMMED|M_AM_NONE M_AM_NONE %1111001011110mmm m_ftrapcc frestore N C_DATA030 M_AM_NONE %1111001101eeeeee m_cprest @@ -650,20 +637,20 @@ ori NBWL M_IMMED C_ALTDATA %00000000sseeeS11 m_ea + pack ! M_AM_NONE M_AM_NONE %1000rrr10100mrrr m_pack pbbs NWL C_LABEL M_AM_NONE %111100001s000000 m_cpbr -pbls NWL C_LABEL M_AM_NONE %111100001s000010 m_cpbr -pbss NWL C_LABEL M_AM_NONE %111100001s000100 m_cpbr -pbas NWL C_LABEL M_AM_NONE %111100001s000110 m_cpbr -pbws NWL C_LABEL M_AM_NONE %111100001s001000 m_cpbr -pbis NWL C_LABEL M_AM_NONE %111100001s001010 m_cpbr -pbgs NWL C_LABEL M_AM_NONE %111100001s001100 m_cpbr -pbcs NWL C_LABEL M_AM_NONE %111100001s001110 m_cpbr pbbc NWL C_LABEL M_AM_NONE %111100001s000001 m_cpbr +pbls NWL C_LABEL M_AM_NONE %111100001s000010 m_cpbr pblc NWL C_LABEL M_AM_NONE %111100001s000011 m_cpbr +pbss NWL C_LABEL M_AM_NONE %111100001s000100 m_cpbr pbsc NWL C_LABEL M_AM_NONE %111100001s000101 m_cpbr +pbas NWL C_LABEL M_AM_NONE %111100001s000110 m_cpbr pbac NWL C_LABEL M_AM_NONE %111100001s000111 m_cpbr +pbws NWL C_LABEL M_AM_NONE %111100001s001000 m_cpbr pbwc NWL C_LABEL M_AM_NONE %111100001s001001 m_cpbr +pbis NWL C_LABEL M_AM_NONE %111100001s001010 m_cpbr pbic NWL C_LABEL M_AM_NONE %111100001s001011 m_cpbr +pbgs NWL C_LABEL M_AM_NONE %111100001s001100 m_cpbr pbgc NWL C_LABEL M_AM_NONE %111100001s001101 m_cpbr +pbcs NWL C_LABEL M_AM_NONE %111100001s001110 m_cpbr pbcc NWL C_LABEL M_AM_NONE %111100001s001111 m_cpbr pdbbs NWL M_DREG C_LABEL %1111000001001ccc m_cpdbr @@ -699,41 +686,42 @@ pmovefd NWLD C_PMOVE M_MRN %1111000000eeeeee m_pmovefd prestore N C_ALL030 M_AM_NONE %1111000101eeeeee m_ea psave N C_ALL030 M_AM_NONE %1111000100eeeeee m_ea +psbs BN C_MOVES M_AM_NONE %111100000100000 m_fscc +psbc BN C_MOVES M_AM_NONE %111100000100001 m_fscc +psls BN C_MOVES M_AM_NONE %111100000100010 m_fscc +pslc BN C_MOVES M_AM_NONE %111100000100011 m_fscc +psss BN C_MOVES M_AM_NONE %111100000100100 m_fscc +pssc BN C_MOVES M_AM_NONE %111100000100101 m_fscc +psas BN C_MOVES M_AM_NONE %111100000100110 m_fscc +psac BN C_MOVES M_AM_NONE %111100000100111 m_fscc +psws BN C_MOVES M_AM_NONE %111100000101000 m_fscc +pswc BN C_MOVES M_AM_NONE %111100000101001 m_fscc +psis BN C_MOVES M_AM_NONE %111100000101010 m_fscc +psic BN C_MOVES M_AM_NONE %111100000101011 m_fscc +psgc BN C_MOVES M_AM_NONE %111100000101100 m_fscc +psgs BN C_MOVES M_AM_NONE %111100000101101 m_fscc +pscs BN C_MOVES M_AM_NONE %111100000101110 m_fscc +pscc BN C_MOVES M_AM_NONE %111100000101111 m_fscc + ptestr N M_FC M_IMMED %1111000000eeeeee m_ptest ptestw N M_FC M_IMMED %1111000000eeeeee m_ptest -ptrapbs WL M_IMMED M_AM_NONE %111100000111101o m_ptrapbs + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapbsn -ptrapls WL M_IMMED M_AM_NONE %111100000111101o m_ptrapls + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptraplsn -ptrapss WL M_IMMED M_AM_NONE %111100000111101o m_ptrapss + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapssn -ptrapas WL M_IMMED M_AM_NONE %111100000111101o m_ptrapas + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapasn -ptrapws WL M_IMMED M_AM_NONE %111100000111101o m_ptrapws + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapwsn -ptrapis WL M_IMMED M_AM_NONE %111100000111101o m_ptrapis + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapisn -ptrapgs WL M_IMMED M_AM_NONE %111100000111101o m_ptrapgs + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapgsn -ptrapcs WL M_IMMED M_AM_NONE %111100000111101o m_ptrapcs + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapcsn -ptrapbc WL M_IMMED M_AM_NONE %111100000111101o m_ptrapbc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapbcn -ptraplc WL M_IMMED M_AM_NONE %111100000111101o m_ptraplc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptraplcn -ptrapsc WL M_IMMED M_AM_NONE %111100000111101o m_ptrapsc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapscn -ptrapac WL M_IMMED M_AM_NONE %111100000111101o m_ptrapac + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapacn -ptrapwc WL M_IMMED M_AM_NONE %111100000111101o m_ptrapwc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapwcn -ptrapic WL M_IMMED M_AM_NONE %111100000111101o m_ptrapic + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapicn -ptrapgc WL M_IMMED M_AM_NONE %111100000111101o m_ptrapgc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapgcn -ptrapcc WL M_IMMED M_AM_NONE %111100000111101o m_ptrapcc + -- N M_AM_NONE M_AM_NONE %1111000001111100 m_ptrapccn +ptrapbs WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100000 m_ptrapcc +ptrapbc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100001 m_ptrapcc +ptrapls WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100010 m_ptrapcc +ptraplc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100011 m_ptrapcc +ptrapss WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100100 m_ptrapcc +ptrapsc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100101 m_ptrapcc +ptrapas WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100110 m_ptrapcc +ptrapac WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100111 m_ptrapcc +ptrapws WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101000 m_ptrapcc +ptrapwc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101001 m_ptrapcc +ptrapis WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101010 m_ptrapcc +ptrapic WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101011 m_ptrapcc +ptrapgc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101100 m_ptrapcc +ptrapgs WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101101 m_ptrapcc +ptrapcs WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101110 m_ptrapcc +ptrapcc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001101111 m_ptrapcc pea NL C_CTRL M_AM_NONE %0100100001eee000 m_ea diff --git a/direct.h b/direct.h index d1924de..c89156d 100644 --- a/direct.h +++ b/direct.h @@ -35,5 +35,17 @@ int d_if(void); int d_else(void); int d_endif(void); +int d_68000(void); +int d_68000(void); +int d_68020(void); +int d_68030(void); +int d_68040(void); +int d_68060(void); +int d_68881(void); +int d_68882(void); +int d_56001(void); +int d_gpu(void); +int d_dsp(void); + #endif // __DIRECT_H__ diff --git a/mach.c b/mach.c index 4b8b8f0..2db0db3 100644 --- a/mach.c +++ b/mach.c @@ -49,8 +49,9 @@ int m_movep(WORD, WORD); int m_trap(WORD, WORD); int m_movem(WORD, WORD); int m_clra(WORD, WORD); +int m_clrd(WORD, WORD); -int m_move30(WORD, WORD); //68020/30/40/60 +int m_move30(WORD, WORD); // 68020/30/40/60 int m_br30(WORD inst, WORD siz); int m_ea030(WORD inst, WORD siz); int m_bfop(WORD inst, WORD siz); @@ -88,38 +89,7 @@ int m_pload(WORD inst, WORD siz, WORD extension); int m_pmove(WORD inst, WORD siz); int m_pmovefd(WORD inst, WORD siz); int m_ptest(WORD inst, WORD siz); -int m_ptrapbs(WORD inst, WORD siz); -int m_ptrapbc(WORD inst, WORD siz); -int m_ptrapls(WORD inst, WORD siz); -int m_ptraplc(WORD inst, WORD siz); -int m_ptrapss(WORD inst, WORD siz); -int m_ptrapsc(WORD inst, WORD siz); -int m_ptrapas(WORD inst, WORD siz); -int m_ptrapac(WORD inst, WORD siz); -int m_ptrapws(WORD inst, WORD siz); -int m_ptrapwc(WORD inst, WORD siz); -int m_ptrapis(WORD inst, WORD siz); -int m_ptrapic(WORD inst, WORD siz); -int m_ptrapgc(WORD inst, WORD siz); -int m_ptrapgs(WORD inst, WORD siz); -int m_ptrapcs(WORD inst, WORD siz); int m_ptrapcc(WORD inst, WORD siz); -int m_ptrapbsn(WORD inst, WORD siz); -int m_ptrapbcn(WORD inst, WORD siz); -int m_ptraplsn(WORD inst, WORD siz); -int m_ptraplcn(WORD inst, WORD siz); -int m_ptrapssn(WORD inst, WORD siz); -int m_ptrapscn(WORD inst, WORD siz); -int m_ptrapasn(WORD inst, WORD siz); -int m_ptrapacn(WORD inst, WORD siz); -int m_ptrapwsn(WORD inst, WORD siz); -int m_ptrapwcn(WORD inst, WORD siz); -int m_ptrapisn(WORD inst, WORD siz); -int m_ptrapicn(WORD inst, WORD siz); -int m_ptrapgsn(WORD inst, WORD siz); -int m_ptrapgcn(WORD inst, WORD siz); -int m_ptrapcsn(WORD inst, WORD siz); -int m_ptrapccn(WORD inst, WORD siz); int m_ploadr(WORD inst, WORD siz); int m_ploadw(WORD inst, WORD siz); @@ -164,38 +134,7 @@ int m_fnop(WORD inst, WORD siz); int m_frem(WORD inst, WORD siz); int m_fsabs(WORD inst, WORD siz); int m_fsadd(WORD inst, WORD siz); -int m_fseq(WORD inst, WORD siz); -int m_fsne(WORD inst, WORD siz); -int m_fsgt(WORD inst, WORD siz); -int m_fsngt(WORD inst, WORD siz); -int m_fsge(WORD inst, WORD siz); -int m_fsnge(WORD inst, WORD siz); -int m_fslt(WORD inst, WORD siz); -int m_fsnlt(WORD inst, WORD siz); -int m_fsle(WORD inst, WORD siz); -int m_fsnle(WORD inst, WORD siz); -int m_fsgl(WORD inst, WORD siz); -int m_fsngl(WORD inst, WORD siz); -int m_fsgle(WORD inst, WORD siz); -int m_fsngle(WORD inst, WORD siz); -int m_fsogt(WORD inst, WORD siz); -int m_fsule(WORD inst, WORD siz); -int m_fsoge(WORD inst, WORD siz); -int m_fsult(WORD inst, WORD siz); -int m_fsolt(WORD inst, WORD siz); -int m_fsuge(WORD inst, WORD siz); -int m_fsole(WORD inst, WORD siz); -int m_fsugt(WORD inst, WORD siz); -int m_fsogl(WORD inst, WORD siz); -int m_fsueq(WORD inst, WORD siz); -int m_fsor(WORD inst, WORD siz); -int m_fsun(WORD inst, WORD siz); -int m_fsf(WORD inst, WORD siz); -int m_fst(WORD inst, WORD siz); -int m_fssf(WORD inst, WORD siz); -int m_fsst(WORD inst, WORD siz); -int m_fsseq(WORD inst, WORD siz); -int m_fssne(WORD inst, WORD siz); +int m_fscc(WORD inst, WORD siz); int m_fscale(WORD inst, WORD siz); int m_fsdiv(WORD inst, WORD siz); int m_fsfsqrt(WORD inst, WORD siz); @@ -215,70 +154,7 @@ int m_ftanh(WORD inst, WORD siz); int m_ftentox(WORD inst, WORD siz); int m_ftst(WORD inst, WORD siz); int m_ftwotox(WORD inst, WORD siz); -int m_ftrapeq(WORD inst, WORD siz); -int m_ftrapne(WORD inst, WORD siz); -int m_ftrapgt(WORD inst, WORD siz); -int m_ftrapngt(WORD inst, WORD siz); -int m_ftrapge(WORD inst, WORD siz); -int m_ftrapnge(WORD inst, WORD siz); -int m_ftraplt(WORD inst, WORD siz); -int m_ftrapnlt(WORD inst, WORD siz); -int m_ftraple(WORD inst, WORD siz); -int m_ftrapnle(WORD inst, WORD siz); -int m_ftrapgl(WORD inst, WORD siz); -int m_ftrapngl(WORD inst, WORD siz); -int m_ftrapgle(WORD inst, WORD siz); -int m_ftrapngle(WORD inst, WORD siz); -int m_ftrapogt(WORD inst, WORD siz); -int m_ftrapule(WORD inst, WORD siz); -int m_ftrapoge(WORD inst, WORD siz); -int m_ftrapult(WORD inst, WORD siz); -int m_ftrapolt(WORD inst, WORD siz); -int m_ftrapuge(WORD inst, WORD siz); -int m_ftrapole(WORD inst, WORD siz); -int m_ftrapugt(WORD inst, WORD siz); -int m_ftrapogl(WORD inst, WORD siz); -int m_ftrapueq(WORD inst, WORD siz); -int m_ftrapor(WORD inst, WORD siz); -int m_ftrapun(WORD inst, WORD siz); -int m_ftrapf(WORD inst, WORD siz); -int m_ftrapt(WORD inst, WORD siz); -int m_ftrapsf(WORD inst, WORD siz); -int m_ftrapst(WORD inst, WORD siz); -int m_ftrapseq(WORD inst, WORD siz); -int m_ftrapsne(WORD inst, WORD siz); -int m_ftrapeqn(WORD inst, WORD siz); -int m_ftrapnen(WORD inst, WORD siz); -int m_ftrapgtn(WORD inst, WORD siz); -int m_ftrapngtn(WORD inst, WORD siz); -int m_ftrapgen(WORD inst, WORD siz); -int m_ftrapngen(WORD inst, WORD siz); -int m_ftrapltn(WORD inst, WORD siz); -int m_ftrapnltn(WORD inst, WORD siz); -int m_ftraplen(WORD inst, WORD siz); -int m_ftrapnlen(WORD inst, WORD siz); -int m_ftrapgln(WORD inst, WORD siz); -int m_ftrapngln(WORD inst, WORD siz); -int m_ftrapglen(WORD inst, WORD siz); -int m_ftrapnglen(WORD inst, WORD siz); -int m_ftrapogtn(WORD inst, WORD siz); -int m_ftrapulen(WORD inst, WORD siz); -int m_ftrapogen(WORD inst, WORD siz); -int m_ftrapultn(WORD inst, WORD siz); -int m_ftrapoltn(WORD inst, WORD siz); -int m_ftrapugen(WORD inst, WORD siz); -int m_ftrapolen(WORD inst, WORD siz); -int m_ftrapugtn(WORD inst, WORD siz); -int m_ftrapogln(WORD inst, WORD siz); -int m_ftrapueqn(WORD inst, WORD siz); -int m_ftraporn(WORD inst, WORD siz); -int m_ftrapunn(WORD inst, WORD siz); -int m_ftrapfn(WORD inst, WORD siz); -int m_ftraptn(WORD inst, WORD siz); -int m_ftrapsfn(WORD inst, WORD siz); -int m_ftrapstn(WORD inst, WORD siz); -int m_ftrapseqn(WORD inst, WORD siz); -int m_ftrapsnen(WORD inst, WORD siz); +int m_ftrapcc(WORD inst, WORD siz); // Common error messages char range_error[] = "expression out of range"; @@ -789,22 +665,22 @@ int m_link(WORD inst, WORD siz) WORD extra_addressing[16]= { - 0, //0100 (bd,An,Xn) - 0, //0101 ([bd,An],Xn,od) - 0x180, //0102 ([bc,An,Xn],od) (111 110 110 111) - 0, //0103 (bd,PC,Xn) - 0, //0104 ([bd,PC],Xn,od) - 0, //0105 ([bc,PC,Xn],od) - 0, //0106 - 0, //0107 - 0, //0110 - 0, //0111 Nothing - 0x30, //0112 (Dn.w) - 0x30, //0113 (Dn.l) - 0, //0114 - 0, //0115 - 0, //0116 - 0 //0117 + 0, // 0100 (bd,An,Xn) + 0, // 0101 ([bd,An],Xn,od) + 0x180, // 0102 ([bc,An,Xn],od) (111 110 110 111) + 0, // 0103 (bd,PC,Xn) + 0, // 0104 ([bd,PC],Xn,od) + 0, // 0105 ([bc,PC,Xn],od) + 0, // 0106 + 0, // 0107 + 0, // 0110 + 0, // 0111 Nothing + 0x30, // 0112 (Dn.w) + 0x30, // 0113 (Dn.l) + 0, // 0114 + 0, // 0115 + 0, // 0116 + 0 // 0117 }; @@ -834,7 +710,7 @@ int m_move(WORD inst, WORD size) } else { - if ((am0 < ABASE) && (am1 < ABASE)) //68000 modes + if ((am0 < ABASE) && (am1 < ABASE)) // 68000 modes { inst |= siz_12[siz] | am_6[am1] | reg_9[a1reg] | am0 | a0reg; @@ -846,7 +722,7 @@ int m_move(WORD inst, WORD size) if (am1 >= ADISP) ea1gen((WORD)siz | 0x8000); // Tell ea1gen we're move ea,ea } - else //68020+ modes + else // 68020+ modes { inst |= siz_12[siz] | reg_9[a1reg] | extra_addressing[am0 - ABASE]; @@ -1211,6 +1087,27 @@ int m_clra(WORD inst, WORD siz) } +// +// CLR.L Dn ==> CLR.L An or MOVEQ #0,Dx +// +int m_clrd(WORD inst, WORD siz) +{ + if (!CHECK_OPTS(OPT_CLR_DX)) + { + inst |= a0reg; + D_word(inst); + + return OK; + } + else + { + inst = (a0reg << 9) | B16(01110000, 00000000); + D_word(inst); + return OK; + } +} + + //////////////////////////////////////// // // 68020/30/40 instructions @@ -2592,9 +2489,8 @@ int m_pflush(WORD inst, WORD siz) return OK; } - // -// pflushr (68551) +// pflushr (68851) // int m_pflushr(WORD inst, WORD siz) { @@ -2650,7 +2546,7 @@ int m_pflushr(WORD inst, WORD siz) // int m_pload(WORD inst, WORD siz, WORD extension) { - // TODO: 68551 support is not added yet. + // TODO: 68851 support is not added yet. // None of the ST series of computers had a 68020 + 68551 socket and since // this is an Atari targetted assembler... CHECKNO30; @@ -2700,15 +2596,15 @@ int m_ploadw(WORD inst, WORD siz) } // -// pmove (68030/68551) +// pmove (68030/68851) // int m_pmove(WORD inst, WORD siz) { int inst2,reg; - // TODO: 68551 support is not added yet. + // TODO: 68851 support is not added yet. // None of the ST series of computers had - // a 68020 + 68551 socket and since this is + // a 68020 + 68851 socket and since this is // an Atari targetted assembler.... // (same for 68EC030) CHECKNO30; @@ -2805,82 +2701,39 @@ int m_pmovefd(WORD inst, WORD siz) // // ptrapcc (68851) // -#define gen_ptrapcc(name,opcode) \ -int m_##name(WORD inst, WORD siz) \ -{ \ - CHECKNO20; \ - if (siz == SIZW) \ - { \ - D_word(inst); \ - D_word(B8(opcode)); \ - D_word(a0exval); \ - } \ - else \ - { \ - inst |= 3; \ - D_word(inst); \ - D_word(B8(opcode)); \ - D_long(a0exval); \ - } \ - return OK; \ -}\ -int m_##name##n(WORD inst, WORD siz) \ -{ \ - CHECKNO20; \ - D_word(inst); \ - D_word(B8(opcode)); \ - return OK; \ -} - -gen_ptrapcc(ptrapbs,00000000) -gen_ptrapcc(ptrapbc,00000001) -gen_ptrapcc(ptrapls,00000010) -gen_ptrapcc(ptraplc,00000011) -gen_ptrapcc(ptrapss,00000100) -gen_ptrapcc(ptrapsc,00000101) -gen_ptrapcc(ptrapas,00000110) -gen_ptrapcc(ptrapac,00000111) -gen_ptrapcc(ptrapws,00001000) -gen_ptrapcc(ptrapwc,00001001) -gen_ptrapcc(ptrapis,00001010) -gen_ptrapcc(ptrapic,00001011) -gen_ptrapcc(ptrapgc,00001100) -gen_ptrapcc(ptrapgs,00001101) -gen_ptrapcc(ptrapcs,00001110) -gen_ptrapcc(ptrapcc,00001111) - -//int m_ptrapbs(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000000)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000000)); D_long(a0exval); } return OK; } -//int m_ptrapbc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000001)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000001)); D_long(a0exval); } return OK; } -//int m_ptrapls(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000010)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000010)); D_long(a0exval); } return OK; } -//int m_ptraplc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000011)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000011)); D_long(a0exval); } return OK; } -//int m_ptrapss(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000100)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000100)); D_long(a0exval); } return OK; } -//int m_ptrapsc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000101)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000101)); D_long(a0exval); } return OK; } -//int m_ptrapas(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000110)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000110)); D_long(a0exval); } return OK; } -//int m_ptrapac(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00000111)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00000111)); D_long(a0exval); } return OK; } -//int m_ptrapws(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001000)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001000)); D_long(a0exval); } return OK; } -//int m_ptrapwc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001001)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001001)); D_long(a0exval); } return OK; } -//int m_ptrapis(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001010)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001010)); D_long(a0exval); } return OK; } -//int m_ptrapic(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001011)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001011)); D_long(a0exval); } return OK; } -//int m_ptrapgc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001100)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001100)); D_long(a0exval); } return OK; } -//int m_ptrapgs(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001101)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001101)); D_long(a0exval); } return OK; } -//int m_ptrapcs(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001110)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001110)); D_long(a0exval); } return OK; } -//int m_ptrapcc(WORD inst, WORD siz) { CHECKNO20; if (siz == SIZW) { D_word(inst); D_word(B8(00001111)); D_word(a0exval); } else { inst |= 3; D_word(inst); D_word(B8(00001111)); D_long(a0exval); } return OK; } -//int m_ptrapbsn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000000)); return OK; } -//int m_ptrapbcn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000001)); return OK; } -//int m_ptraplsn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000010)); return OK; } -//int m_ptraplcn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000011)); return OK; } -//int m_ptrapssn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000100)); return OK; } -//int m_ptrapscn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000101)); return OK; } -//int m_ptrapasn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000110)); return OK; } -//int m_ptrapacn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00000111)); return OK; } -//int m_ptrapwsn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001000)); return OK; } -//int m_ptrapwcn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001001)); return OK; } -//int m_ptrapisn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001010)); return OK; } -//int m_ptrapicn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001011)); return OK; } -//int m_ptrapgsn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001100)); return OK; } -//int m_ptrapgcn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001101)); return OK; } -//int m_ptrapcsn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001110)); return OK; } -//int m_ptrapccn(WORD inst, WORD siz) { CHECKNO20; D_word(inst); D_word(B8(00001111)); return OK; } +int m_ptrapcc(WORD inst, WORD siz) +{ + CHECKNO20; + // We stash the 5 condition bits + // inside the opcode in 68ktab + // (bits 0-4), so we need to extract + // them first and fill in + // the clobbered bits. + WORD opcode = inst & 0x1F; + inst = (inst & 0xFFE0) | (0x18); + + if (siz == SIZW) + { + inst |= 2; + D_word(inst); + D_word(opcode); + D_word(a0exval); + } + else if (siz == SIZL) + { + inst |= 3; + D_word(inst); + D_word(opcode); + D_long(a0exval); + } + else if (siz == SIZN) + { + inst |= 4; + D_word(inst); + D_word(opcode); + } + return OK; +} // @@ -2949,7 +2802,7 @@ static inline int gen_fpu(WORD inst, WORD siz, WORD opmode, WORD emul) } else { - inst |= (1 << 9); //Bolt on FPU id + inst |= (1 << 9); // Bolt on FPU id D_word(inst); inst = 0; inst = a0reg << 10; @@ -3087,7 +2940,7 @@ int m_fcosh(WORD inst, WORD siz) // int m_fdbcc(WORD inst, WORD siz) { - WORD opcode = inst & 0x3F; //Grab conditional bitfield + WORD opcode = inst & 0x3F; // Grab conditional bitfield inst &= ~0x3F; inst |= 1 << 3; @@ -3317,7 +3170,7 @@ int m_fmove(WORD inst, WORD siz) } else if ((am0 < AM_USP) && (am1 == FREG)) { - //ea->fpx + // ea->fpx // EA inst |= am0 | a0reg; @@ -3733,201 +3586,62 @@ int m_fscale(WORD inst, WORD siz) // -// FScc (6888X, 68040) -// -//int m_fseq (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000001)); return OK;} -//int m_fsne (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001110)); return OK;} -//int m_fsgt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010010)); return OK;} -//int m_fsngt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011101)); return OK;} -//int m_fsge (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010011)); return OK;} -//int m_fsnge (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011100)); return OK;} -//int m_fslt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010100)); return OK;} -//int m_fsnlt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011011)); return OK;} -//int m_fsle (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010101)); return OK;} -//int m_fsnle (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011010)); return OK;} -//int m_fsgl (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010110)); return OK;} -//int m_fsngl (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011001)); return OK;} -//int m_fsgle (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010111)); return OK;} -//int m_fsngle(WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011000)); return OK;} -//int m_fsogt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000010)); return OK;} -//int m_fsule (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001101)); return OK;} -//int m_fsoge (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000011)); return OK;} -//int m_fsult (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001100)); return OK;} -//int m_fsolt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000100)); return OK;} -//int m_fsuge (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001011)); return OK;} -//int m_fsole (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000101)); return OK;} -//int m_fsugt (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001010)); return OK;} -//int m_fsogl (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000110)); return OK;} -//int m_fsueq (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001001)); return OK;} -//int m_fsor (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000111)); return OK;} -//int m_fsun (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001000)); return OK;} -//int m_fsf (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00000000)); return OK;} -//int m_fst (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00001111)); return OK;} -//int m_fssf (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010000)); return OK;} -//int m_fsst (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011111)); return OK;} -//int m_fsseq (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00010001)); return OK;} -//int m_fssne (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(00011110)); return OK;} - -#define gen_FScc(name, opcode) int m_##name (WORD inst, WORD siz) { inst|=am0|a0reg; D_word(inst); ea0gen(siz); D_word(B8(opcode)); return OK;} -gen_FScc(fseq , 00000001); -gen_FScc(fsne , 00001110); -gen_FScc(fsgt , 00010010); -gen_FScc(fsngt , 00011101); -gen_FScc(fsge , 00010011); -gen_FScc(fsnge , 00011100); -gen_FScc(fslt , 00010100); -gen_FScc(fsnlt , 00011011); -gen_FScc(fsle , 00010101); -gen_FScc(fsnle , 00011010); -gen_FScc(fsgl , 00010110); -gen_FScc(fsngl , 00011001); -gen_FScc(fsgle , 00010111); -gen_FScc(fsngle, 00011000); -gen_FScc(fsogt , 00000010); -gen_FScc(fsule , 00001101); -gen_FScc(fsoge , 00000011); -gen_FScc(fsult , 00001100); -gen_FScc(fsolt , 00000100); -gen_FScc(fsuge , 00001011); -gen_FScc(fsole , 00000101); -gen_FScc(fsugt , 00001010); -gen_FScc(fsogl , 00000110); -gen_FScc(fsueq , 00001001); -gen_FScc(fsor , 00000111); -gen_FScc(fsun , 00001000); -gen_FScc(fsf , 00000000); -gen_FScc(fst , 00001111); -gen_FScc(fssf , 00010000); -gen_FScc(fsst , 00011111); -gen_FScc(fsseq , 00010001); -gen_FScc(fssne , 00011110); +// FScc (6888X, 68040), cpScc (68851, 68030), PScc (68851) +// TODO: Add check for PScc to ensure 68020+68851 active +// TODO: Add check for cpScc to ensure 68020+68851, 68030 +// +int m_fscc(WORD inst, WORD siz) +{ + // We stash the 5 condition bits + // inside the opcode in 68ktab + // (bits 4-0), so we need to extract + // them first and fill in + // the clobbered bits. + WORD opcode = inst & 0x1F; + inst &= 0xFFE0; + inst |= am0 | a0reg; + D_word(inst); + ea0gen(siz); + D_word(opcode); + return OK; +} // // FTRAPcc (6888X, 68040) // -//int m_ftrapeq (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000001)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000001)); D_long(a0exval); } return OK;} -//int m_ftrapne (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001110)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001110)); D_long(a0exval); } return OK;} -//int m_ftrapgt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010010)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010010)); D_long(a0exval); } return OK;} -//int m_ftrapngt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011101)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011101)); D_long(a0exval); } return OK;} -//int m_ftrapge (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010011)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010011)); D_long(a0exval); } return OK;} -//int m_ftrapnge (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011100)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011100)); D_long(a0exval); } return OK;} -//int m_ftraplt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010100)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010100)); D_long(a0exval); } return OK;} -//int m_ftrapnlt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011011)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011011)); D_long(a0exval); } return OK;} -//int m_ftraple (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010101)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010101)); D_long(a0exval); } return OK;} -//int m_ftrapnle (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011010)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011010)); D_long(a0exval); } return OK;} -//int m_ftrapgl (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010110)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010110)); D_long(a0exval); } return OK;} -//int m_ftrapngl (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011001)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011001)); D_long(a0exval); } return OK;} -//int m_ftrapgle (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010111)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010111)); D_long(a0exval); } return OK;} -//int m_ftrapngle(WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011000)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011000)); D_long(a0exval); } return OK;} -//int m_ftrapogt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000010)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000010)); D_long(a0exval); } return OK;} -//int m_ftrapule (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001101)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001101)); D_long(a0exval); } return OK;} -//int m_ftrapoge (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000011)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000011)); D_long(a0exval); } return OK;} -//int m_ftrapult (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001100)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001100)); D_long(a0exval); } return OK;} -//int m_ftrapolt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000100)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000100)); D_long(a0exval); } return OK;} -//int m_ftrapuge (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001011)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001011)); D_long(a0exval); } return OK;} -//int m_ftrapole (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000101)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000101)); D_long(a0exval); } return OK;} -//int m_ftrapugt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001010)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001010)); D_long(a0exval); } return OK;} -//int m_ftrapogl (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000110)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000110)); D_long(a0exval); } return OK;} -//int m_ftrapueq (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001001)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001001)); D_long(a0exval); } return OK;} -//int m_ftrapor (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000111)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000111)); D_long(a0exval); } return OK;} -//int m_ftrapun (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001000)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001000)); D_long(a0exval); } return OK;} -//int m_ftrapf (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00000000)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00000000)); D_long(a0exval); } return OK;} -//int m_ftrapt (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00001111)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00001111)); D_long(a0exval); } return OK;} -//int m_ftrapsf (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010000)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010000)); D_long(a0exval); } return OK;} -//int m_ftrapst (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011111)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011111)); D_long(a0exval); } return OK;} -//int m_ftrapseq (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00010001)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00010001)); D_long(a0exval); } return OK;} -//int m_ftrapsne (WORD inst, WORD siz) { if (siz==SIZW) { D_word(inst); D_word(B8(00011110)); D_word(a0exval); } else { inst|=3; D_word(inst); D_word(B8(00011110)); D_long(a0exval); } return OK;} -// -//int m_ftrapeqn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000001)); return OK;} -//int m_ftrapnen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001110)); return OK;} -//int m_ftrapgtn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010010)); return OK;} -//int m_ftrapngtn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011101)); return OK;} -//int m_ftrapgen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010011)); return OK;} -//int m_ftrapngen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011100)); return OK;} -//int m_ftrapltn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010100)); return OK;} -//int m_ftrapnltn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011011)); return OK;} -//int m_ftraplen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010101)); return OK;} -//int m_ftrapnlen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011010)); return OK;} -//int m_ftrapgln (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010110)); return OK;} -//int m_ftrapngln (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011001)); return OK;} -//int m_ftrapglen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010111)); return OK;} -//int m_ftrapnglen(WORD inst, WORD siz) { D_word(inst); D_word(B8(00011000)); return OK;} -//int m_ftrapogtn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000010)); return OK;} -//int m_ftrapulen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001101)); return OK;} -//int m_ftrapogen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000011)); return OK;} -//int m_ftrapultn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001100)); return OK;} -//int m_ftrapoltn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000100)); return OK;} -//int m_ftrapugen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001011)); return OK;} -//int m_ftrapolen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000101)); return OK;} -//int m_ftrapugtn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001010)); return OK;} -//int m_ftrapogln (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000110)); return OK;} -//int m_ftrapueqn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001001)); return OK;} -//int m_ftraporn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000111)); return OK;} -//int m_ftrapunn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001000)); return OK;} -//int m_ftrapfn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00000000)); return OK;} -//int m_ftraptn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00001111)); return OK;} -//int m_ftrapsfn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010000)); return OK;} -//int m_ftrapstn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011111)); return OK;} -//int m_ftrapseqn (WORD inst, WORD siz) { D_word(inst); D_word(B8(00010001)); return OK;} -//int m_ftrapsnen (WORD inst, WORD siz) { D_word(inst); D_word(B8(00011110)); return OK;} - -#define gen_FTRAPcc(name,opcode) \ -int m_##name (WORD inst, WORD siz) \ -{ \ - if (siz==SIZW) \ - { \ - D_word(inst); \ - D_word(B8(opcode)); \ - D_word(a0exval); \ - } \ - else \ - { \ - inst|=3; \ - D_word(inst); \ - D_word(B8(opcode)); \ - D_long(a0exval); \ - } \ - return OK;\ -} \ -int m_##name##n (WORD inst, WORD siz) \ -{ \ - D_word(inst); \ - D_word(B8(opcode)); \ - return OK;\ -} - -gen_FTRAPcc(ftrapeq ,00000001) -gen_FTRAPcc(ftrapne ,00001110) -gen_FTRAPcc(ftrapgt ,00010010) -gen_FTRAPcc(ftrapngt ,00011101) -gen_FTRAPcc(ftrapge ,00010011) -gen_FTRAPcc(ftrapnge ,00011100) -gen_FTRAPcc(ftraplt ,00010100) -gen_FTRAPcc(ftrapnlt ,00011011) -gen_FTRAPcc(ftraple ,00010101) -gen_FTRAPcc(ftrapnle ,00011010) -gen_FTRAPcc(ftrapgl ,00010110) -gen_FTRAPcc(ftrapngl ,00011001) -gen_FTRAPcc(ftrapgle ,00010111) -gen_FTRAPcc(ftrapngle ,00011000) -gen_FTRAPcc(ftrapogt ,00000010) -gen_FTRAPcc(ftrapule ,00001101) -gen_FTRAPcc(ftrapoge ,00000011) -gen_FTRAPcc(ftrapult ,00001100) -gen_FTRAPcc(ftrapolt ,00000100) -gen_FTRAPcc(ftrapuge ,00001011) -gen_FTRAPcc(ftrapole ,00000101) -gen_FTRAPcc(ftrapugt ,00001010) -gen_FTRAPcc(ftrapogl ,00000110) -gen_FTRAPcc(ftrapueq ,00001001) -gen_FTRAPcc(ftrapor ,00000111) -gen_FTRAPcc(ftrapun ,00001000) -gen_FTRAPcc(ftrapf ,00000000) -gen_FTRAPcc(ftrapt ,00001111) -gen_FTRAPcc(ftrapsf ,00010000) -gen_FTRAPcc(ftrapst ,00011111) -gen_FTRAPcc(ftrapseq ,00010001) -gen_FTRAPcc(ftrapsne ,00011110) + +int m_ftrapcc(WORD inst, WORD siz) +{ + // We stash the 5 condition bits + // inside the opcode in 68ktab + // (bits 3-7), so we need to extract + // them first and fill in + // the clobbered bits. + WORD opcode = (inst >> 3) & 0x1F; + inst = (inst & 0xFF07) | (0xF << 3); + if (siz == SIZW) + { + inst |= 2; + D_word(inst); + D_word(opcode); + D_word(a0exval); + } + else if (siz == SIZL) + { + inst |= 3; + D_word(inst); + D_word(opcode); + D_long(a0exval); + } + else if (siz = SIZN) + { + inst |= 4; + D_word(inst); + D_word(opcode); + return OK; + } + return OK; +} // // fsgldiv (6888X, 68040) @@ -3961,6 +3675,12 @@ int m_fsin(WORD inst, WORD siz) // int m_fsincos(WORD inst, WORD siz) { + // Swap a1reg, a2reg as a2reg should be stored + // in the bitfield gen_fpu generates + int temp; + temp = a2reg; + a2reg = a1reg; + a1reg = temp; if (gen_fpu(inst, siz, B8(00110000), FPU_FPSP) == OK) { chptr[-1] |= a2reg; diff --git a/rmac.c b/rmac.c index 16af05c..2e6baf3 100644 --- a/rmac.c +++ b/rmac.c @@ -140,6 +140,15 @@ void DisplayHelp(void) " -i[path] Directory to search for include files\n" " -l[filename] Create an output listing file\n" " -l*[filename] Create an output listing file without pagination\n" + " -m[cpu] Select default CPU. Available options:\n" + " 68000\n" + " 68020\n" + " 68030\n" + " 68040\n" + " 68060\n" + " 6502\n" + " tom\n" + " jerry\n" " -n Don't do things behind your back in RISC assembler\n" " -o file Output file name\n" " +o[value] Turn a specific optimisation on\n" @@ -150,6 +159,8 @@ void DisplayHelp(void) " o3: Outer displacement 0(an) to (an) (off)\n" " o4: lea size(An),An to addq #size,An (off)\n" " o5: Absolute long base displacement to word (off)\n" + " o6: Null branches to NOP (off)\n" + " o7: clr.l Dx to moveq #0,Dx (off)\n" " ~o[value] Turn a specific optimisation off\n" " +oall Turn all optimisations on\n" " ~oall Turn all optimisations off\n" @@ -365,6 +376,37 @@ int Process(int argc, char ** argv) list_flag = 1; lnsave++; break; + case 'm': + case 'M': + if ((*(argv[argno] + 2) == '6') && (*(argv[argno] + 3) == '8') && (*(argv[argno] + 4) == '0') && (*(argv[argno] + 5) == '0') && (*(argv[argno] + 6) == '0')) + d_68000(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '2')&&(*(argv[argno] + 6) == '0')) + d_68020(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '3')&&(*(argv[argno] + 6) == '0')) + d_68030(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '4')&&(*(argv[argno] + 6) == '0')) + d_68040(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '6')&&(*(argv[argno] + 6) == '0')) + d_68060(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '8')&&(*(argv[argno] + 5) == '8')&&(*(argv[argno] + 6) == '1')) + d_68881(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '8')&&(*(argv[argno] + 4) == '8')&&(*(argv[argno] + 5) == '8')&&(*(argv[argno] + 6) == '2')) + d_68882(); + else if ((*(argv[argno] + 2) == '5')&&(*(argv[argno] + 3) == '6')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '0')&&(*(argv[argno] + 6) == '1')) + d_56001(); + else if ((*(argv[argno] + 2) == '6')&&(*(argv[argno] + 3) == '5')&&(*(argv[argno] + 4) == '0')&&(*(argv[argno] + 5) == '2')) + d_6502(); + else if ((*(argv[argno] + 2) == 't')&&(*(argv[argno] + 3) == 'o')&&(*(argv[argno] + 4) == 'm')) + d_gpu(); + else if ((*(argv[argno] + 2) == 'j')&&(*(argv[argno] + 3) == 'e')&&(*(argv[argno] + 4) == 'r')&&(*(argv[argno] + 5) == 'r')&&(*(argv[argno] + 6) == 'y')) + d_dsp(); + else + { + printf("Unrecognised CPU"); + errcnt++; + return errcnt; + } + break; case 'o': // Direct object file output case 'O': if (argv[argno][2] != EOS) diff --git a/rmac.h b/rmac.h index 0519dc2..8e4e295 100644 --- a/rmac.h +++ b/rmac.h @@ -135,7 +135,7 @@ // Byteswap crap #define BYTESWAP16(x) ((((x) & 0x00FF) << 8) | (((x) & 0xFF00) >> 8)) #define BYTESWAP32(x) ((((x) & 0x000000FF) << 24) | (((x) & 0x0000FF00) << 8) | (((x) & 0x00FF0000) >> 8) | (((x) & 0xFF000000) >> 24)) -#define BYTESWAP64(x) (BYTESWAP32(x>>32)|BYTESWAP32((x&0xffffffff)<<32)) +#define BYTESWAP64(x) ((BYTESWAP32(x >> 32) | (BYTESWAP32(x & 0xFFFFFFFF) << 32))) #define WORDSWAP32(x) ((((x) & 0x0000FFFF) << 16) | (((x) & 0xFFFF0000) >> 16)) // @@ -266,6 +266,8 @@ enum OPT_INDIRECT_DISP = 3, OPT_LEA_ADDQ = 4, OPT_BASE_DISP = 5, + OPT_NULL_BRA = 6, + OPT_CLR_DX = 7, OPT_COUNT // Dummy, used to count number of optimisation switches }; diff --git a/sect.c b/sect.c index 3e12765..16a8025 100644 --- a/sect.c +++ b/sect.c @@ -551,10 +551,19 @@ int ResolveFixups(int sno) if (eval == 0) { - error("illegal bra.s with zero offset"); - continue; + if (CHECK_OPTS(OPT_NULL_BRA)) + { + // just output a nop + *locp++ = 0x4E; + *locp = 0x71; + continue; + } + else + { + error("illegal bra.s with zero offset"); + continue; + } } - *++locp = (uint8_t)eval; break; // Fixup one-byte value at locp + 1. -- 2.37.2