From 090bda1c00a18b3f616e734090ba456a461879a1 Mon Sep 17 00:00:00 2001 From: Shamus Hammons Date: Fri, 16 Jan 2015 08:24:24 -0600 Subject: [PATCH] Fix for spurious 'undefined register equate' error. --- direct.c | 62 +++++++++++++++++++++++++++++-------------------------- expr.c | 9 +++++--- riscasm.c | 4 ++++ riscasm.h | 1 + version.h | 6 +++--- 5 files changed, 47 insertions(+), 35 deletions(-) diff --git a/direct.c b/direct.c index 77fda01..e7a23bd 100644 --- a/direct.c +++ b/direct.c @@ -116,19 +116,19 @@ int d_org(void) // -// Print Directive +// Print directive // int d_print(void) { - char prntstr[LNSIZ]; // String for PRINT directive - char format[LNSIZ]; // Format for PRINT directive - int formatting = 0; // Formatting on/off - int wordlong = 0; // WORD = 0, LONG = 1 - int outtype = 0; // 0:hex, 1:decimal, 2:unsigned - - VALUE eval; // Expression value - WORD eattr; // Expression attributes - SYM * esym; // External symbol involved in expr. + char prntstr[LNSIZ]; // String for PRINT directive + char format[LNSIZ]; // Format for PRINT directive + int formatting = 0; // Formatting on/off + int wordlong = 0; // WORD = 0, LONG = 1 + int outtype = 0; // 0:hex, 1:decimal, 2:unsigned + + VALUE eval; // Expression value + WORD eattr; // Expression attributes + SYM * esym; // External symbol involved in expr. TOKEN r_expr[EXPRSIZE]; while (*tok != EOL) @@ -214,7 +214,7 @@ token_err: // -// Undefine an Equated Condition Code +// Undefine an equated condition code // int d_ccundef(void) { @@ -251,7 +251,7 @@ int d_ccundef(void) // -// Undefine an Equated Register +// Undefine an equated register // int d_equrundef(void) { @@ -275,7 +275,12 @@ int d_equrundef(void) regname = lookup(string[tok[1]], LABEL, 0); if (regname && (regname->sattre & EQUATEDREG)) + { + // Reset the attributes of this symbol... + regname->sattr = 0; + regname->sattre &= ~(EQUATEDREG | BANK_0 | BANK_1); regname->sattre |= UNDEF_EQUR; + } // Skip over symbol token and address tok += 2; @@ -286,7 +291,7 @@ int d_equrundef(void) // -// Do Not Allow the Use of the CLR.L Opcode +// Do not allow use of the CLR.L opcode // int d_noclear(void) { @@ -295,7 +300,7 @@ int d_noclear(void) // -// Include Binary File +// Include binary file // int d_incbin(void) { @@ -354,7 +359,7 @@ int d_incbin(void) // -// Set RISC Register Banks +// Set RISC register banks // int d_regbank0(void) { @@ -396,7 +401,7 @@ static inline void SkipBytes(unsigned bytesToSkip) // -// Adjust Location to an EVEN Value +// Adjust location to an EVEN value // int d_even(void) { @@ -424,7 +429,7 @@ int d_even(void) // -// Adjust Location to an LONG Value +// Adjust location to a LONG value // int d_long(void) { @@ -437,7 +442,7 @@ int d_long(void) // -// Adjust Location to an PHRASE Value +// Adjust location to a PHRASE value // // N.B.: We have to handle the GPU/DSP cases separately because you can embed // RISC code in the middle of a regular 68K section. Also note that all @@ -459,7 +464,7 @@ int d_phrase(void) // -// Adjust Location to an DPHRASE Value +// Adjust location to a DPHRASE value // int d_dphrase(void) { @@ -472,7 +477,7 @@ int d_dphrase(void) // -// Adjust Location to an QPHRASE Value +// Adjust location to a QPHRASE value // int d_qphrase(void) { @@ -497,17 +502,17 @@ int d_qphrase(void) void auto_even(void) { if (scattr & SBSS) - sloc++; // Bump BSS section + sloc++; // Bump BSS section else - D_byte(0); // Deposit 0.b in non-BSS + D_byte(0); // Deposit 0.b in non-BSS - if (lab_sym != NULL) // Bump label if we have to - ++lab_sym->svalue; + if (lab_sym != NULL) // Bump label if we have to + lab_sym->svalue++; } // -// Unimplemened Directive Error +// Unimplemened directive error // int d_unimpl(void) { @@ -704,9 +709,8 @@ int d_abs(void) // -// Switch Segments +// Switch segments // - int d_text(void) { if (rgpu || rdsp) @@ -1179,7 +1183,7 @@ int d_68000(void) // -// .gpu - Switch to GPU Assembler +// .gpu - Switch to GPU assembler // int d_gpu(void) { @@ -1206,7 +1210,7 @@ int d_gpu(void) // -// .dsp - Switch to DSP Assembler +// .dsp - Switch to DSP assembler // int d_dsp(void) { diff --git a/expr.c b/expr.c index 9eeb6e7..5c7fc87 100644 --- a/expr.c +++ b/expr.c @@ -370,8 +370,11 @@ if (symbol) symbol->sattr |= REFERENCED; - // Check for undefined register equates - if (symbol->sattre & UNDEF_EQUR) + // Check for undefined register equates, but only if it's not part + // of a # construct, as it could be that the label that's + // been undefined may later be used as an address label--which + // means it will be fixed up later, and thus, not an error. + if ((symbol->sattre & UNDEF_EQUR) && !riscImmTokenSeen) { errors("undefined register equate '%s'", symbol->sname); //if we return right away, it returns some spurious errors... @@ -423,7 +426,7 @@ thrown away right here. What the hell is it for? } else { - // Unknown type here... Alert the user! + // Unknown type here... Alert the user!, error("undefined RISC register in expression"); // Prevent spurious error reporting... tok++; diff --git a/riscasm.c b/riscasm.c index 5292555..b82c19d 100644 --- a/riscasm.c +++ b/riscasm.c @@ -27,6 +27,7 @@ unsigned orgactive = 0; // RISC org directive active unsigned orgaddr = 0; // Org'd address unsigned orgwarning = 0; // Has an ORG warning been issued int lastOpcode = -1; // Last RISC opcode assembled +uint8_t riscImmTokenSeen; // The '#' (immediate) token was seen const char reg_err[] = "missing register R0...R31"; @@ -205,6 +206,7 @@ int GenerateRISCCode(int state) // Get opcode parameter and type unsigned short parm = (WORD)(roptbl[state - 3000].parm); unsigned type = roptbl[state - 3000].typ; + riscImmTokenSeen = 0; // Set to "token not seen yet" // Detect whether the opcode parmeter passed determines that the opcode is // specific to only one of the RISC processors and ensure it is legal in @@ -279,6 +281,7 @@ int GenerateRISCCode(int state) return MalformedOpcode(0x01); tok++; + riscImmTokenSeen = 1; if (expr(r_expr, &eval, &eattr, &esym) != OK) return MalformedOpcode(0x02); @@ -316,6 +319,7 @@ int GenerateRISCCode(int state) return MalformedOpcode(0x03); tok++; + riscImmTokenSeen = 1; if (expr(r_expr, &eval, &eattr, &esym) != OK) return MalformedOpcode(0x04); diff --git a/riscasm.h b/riscasm.h index 6c64a94..b2320ac 100644 --- a/riscasm.h +++ b/riscasm.h @@ -49,6 +49,7 @@ extern unsigned orgactive; extern unsigned orgaddr; extern unsigned orgwarning; extern unsigned altbankok; +extern uint8_t riscImmTokenSeen; // Prototypes int GenerateRISCCode(int); diff --git a/version.h b/version.h index 284abe9..58f9dba 100644 --- a/version.h +++ b/version.h @@ -11,8 +11,8 @@ // Release Information -#define MAJOR 1 // Major version number -#define MINOR 3 // Minor version number -#define PATCH 1 // Patch release number +#define MAJOR 1 // Major version number +#define MINOR 3 // Minor version number +#define PATCH 2 // Patch release number #endif // __VERSION_H__ -- 2.37.2