From: Shamus Hammons Date: Fri, 17 Jul 2020 23:45:33 +0000 (-0500) Subject: Version bump for last commit + ws cleanups. Now at v2.0.18. X-Git-Tag: v2.1.0~18 X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=commitdiff_plain;h=ac3149e4607a5a07b212ba85a0fe44614b9aeec4 Version bump for last commit + ws cleanups. Now at v2.0.18. --- diff --git a/eagen0.c b/eagen0.c index 60b7e4a..1de45e3 100644 --- a/eagen0.c +++ b/eagen0.c @@ -327,8 +327,10 @@ int eaNgen(WORD siz) if (w) // Defined { if (CHECK_OPTS(OPT_PC_RELATIVE)) - if (aNexattr&(DEFINED | REFERENCED | EQUATED) == DEFINED | REFERENCED) + { + if (aNexattr & (DEFINED | REFERENCED | EQUATED) == DEFINED | REFERENCED) return error("relocation not allowed"); + } if (tdb) MarkRelocatable(cursect, sloc, tdb, MLONG, NULL); diff --git a/mach.c b/mach.c index 1ae8a2d..42268dc 100644 --- a/mach.c +++ b/mach.c @@ -354,8 +354,10 @@ int m_lea(WORD inst, WORD siz) { inst = B16(01010000, 01001000) | (((uint16_t)a0exval & 7) << 9) | (a0reg); D_word(inst); + if (optim_warn_flag) warn("lea size(An),An converted to addq #size,An"); + return OK; } @@ -462,27 +464,33 @@ int m_adda(WORD inst, WORD siz) if ((a0exattr & DEFINED) && (am0 == IMMED)) { if (CHECK_OPTS(OPT_ADDA_ADDQ)) - if (a0exval > 1 && a0exval <= 8) + { + if ((a0exval > 1) && (a0exval <= 8)) { // Immediate is between 1 and 8 so let's convert to addq return m_addq(B16(01010000, 00000000), siz); + if (optim_warn_flag) warn("adda/suba size(An),An converted to addq/subq #size,An"); } + } + if (CHECK_OPTS(OPT_ADDA_LEA)) - if (a0exval > 8 && (a0exval + 0x8000) < 0x10000) + { + if ((a0exval > 8) && ((a0exval + 0x8000) < 0x10000)) { // Immediate is larger than 8 and word size so let's convert to lea am0 = ADISP; // Change addressing mode a0reg = a1reg; // In ADISP a0reg is used instead of a1reg! + if (!(inst & (1 << 14))) { // We have a suba #x,AREG so let's negate the value a0exval = -a0exval; } - // We're going to rely on +o4 for this, so let's ensure that it's on, - // even just for this instruction + // We're going to rely on +o4 for this, so let's ensure that + // it's on, even just for this instruction int return_value; int temp_flag = optim_flags[OPT_LEA_ADDQ]; optim_flags[OPT_LEA_ADDQ] = 1; // Temporarily save switch state @@ -490,6 +498,7 @@ int m_adda(WORD inst, WORD siz) optim_flags[OPT_LEA_ADDQ] = temp_flag; // Restore switch state return return_value; } + } } inst |= am0 | a0reg | lwsiz_8[siz] | reg_9[a1reg]; @@ -946,18 +955,21 @@ int m_br(WORD inst, WORD siz) { // .B AddFixup(FU_BBRA | FU_PCREL | FU_SEXT, sloc, a0expr); - // So here we have a small issue: this bra.s could be zero offset, but we can never know. - // Because unless we know beforehand that the offset will be zero (i.e. "bra.s +0"), it's - // going to be a label below this instruction! We do have an optimisation flag that can - // check against this during fixups, but we cannot rely on the state of the flag after - // all the file(s) have been processed because its state might have changed multiple times - // during file parsing. (Yes, there's a very low chance that this will ever happen but - // it's not zero!). So, we can use the byte that is going to be filled during fixups - // to store the state of the optimisation flag and read it during that stage so each bra.s - // will have its state stored neatly. Sleazy? Eh, who cares, like this will ever happen ;) - // One final note: we'd better be damn sure that the flag's value is less than 256 or - // magical stuff will happen! - D_word(inst|optim_flags[OPT_NULL_BRA]); + // So here we have a small issue: this bra.s could be zero offset, but + // we can never know. Because unless we know beforehand that the + // offset will be zero (i.e. "bra.s +0"), it's going to be a label + // below this instruction! We do have an optimisation flag that can + // check against this during fixups, but we cannot rely on the state + // of the flag after all the file(s) have been processed because its + // state might have changed multiple times during file parsing. (Yes, + // there's a very low chance that this will ever happen but it's not + // zero!). So, we can use the byte that is going to be filled during + // fixups to store the state of the optimisation flag and read it + // during that stage so each bra.s will have its state stored neatly. + // Sleazy? Eh, who cares, like this will ever happen ;) + // One final note: we'd better be damn sure that the flag's value is + // less than 256 or magical stuff will happen! + D_word(inst | optim_flags[OPT_NULL_BRA]); return OK; } else diff --git a/parmode.h b/parmode.h index b03787e..cd01a4b 100644 --- a/parmode.h +++ b/parmode.h @@ -322,10 +322,10 @@ AMn_IXN: // Handle any indexed (tok -> a comma) { expr(AnBEXPR, &AnBEXVAL, &AnBEXATTR, &AnESYM); - if (CHECK_OPTS(OPT_020_DISP) && AnBEXVAL == 0 && AnEXATTR != 0) + if (CHECK_OPTS(OPT_020_DISP) && (AnBEXVAL == 0) && (AnEXATTR != 0)) { - // bd=0 so let's optimise it out - AnEXTEN|=EXT_BDSIZE0; + // bd = 0 so let's optimise it out + AnEXTEN |= EXT_BDSIZE0; } else if (*tok == DOTL) { @@ -351,6 +351,7 @@ AMn_IXN: // Handle any indexed (tok -> a comma) && (((uint32_t)AnBEXVAL + 0x8000) < 0x10000)) { AnEXTEN |= EXT_BDSIZEW; + if (optim_warn_flag) warn("absolute value in base displacement ranging $FFFF8000..$00007FFF optimised to absolute short"); } @@ -607,7 +608,7 @@ CHECKODn: if (CHECK_OPTS(OPT_020_DISP) && (AnEXATTR & DEFINED) && (AnEXVAL == 0)) { - // od=0 so optimise it out + // od = 0 so optimise it out AMn = MEMPOST; // let's say it's ([bd,An],Xn,od) with od=0 then AnEXTEN |= EXT_IISPOSN; // No outer displacement tok++; @@ -896,6 +897,7 @@ IS_SUPPRESSEDn: && (((uint32_t)AnEXVAL + 0x8000) < 0x10000)) { expr_size = EXT_IISPREW; + if (optim_warn_flag) warn("outer displacement absolute value from $FFFF8000..$00007FFF optimised to absolute short"); } @@ -1172,13 +1174,10 @@ CHK_FOR_DISPn: // expr[.L] AMn = ABSL; - // When PC relative is enforced, check for any symbols that aren't + // When PC relative is enforced, check for any symbols that aren't // EQU'd, in this case it's an illegal mode - if (CHECK_OPTS(OPT_PC_RELATIVE)) - if (AnEXATTR & REFERENCED) - if (AnEXATTR & DEFINED) - if (!(AnEXATTR & EQUATED)) - return error("relocation not allowed"); + if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (AnEXATTR & REFERENCED) && (AnEXATTR & DEFINED) && (!(AnEXATTR & EQUATED))) + return error("relocation not allowed"); // .L is forced here if (*tok == DOTL) diff --git a/rmac.c b/rmac.c index 4fb1582..933da5f 100644 --- a/rmac.c +++ b/rmac.c @@ -243,15 +243,17 @@ int ParseOptimization(char * optstring) else { int opt_no = atoi(&optstring[2]); + if ((opt_no >= 0) && (opt_no < OPT_COUNT)) { optim_flags[opt_no] = onoff; optstring += 3; + // If opt_no is 2 digits then consume an extra character. // Sounds a bit sleazy but we know we're not going to hit - // more than 100 optimisation switches so this should be fine. - // If we do hit that number then it'll probably be time to burn - // the whole codebase and start from scratch. + // more than 100 optimisation switches so this should be + // fine. If we do hit that number then it'll probably be + // time to burn the whole codebase and start from scratch. if (opt_no > 9) optstring++; } @@ -263,6 +265,7 @@ int ParseOptimization(char * optstring) { return ERROR; } + if (*optstring == ',') optstring++; } diff --git a/sect.c b/sect.c index cdf53ff..ae4d750 100644 --- a/sect.c +++ b/sect.c @@ -416,14 +416,11 @@ int ResolveFixups(int sno) if (evexpr(fup->expr, &eval, &eattr, &esym) != OK) continue; - if (CHECK_OPTS(OPT_PC_RELATIVE)) - if (eattr & REFERENCED) - if (eattr & DEFINED) - if (!(eattr & EQUATED)) - { - error("relocation not allowed"); - continue; - } + if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (eattr & REFERENCED) && (eattr & DEFINED) && (!(eattr & EQUATED))) + { + error("relocation not allowed"); + continue; + } } // Simple symbol else @@ -431,14 +428,11 @@ int ResolveFixups(int sno) SYM * sy = fup->symbol; eattr = sy->sattr; - if (CHECK_OPTS(OPT_PC_RELATIVE)) - if (eattr & REFERENCED) - if (eattr & DEFINED) - if (!(eattr & EQUATED)) - { - error("relocation not allowed"); - continue; - } + if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (eattr & REFERENCED) && (eattr & DEFINED) && (!(eattr & EQUATED))) + { + error("relocation not allowed"); + continue; + } if (eattr & DEFINED) eval = sy->svalue; @@ -548,8 +542,10 @@ int ResolveFixups(int sno) // Just output a NOP *locp++ = 0x4E; *locp = 0x71; + if (optim_warn_flag) warn("bra.s with zero offset converted to NOP"); + continue; } else @@ -904,8 +900,8 @@ int ResolveFixups(int sno) locp[1] = (uint8_t)eval; break; - // This is a 6 bit absoulte short address. It occupies - // the low 6 bits of the middle byte of a DSP word. + // This is a 6 bit absoulte short address. It occupies the low 6 + // bits of the middle byte of a DSP word. case FU_DSPADR06: if (eval > 63) { @@ -916,8 +912,8 @@ int ResolveFixups(int sno) locp[1] |= eval; break; - // This is a 6 bit absoulte short address. It occupies - // the low 6 bits of the middle byte of a DSP word. + // This is a 6 bit absoulte short address. It occupies the low 6 + // bits of the middle byte of a DSP word. case FU_DSPPP06: if (eval < 0xFFFFFFC0) { diff --git a/version.h b/version.h index 14286a0..61b174c 100644 --- a/version.h +++ b/version.h @@ -15,7 +15,7 @@ #define MAJOR 2 // Major version number #define MINOR 0 // Minor version number -#define PATCH 17 // Patch release number +#define PATCH 18 // Patch release number #endif // __VERSION_H__