if (w) // Defined
{
if (CHECK_OPTS(OPT_PC_RELATIVE))
- if (aNexattr&(DEFINED | REFERENCED | EQUATED) == DEFINED | REFERENCED)
+ {
+ if (aNexattr & (DEFINED | REFERENCED | EQUATED) == DEFINED | REFERENCED)
return error("relocation not allowed");
+ }
if (tdb)
MarkRelocatable(cursect, sloc, tdb, MLONG, NULL);
{
inst = B16(01010000, 01001000) | (((uint16_t)a0exval & 7) << 9) | (a0reg);
D_word(inst);
+
if (optim_warn_flag)
warn("lea size(An),An converted to addq #size,An");
+
return OK;
}
if ((a0exattr & DEFINED) && (am0 == IMMED))
{
if (CHECK_OPTS(OPT_ADDA_ADDQ))
- if (a0exval > 1 && a0exval <= 8)
+ {
+ if ((a0exval > 1) && (a0exval <= 8))
{
// Immediate is between 1 and 8 so let's convert to addq
return m_addq(B16(01010000, 00000000), siz);
+
if (optim_warn_flag)
warn("adda/suba size(An),An converted to addq/subq #size,An");
}
+ }
+
if (CHECK_OPTS(OPT_ADDA_LEA))
- if (a0exval > 8 && (a0exval + 0x8000) < 0x10000)
+ {
+ if ((a0exval > 8) && ((a0exval + 0x8000) < 0x10000))
{
// Immediate is larger than 8 and word size so let's convert to lea
am0 = ADISP; // Change addressing mode
a0reg = a1reg; // In ADISP a0reg is used instead of a1reg!
+
if (!(inst & (1 << 14)))
{
// We have a suba #x,AREG so let's negate the value
a0exval = -a0exval;
}
- // We're going to rely on +o4 for this, so let's ensure that it's on,
- // even just for this instruction
+ // We're going to rely on +o4 for this, so let's ensure that
+ // it's on, even just for this instruction
int return_value;
int temp_flag = optim_flags[OPT_LEA_ADDQ];
optim_flags[OPT_LEA_ADDQ] = 1; // Temporarily save switch state
optim_flags[OPT_LEA_ADDQ] = temp_flag; // Restore switch state
return return_value;
}
+ }
}
inst |= am0 | a0reg | lwsiz_8[siz] | reg_9[a1reg];
{
// .B
AddFixup(FU_BBRA | FU_PCREL | FU_SEXT, sloc, a0expr);
- // So here we have a small issue: this bra.s could be zero offset, but we can never know.
- // Because unless we know beforehand that the offset will be zero (i.e. "bra.s +0"), it's
- // going to be a label below this instruction! We do have an optimisation flag that can
- // check against this during fixups, but we cannot rely on the state of the flag after
- // all the file(s) have been processed because its state might have changed multiple times
- // during file parsing. (Yes, there's a very low chance that this will ever happen but
- // it's not zero!). So, we can use the byte that is going to be filled during fixups
- // to store the state of the optimisation flag and read it during that stage so each bra.s
- // will have its state stored neatly. Sleazy? Eh, who cares, like this will ever happen ;)
- // One final note: we'd better be damn sure that the flag's value is less than 256 or
- // magical stuff will happen!
- D_word(inst|optim_flags[OPT_NULL_BRA]);
+ // So here we have a small issue: this bra.s could be zero offset, but
+ // we can never know. Because unless we know beforehand that the
+ // offset will be zero (i.e. "bra.s +0"), it's going to be a label
+ // below this instruction! We do have an optimisation flag that can
+ // check against this during fixups, but we cannot rely on the state
+ // of the flag after all the file(s) have been processed because its
+ // state might have changed multiple times during file parsing. (Yes,
+ // there's a very low chance that this will ever happen but it's not
+ // zero!). So, we can use the byte that is going to be filled during
+ // fixups to store the state of the optimisation flag and read it
+ // during that stage so each bra.s will have its state stored neatly.
+ // Sleazy? Eh, who cares, like this will ever happen ;)
+ // One final note: we'd better be damn sure that the flag's value is
+ // less than 256 or magical stuff will happen!
+ D_word(inst | optim_flags[OPT_NULL_BRA]);
return OK;
}
else
{
expr(AnBEXPR, &AnBEXVAL, &AnBEXATTR, &AnESYM);
- if (CHECK_OPTS(OPT_020_DISP) && AnBEXVAL == 0 && AnEXATTR != 0)
+ if (CHECK_OPTS(OPT_020_DISP) && (AnBEXVAL == 0) && (AnEXATTR != 0))
{
- // bd=0 so let's optimise it out
- AnEXTEN|=EXT_BDSIZE0;
+ // bd = 0 so let's optimise it out
+ AnEXTEN |= EXT_BDSIZE0;
}
else if (*tok == DOTL)
{
&& (((uint32_t)AnBEXVAL + 0x8000) < 0x10000))
{
AnEXTEN |= EXT_BDSIZEW;
+
if (optim_warn_flag)
warn("absolute value in base displacement ranging $FFFF8000..$00007FFF optimised to absolute short");
}
if (CHECK_OPTS(OPT_020_DISP) && (AnEXATTR & DEFINED) && (AnEXVAL == 0))
{
- // od=0 so optimise it out
+ // od = 0 so optimise it out
AMn = MEMPOST; // let's say it's ([bd,An],Xn,od) with od=0 then
AnEXTEN |= EXT_IISPOSN; // No outer displacement
tok++;
&& (((uint32_t)AnEXVAL + 0x8000) < 0x10000))
{
expr_size = EXT_IISPREW;
+
if (optim_warn_flag)
warn("outer displacement absolute value from $FFFF8000..$00007FFF optimised to absolute short");
}
// expr[.L]
AMn = ABSL;
- // When PC relative is enforced, check for any symbols that aren't
+ // When PC relative is enforced, check for any symbols that aren't
// EQU'd, in this case it's an illegal mode
- if (CHECK_OPTS(OPT_PC_RELATIVE))
- if (AnEXATTR & REFERENCED)
- if (AnEXATTR & DEFINED)
- if (!(AnEXATTR & EQUATED))
- return error("relocation not allowed");
+ if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (AnEXATTR & REFERENCED) && (AnEXATTR & DEFINED) && (!(AnEXATTR & EQUATED)))
+ return error("relocation not allowed");
// .L is forced here
if (*tok == DOTL)
else
{
int opt_no = atoi(&optstring[2]);
+
if ((opt_no >= 0) && (opt_no < OPT_COUNT))
{
optim_flags[opt_no] = onoff;
optstring += 3;
+
// If opt_no is 2 digits then consume an extra character.
// Sounds a bit sleazy but we know we're not going to hit
- // more than 100 optimisation switches so this should be fine.
- // If we do hit that number then it'll probably be time to burn
- // the whole codebase and start from scratch.
+ // more than 100 optimisation switches so this should be
+ // fine. If we do hit that number then it'll probably be
+ // time to burn the whole codebase and start from scratch.
if (opt_no > 9)
optstring++;
}
{
return ERROR;
}
+
if (*optstring == ',')
optstring++;
}
if (evexpr(fup->expr, &eval, &eattr, &esym) != OK)
continue;
- if (CHECK_OPTS(OPT_PC_RELATIVE))
- if (eattr & REFERENCED)
- if (eattr & DEFINED)
- if (!(eattr & EQUATED))
- {
- error("relocation not allowed");
- continue;
- }
+ if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (eattr & REFERENCED) && (eattr & DEFINED) && (!(eattr & EQUATED)))
+ {
+ error("relocation not allowed");
+ continue;
+ }
}
// Simple symbol
else
SYM * sy = fup->symbol;
eattr = sy->sattr;
- if (CHECK_OPTS(OPT_PC_RELATIVE))
- if (eattr & REFERENCED)
- if (eattr & DEFINED)
- if (!(eattr & EQUATED))
- {
- error("relocation not allowed");
- continue;
- }
+ if ((CHECK_OPTS(OPT_PC_RELATIVE)) && (eattr & REFERENCED) && (eattr & DEFINED) && (!(eattr & EQUATED)))
+ {
+ error("relocation not allowed");
+ continue;
+ }
if (eattr & DEFINED)
eval = sy->svalue;
// Just output a NOP
*locp++ = 0x4E;
*locp = 0x71;
+
if (optim_warn_flag)
warn("bra.s with zero offset converted to NOP");
+
continue;
}
else
locp[1] = (uint8_t)eval;
break;
- // This is a 6 bit absoulte short address. It occupies
- // the low 6 bits of the middle byte of a DSP word.
+ // This is a 6 bit absoulte short address. It occupies the low 6
+ // bits of the middle byte of a DSP word.
case FU_DSPADR06:
if (eval > 63)
{
locp[1] |= eval;
break;
- // This is a 6 bit absoulte short address. It occupies
- // the low 6 bits of the middle byte of a DSP word.
+ // This is a 6 bit absoulte short address. It occupies the low 6
+ // bits of the middle byte of a DSP word.
case FU_DSPPP06:
if (eval < 0xFFFFFFC0)
{
#define MAJOR 2 // Major version number
#define MINOR 0 // Minor version number
-#define PATCH 17 // Patch release number
+#define PATCH 18 // Patch release number
#endif // __VERSION_H__