X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=riscasm.c;h=533eca7e41f52f75b70b39c834968bb0a97069ad;hp=d2d594b31c5a0d0ae59c94dff306321e98db271b;hb=eace4e1b294ccec54a5c476619f616f5da0bf8a9;hpb=a48737de123e304866212f5382d6fa4174d496a0 diff --git a/riscasm.c b/riscasm.c index d2d594b..533eca7 100644 --- a/riscasm.c +++ b/riscasm.c @@ -1,29 +1,30 @@ // -// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System +// RMAC - Reboot's Macro Assembler for all Atari computers // RISCA.C - GPU/DSP Assembler -// Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends +// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986 // Source utilised with the kind permission of Landon Dyer // #include "riscasm.h" +#include "amode.h" +#include "direct.h" #include "error.h" -#include "sect.h" -#include "token.h" #include "expr.h" -#include "direct.h" #include "mark.h" -#include "amode.h" +#include "procln.h" +#include "sect.h" +#include "token.h" #define DEF_MR // Declare keyword values #include "risckw.h" // Incl. generated risc keywords -#define DEF_KW // Declare keyword values +#define DEF_KW // Declare keyword values #include "kwtab.h" // Incl. generated keyword tables & defs unsigned altbankok = 0; // Ok to use alternate register bank -unsigned orgactive = 0; // RISC org directive active +unsigned orgactive = 0; // RISC/6502 org directive active unsigned orgaddr = 0; // Org'd address unsigned orgwarning = 0; // Has an ORG warning been issued int lastOpcode = -1; // Last RISC opcode assembled @@ -32,7 +33,7 @@ uint8_t riscImmTokenSeen; // The '#' (immediate) token was seen const char reg_err[] = "missing register R0...R31"; // Jaguar jump condition names -const char condname[MAXINTERNCC][5] = { +const char condname[MAXINTERNCC][5] = { "NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ", "N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO", "PL", "MI", "F" @@ -101,8 +102,8 @@ const struct opcoderecord roptbl[] = { { MR_NORMI, RI_TWO, 56 }, { MR_NOP, RI_NONE, 57 }, { MR_SAT24, RI_ONE, 62 }, - { MR_UNPACK, RI_ONE, 63 + GPUONLY }, - { MR_PACK, RI_ONE, 63 + GPUONLY }, + { MR_UNPACK, RI_ONE, 63 + GPUONLY | (0 << 6) }, + { MR_PACK, RI_ONE, 63 + GPUONLY | (1 << 6) }, { MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY }, { MR_MOVE, RI_MOVE, 0 }, { MR_LOAD, RI_LOAD, 0 }, @@ -126,9 +127,27 @@ void strtoupper(char * s) // static inline int MalformedOpcode(int signal) { - char buf[16]; - sprintf(buf, "%02X", signal); - return errors("Malformed opcode [internal $%s]", buf); + return error("Malformed opcode [internal $%02X]", signal); +} + + +// +// Function to return "Illegal Indexed Register" error +// Anyone trying to index something other than R14 or R15 +// +static inline int IllegalIndexedRegister(int reg) +{ + return error("Attempted index reference with non-indexable register (r%d)", reg - KW_R0); +} + + +// +// Function to return "Illegal Indexed Register" error for EQUR scenarios +// Trying to use register value within EQUR that isn't 14 or 15 +// +static inline int IllegalIndexedRegisterEqur(SYM * sy) +{ + return error("Attempted index reference with non-indexable register within EQUR (%s = r%d)", sy->sname, sy->svalue); } @@ -140,13 +159,13 @@ void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2) // Check for absolute address setting if (!orgwarning && !orgactive) { -// warn("GPU/DSP code outside of absolute section"); warn("RISC code generated with no origin defined"); orgwarning = 1; } int value = ((opcode & 0x3F) << 10) + ((reg1 & 0x1F) << 5) + (reg2 & 0x1F); D_word(value); +//printf("BuildRISC: opcode=$%X, reg1=$%X, reg2=$%X, final=$%04X\n", opcode, reg1, reg2, value); } @@ -155,7 +174,7 @@ void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2) // int GetRegister(WORD rattr) { - VALUE eval; // Expression value + uint64_t eval; // Expression value WORD eattr; // Expression attributes SYM * esym; // External symbol involved in expr. TOKEN r_expr[EXPRSIZE]; // Expression token list @@ -169,13 +188,13 @@ int GetRegister(WORD rattr) if (!(eattr & DEFINED)) { - AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr); + AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr); return 0; } // If we got a register in range (0-31), return it if ((eval >= 0) && (eval <= 31)) - return eval; + return (int)eval; // Otherwise, it's out of range & we flag an error return error(reg_err); @@ -198,7 +217,7 @@ int GenerateRISCCode(int state) WORD attrflg; int indexed; // Indexed register flag - VALUE eval; // Expression value + uint64_t eval; // Expression value WORD eattr; // Expression attributes SYM * esym; // External symbol involved in expr. TOKEN r_expr[EXPRSIZE]; // Expression token list @@ -230,17 +249,17 @@ int GenerateRISCCode(int state) reg2 = GetRegister(FU_REGTWO); at_eol(); BuildRISCIntructionWord(parm, parm >> 6, reg2); - break; + break; // Two operand instructions (Rs,Rd) // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT, // MMULT, MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR - case RI_TWO: + case RI_TWO: if (parm == 37) altbankok = 1; // MOVEFA reg1 = GetRegister(FU_REGONE); - CHECK_COMMA; + CHECK_COMMA; if (parm == 36) altbankok = 1; // MOVETA @@ -301,12 +320,12 @@ int GenerateRISCCode(int state) if ((int)eval < reg1 || (int)eval > reg2) return error("constant out of range"); - if (parm & SUB32) - reg1 = 32 - eval; + if (parm & SUB32) + reg1 = 32 - (int)eval; else if (type == RI_NUM_32) - reg1 = (reg1 == 32 ? 0 : eval); + reg1 = (reg1 == 32 ? 0 : (int)eval); else - reg1 = eval; + reg1 = (int)eval; } CHECK_COMMA; @@ -323,6 +342,15 @@ int GenerateRISCCode(int state) tok++; riscImmTokenSeen = 1; + // Check for equated register after # and return error if so + if (*tok == SYMBOL) + { + sy = lookup(string[tok[1]], LABEL, 0); + + if (sy && (sy->sattre & EQUATEDREG)) + return error("equated register in 1st operand of MOVEI instruction"); + } + if (expr(r_expr, &eval, &eattr, &esym) != OK) return MalformedOpcode(0x04); @@ -350,12 +378,13 @@ int GenerateRISCCode(int state) { if (eattr & TDB) //{ -//printf("RISCASM: Doing rmark for RI_MOVEI (tdb=$%X)...\n", eattr & TDB); - rmark(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL); +//printf("RISCASM: Doing MarkRelocatable for RI_MOVEI (tdb=$%X)...\n", eattr & TDB); + MarkRelocatable(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL); //} } - val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000); +// val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000); + val = WORDSWAP32(eval); CHECK_COMMA; reg2 = GetRegister(FU_REGTWO); at_eol(); @@ -384,7 +413,7 @@ int GenerateRISCCode(int state) break; // (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59 - case RI_LOAD: + case RI_LOAD: indexed = 0; parm = 41; @@ -393,8 +422,14 @@ int GenerateRISCCode(int state) tok++; - if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')')) - indexed = (*tok - KW_R0); + if ((*(tok + 1) == '+') || (*(tok + 1) == '-')) { + // Trying to make indexed call + if ((*tok == KW_R14 || *tok == KW_R15)) { + indexed = (*tok - KW_R0); + } else { + return IllegalIndexedRegister(*tok); + } + } if (*tok == SYMBOL) { @@ -409,11 +444,13 @@ int GenerateRISCCode(int state) if (sy->sattre & EQUATEDREG) { - if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) - && (*(tok + 2) != ')')) - { - indexed = (sy->svalue & 0x1F); - tok++; + if ((*(tok + 2) == '+') || (*(tok + 2) == '-')) { + if ((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) { + indexed = (sy->svalue & 0x1F); + tok++; + } else { + return IllegalIndexedRegisterEqur(sy); + } } } } @@ -466,7 +503,7 @@ int GenerateRISCCode(int state) if (!(eattr & DEFINED)) return error("constant expected after '+'"); - reg1 = eval; + reg1 = (int)eval; if (reg1 == 0) { @@ -503,7 +540,7 @@ int GenerateRISCCode(int state) break; // Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61 - case RI_STORE: + case RI_STORE: parm = 47; reg1 = GetRegister(FU_REGONE); CHECK_COMMA; @@ -514,7 +551,7 @@ int GenerateRISCCode(int state) tok++; indexed = 0; - if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')')) + if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')')) indexed = (*tok - KW_R0); if (*tok == SYMBOL) @@ -527,7 +564,7 @@ int GenerateRISCCode(int state) return ERROR; } - if (sy->sattre & EQUATEDREG) + if (sy->sattre & EQUATEDREG) { if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) && (*(tok + 2) != ')')) @@ -589,7 +626,7 @@ int GenerateRISCCode(int state) } else { - reg2 = eval; + reg2 = (int)eval; if (reg2 == 0) { @@ -625,7 +662,7 @@ int GenerateRISCCode(int state) break; // LOADB/LOADP/LOADW (Rn),Rn - case RI_LOADN: + case RI_LOADN: if (*tok != '(') return MalformedOpcode(0x0B); @@ -643,7 +680,7 @@ int GenerateRISCCode(int state) break; // STOREB/STOREP/STOREW Rn,(Rn) - case RI_STOREN: + case RI_STOREN: reg1 = GetRegister(FU_REGONE); CHECK_COMMA; @@ -685,8 +722,9 @@ int GenerateRISCCode(int state) { // CC using a constant number tok++; - val = *tok; - tok++; + uint64_t *tok64 = (uint64_t *)tok; + val = (int)*tok64++; + tok = (uint32_t *)tok64; CHECK_COMMA; } else if (*tok == SYMBOL) @@ -713,9 +751,7 @@ int GenerateRISCCode(int state) ccsym = lookup(string[tok[1]], LABEL, 0); if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC)) - { val = ccsym->svalue; - } else return error("unknown condition code"); } @@ -760,7 +796,7 @@ int GenerateRISCCode(int state) reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2; if ((reg2 < -16) || (reg2 > 15)) - error("PC relative overflow"); + error("PC relative overflow (outside of -16 to 15)"); } BuildRISCIntructionWord(parm, reg2, reg1);