X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=mach.c;h=1ae8a2def8439d9e2e85f35ebee50e6b247842f6;hp=eec74f72b2d2c9d9343adf319049fe057827e88a;hb=9afaf60ca24cdb08f900ae584107e29e3af46566;hpb=ff8fcfc3175c3bf998293c462d56161941efb819

diff --git a/mach.c b/mach.c
index eec74f7..1ae8a2d 100644
--- a/mach.c
+++ b/mach.c
@@ -354,7 +354,8 @@ int m_lea(WORD inst, WORD siz)
 	{
 		inst = B16(01010000, 01001000) | (((uint16_t)a0exval & 7) << 9) | (a0reg);
 		D_word(inst);
-		warn("lea size(An),An converted to addq #size,An");
+		if (optim_warn_flag)
+			warn("lea size(An),An converted to addq #size,An");
 		return OK;
 	}
 
@@ -458,25 +459,37 @@ int m_abcd(WORD inst, WORD siz)
 //
 int m_adda(WORD inst, WORD siz)
 {
-	if (a0exattr & DEFINED)
+	if ((a0exattr & DEFINED) && (am0 == IMMED))
 	{
- 		if (CHECK_OPTS(OPT_ADDA_ADDQ))
+		if (CHECK_OPTS(OPT_ADDA_ADDQ))
 			if (a0exval > 1 && a0exval <= 8)
+			{
 				// Immediate is between 1 and 8 so let's convert to addq
 				return m_addq(B16(01010000, 00000000), siz);
-	if (CHECK_OPTS(OPT_ADDA_LEA))
-		if (a0exval > 8 && (a0exval+0x8000)<0x10000)
- 		{
-			// Immediate is larger than 8 and word size so let's convert to lea
-			am0 = ADISP;    // Change addressing mode
-			a0reg = a1reg;  // In ADISP a0reg is used instead of a1reg!
-			if (!(inst & (1 << 14)))
+				if (optim_warn_flag)
+					warn("adda/suba size(An),An converted to addq/subq #size,An");
+			}
+		if (CHECK_OPTS(OPT_ADDA_LEA))
+			if (a0exval > 8 && (a0exval + 0x8000) < 0x10000)
 			{
-				// We have a suba #x,AREG so let's negate the value
-				a0exval = -a0exval;
+				// Immediate is larger than 8 and word size so let's convert to lea
+				am0 = ADISP;    // Change addressing mode
+				a0reg = a1reg;  // In ADISP a0reg is used instead of a1reg!
+				if (!(inst & (1 << 14)))
+				{
+					// We have a suba #x,AREG so let's negate the value
+					a0exval = -a0exval;
+				}
+
+				// We're going to rely on +o4 for this, so let's ensure that it's on,
+				// even just for this instruction
+				int return_value;
+				int temp_flag = optim_flags[OPT_LEA_ADDQ];
+				optim_flags[OPT_LEA_ADDQ] = 1;				// Temporarily save switch state
+				return_value = m_lea(B16(01000001, 11011000), SIZW);
+				optim_flags[OPT_LEA_ADDQ] = temp_flag;		// Restore switch state
+				return return_value;
 			}
-			return m_lea(B16(01000001, 11011000), SIZW);
-		}
 	}
 
 	inst |= am0 | a0reg | lwsiz_8[siz] | reg_9[a1reg];
@@ -732,7 +745,7 @@ int m_move(WORD inst, WORD size)
 	{
 		m_moveq((WORD)0x7000, (WORD)0);
 
-		if (sbra_flag)
+		if (optim_warn_flag)
 			warn("move.l #size,dx converted to moveq");
 	}
 	else
@@ -890,7 +903,7 @@ int m_br(WORD inst, WORD siz)
 				inst |= v & 0xFF;
 				D_word(inst);
 
-				if (sbra_flag)
+				if (optim_warn_flag)
 					warn("Bcc.w/BSR.w converted to .s");
 
 				return OK;
@@ -933,7 +946,18 @@ int m_br(WORD inst, WORD siz)
 	{
 		// .B
 		AddFixup(FU_BBRA | FU_PCREL | FU_SEXT, sloc, a0expr);
-		D_word(inst);
+		// So here we have a small issue: this bra.s could be zero offset, but we can never know.
+		// Because unless we know beforehand that the offset will be zero (i.e. "bra.s +0"), it's
+		// going to be a label below this instruction! We do have an optimisation flag that can
+		// check against this during fixups, but we cannot rely on the state of the flag after
+		// all the file(s) have been processed because its state might have changed multiple times
+		// during file parsing. (Yes, there's a very low chance that this will ever happen but
+		// it's not zero!). So, we can use the byte that is going to be filled during fixups
+		// to store the state of the optimisation flag and read it during that stage so each bra.s
+		// will have its state stored neatly. Sleazy? Eh, who cares, like this will ever happen ;)
+		// One final note: we'd better be damn sure that the flag's value is less than 256 or
+		// magical stuff will happen!
+		D_word(inst|optim_flags[OPT_NULL_BRA]);
 		return OK;
 	}
 	else