X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=eagen0.c;h=62e686c144859631a44d8f5026a84e9828d16300;hp=c69ac886efe96673908a6a77547f9cc31961f4d1;hb=582df8950c285e1746d0c4a9e3ead6545c962dc8;hpb=d09274f3e3d4dca122c308a621ea8edc100b7d99 diff --git a/eagen0.c b/eagen0.c index c69ac88..62e686c 100644 --- a/eagen0.c +++ b/eagen0.c @@ -1,25 +1,25 @@ // -// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System +// RMAC - Reboot's Macro Assembler for all Atari computers // EAGEN0.C - Effective Address Code Generation // Generated Code for eaN (Included twice by "eagen.c") -// Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends +// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986 -// Source Utilised with the Kind Permission of Landon Dyer +// Source utilised with the kind permission of Landon Dyer // int eaNgen(WORD siz) { - WORD w; - VALUE v; - WORD tdb; - - v = aNexval; - w = (WORD)(aNexattr & DEFINED); - tdb = (WORD)(aNexattr & TDB); + uint32_t vbd, v = (uint32_t)aNexval; + WORD wbd, w = (WORD)(aNexattr & DEFINED); + WORD tdbbd, tdb = (WORD)(aNexattr & TDB); + vbd = (uint32_t)aNbdexval; + wbd = (WORD)(aNbdexattr & DEFINED); + tdbbd = (WORD)(aNbdexattr & TDB); switch (amN) { - case DREG: // "Do nothing" - they're in the opword + // "Do nothing" - they're in the opword + case DREG: case AREG: case AIND: case APOSTINC: @@ -28,30 +28,65 @@ int eaNgen(WORD siz) case AM_CCR: case AM_SR: case AM_NONE: - break; // This is a performance hit, though - case ADISP: // expr(An) + // This is a performance hit, though + break; + case ADISP: + // expr(An) if (w) - { // Just deposit it + { + // Just deposit it if (tdb) - rmark(cursect, sloc, tdb, MWORD, NULL); + MarkRelocatable(cursect, sloc, tdb, MWORD, NULL); + + if ((v == 0) && CHECK_OPTS(OPT_INDIRECT_DISP) && !movep) + { + // If expr is 0, size optimise the opcode. Generally the lower + // 6 bits of the opcode for expr(ax) are 101rrr where rrr=the + // number of the register, then followed by a word containing + // 'expr'. We need to change that to 010rrr. + if ((siz & 0x8000) == 0) + { + chptr_opcode[0] &= ((0xFFC7 >> 8) & 255); // mask off bits + chptr_opcode[1] &= 0xFFC7 & 255; // mask off bits + chptr_opcode[0] |= ((0x0010 >> 8) & 255); // slap in 010 bits + chptr_opcode[1] |= 0x0010 & 255; // slap in 010 bits + } + else + { + // Special case for move ea,ea: there are two ea fields + // there and we get a signal if it's the second ea field + // from m_ea - siz's 16th bit is set + chptr_opcode[0] &= ((0xFE3F >> 8) & 255); // mask off bits + chptr_opcode[1] &= 0xFE3F & 255; // mask off bits + chptr_opcode[0] |= ((0x0080 >> 8) & 255); // slap in 010 bits + chptr_opcode[1] |= 0x0080 & 255; // slap in 010 bits + } + + if (sbra_flag) + warn("0(An) converted to (An)"); + + return OK; + } - if (v + 0x8000 >= 0x18000) + if ((v + 0x8000) >= 0x18000) return error(range_error); D_word(v); } else - { // Arrange for fixup later on - fixup(FU_WORD|FU_SEXT, sloc, aNexpr); + { + // Arrange for fixup later on + AddFixup(FU_WORD | FU_SEXT, sloc, aNexpr); D_word(0); } break; case PCDISP: if (w) - { // Just deposit it + { + // Just deposit it if ((aNexattr & TDB) == cursect) - v -= (VALUE)sloc; + v -= (uint32_t)sloc; else if ((aNexattr & TDB) != ABS) error(rel_error); @@ -61,52 +96,60 @@ int eaNgen(WORD siz) D_word(v); } else - { // Arrange for fixup later on - fixup(FU_WORD|FU_SEXT|FU_PCREL, sloc, aNexpr); + { + // Arrange for fixup later on + AddFixup(FU_WORD | FU_SEXT | FU_PCREL, sloc, aNexpr); D_word(0); } break; case AINDEXED: - w = (WORD)((aNixreg << 12) | aNixsiz); // Compute ixreg and size+scale + // Compute ixreg and size+scale + w = (WORD)((aNixreg << 12) | aNixsiz); if (aNexattr & DEFINED) - { // Deposit a byte... + { + // Deposit a byte... if (tdb) - return error(abs_error); // Can't mark bytes + // Can't mark bytes + return error(abs_error); if (v + 0x80 >= 0x180) return error(range_error); - w |= v & 0xff; + w |= v & 0xFF; D_word(w); } else - { // Fixup the byte later - fixup(FU_BYTE|FU_SEXT, sloc+1, aNexpr); + { + // Fixup the byte later + AddFixup(FU_BYTE | FU_SEXT, sloc + 1, aNexpr); D_word(w); } break; case PCINDEXED: - w = (WORD)((aNixreg << 12) | aNixsiz); // Compute ixreg and size+scale + // Compute ixreg and size+scale + w = (WORD)((aNixreg << 12) | aNixsiz); if (aNexattr & DEFINED) - { // Deposit a byte... - if ((aNexattr & TDB) == cursect) - v -= (VALUE)sloc; + { + // Deposit a byte... + if ((aNexattr & TDB) == cursect) + v -= (uint32_t)sloc; else if ((aNexattr & TDB) != ABS) error(rel_error); if (v + 0x80 >= 0x100) return error(range_error); - w |= v & 0xff; + w |= v & 0xFF; D_word(w); } else - { // Fixup the byte later - fixup(FU_WBYTE|FU_SEXT|FU_PCREL, sloc, aNexpr); + { + // Fixup the byte later + AddFixup(FU_WBYTE | FU_SEXT | FU_PCREL, sloc, aNexpr); D_word(w); } @@ -127,7 +170,7 @@ int eaNgen(WORD siz) } else { - fixup(FU_BYTE|FU_SEXT, sloc+1, aNexpr); + AddFixup(FU_BYTE | FU_SEXT, sloc + 1, aNexpr); D_word(0); } @@ -136,17 +179,17 @@ int eaNgen(WORD siz) case SIZN: if (w) { - if (tdb) - rmark(cursect, sloc, tdb, MWORD, NULL); - if (v + 0x10000 >= 0x20000) return error(range_error); + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MWORD, NULL); + D_word(v); } else { - fixup(FU_WORD|FU_SEXT, sloc, aNexpr); + AddFixup(FU_WORD | FU_SEXT, sloc, aNexpr); D_word(0); } @@ -155,27 +198,106 @@ int eaNgen(WORD siz) if (w) { if (tdb) - rmark(cursect, sloc, tdb, MLONG, NULL); + MarkRelocatable(cursect, sloc, tdb, MLONG, NULL); D_long(v); } else { - fixup(FU_LONG, sloc, aNexpr); + AddFixup(FU_LONG, sloc, aNexpr); D_long(0); } + break; + case SIZS: + // 68881/68882/68040 only + if (w) + { + float vv; + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MSINGLE, NULL); + + vv = (float)v; + + D_single(vv); + } + else + { + float vv = 0; + AddFixup(FU_FLOATSING, sloc, aNexpr); + + D_single(vv); + } + + break; + case SIZD: + // 68881/68882/68040 only + if (w) + { + double vv; + unsigned long long vvv; + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MDOUBLE, NULL); + + // We want to store the IEE754 float into ram from a generic + // 32-bit int. First, convert it to double float, then cast + // that to 64-bit, then convert to big endian (if needed) + // and then store it (phew!) + vv = *(float *)&aNexval; + vvv = BYTESWAP64(*(unsigned long long *)&vv); + + D_double(vvv); + } + else + { + unsigned long long vvv = 0; + AddFixup(FU_FLOATDOUB, sloc, aNexpr); + + D_double(vvv); + } + + break; + case SIZX: + // 68881/68882/68040 only + if (w) + { + long double vv; + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MEXTEND, NULL); + + // We want to store the IEE754 float into ram from a generic + // 32-bit int. First, convert it to double float, then cast + // that to 96-bit, then convert to big endian (if needed) + // and then store it (phew!) + vv = (double)aNexval; + + //*chptr++ = (char)((*(unsigned long long *)&vv) >> 32) | 0x80 /* assume that the number is normalised */; + D_extend(vv); + } + else + { + long double vvv = 0; + AddFixup(FU_FLOATDOUB, sloc, aNexpr); + + D_extend(vvv); + } + break; default: - interror(1); // IMMED size problem + // IMMED size problem + interror(1); } + break; + case SIZP: + // 68881/68882/68040 only + return error("Sorry, .p constant format is not implemented yet!"); break; case ABSW: - if (w) + if (w) // Defined { if (tdb) - rmark(cursect, sloc, tdb, MWORD, NULL); + MarkRelocatable(cursect, sloc, tdb, MWORD, NULL); if (v + 0x8000 >= 0x10000) return error(range_error); @@ -184,25 +306,31 @@ int eaNgen(WORD siz) } else { - fixup(FU_WORD|FU_SEXT, sloc, aNexpr); + AddFixup(FU_WORD | FU_SEXT, sloc, aNexpr); D_word(0); } break; case ABSL: - if (w) + if (w) // Defined { if (tdb) - rmark(cursect, sloc, tdb, MLONG, NULL); + MarkRelocatable(cursect, sloc, tdb, MLONG, NULL); D_long(v); } else { - fixup(FU_LONG, sloc, aNexpr); + AddFixup(FU_LONG, sloc, aNexpr); D_long(0); } + break; + case DINDW: + D_word((0x190 | (aNixreg << 12))); + break; + case DINDL: + D_word((0x990 | (aNixreg << 12))); break; case ABASE: case MEMPOST: @@ -210,9 +338,103 @@ int eaNgen(WORD siz) case PCBASE: case PCMPOST: case PCMPRE: - return error("unsupported 68020 addressing mode"); + D_word(aNexten); + // Deposit bd (if not suppressed) + if ((aNexten & 0x0030) == EXT_BDSIZE0) + { + // Don't deposit anything (suppressed) + } + else if ((aNexten & 0x0030) == EXT_BDSIZEW) + { + // Deposit word bd + if (wbd) + { + // Just deposit it + if (tdb) + MarkRelocatable(cursect, sloc, tdbbd, MWORD, NULL); + + if (vbd + 0x8000 >= 0x10000) + return error(range_error); + + D_word(vbd); + } + else + { + // Arrange for fixup later on + AddFixup(FU_WORD|FU_SEXT, sloc, aNbexpr); + D_word(0); + } + } + else + { + // Deposit long bd + if (wbd) + { + // Just deposit it + if (tdbbd) + MarkRelocatable(cursect, sloc, tdbbd, MLONG, NULL); + + D_long(vbd); + } + else + { + // Arrange for fixup later on + AddFixup(FU_LONG, sloc, aNbexpr); + D_long(0); + } + } + // Deposit od (if not suppressed) + if ((aNexten&7)==EXT_IISPRE0 || (aNexten&7)==EXT_IISPREN + || (aNexten&7)==EXT_IISNOIN || (aNexten&7)==EXT_IISPOSN) + { + // Don't deposit anything (suppressed) + } + else if ((aNexten&7)==EXT_IISPREW + || (aNexten&7)==EXT_IISPOSW || (aNexten&7)==EXT_IISNOIW) + { + // Deposit word od + if (w) + { + // Just deposit it + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MWORD, NULL); + + if (v + 0x8000 >= 0x10000) + return error(range_error); + + D_word(v); + } + else + { + // Arrange for fixup later on + AddFixup(FU_WORD|FU_SEXT, sloc, aNexpr); + D_word(0); + } + } + else + { + // Deposit long od + if (w) + { + // Just deposit it + if (tdb) + MarkRelocatable(cursect, sloc, tdb, MLONG, NULL); + + D_long(v); + } + else + { + // Arrange for fixup later on + AddFixup(FU_LONG|FU_SEXT, sloc, aNexpr); + D_long(0); + } + } + + break; + //return error("unsupported 68020 addressing mode"); default: - interror(3); // Bad addressing mode in ea gen + // Bad addressing mode in ea gen + interror(3); } return OK; @@ -226,3 +448,9 @@ int eaNgen(WORD siz) #undef aNexpr #undef aNixreg #undef aNixsiz +#undef aNexten +#undef aNbexpr +#undef aNbdexval +#undef aNbdexattr +#undef AnESYM +