X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=amode.h;h=48d39540fa36701a7b118117af6c9758f290038e;hp=b109baedeba3cb977629207598ec164f4747719d;hb=d6e84696385fe3dd07665c50b2285659cfce9b22;hpb=05d0350b35a6a6b255cb2a3fab7796f5d4ee4d02

diff --git a/amode.h b/amode.h
index b109bae..48d3954 100644
--- a/amode.h
+++ b/amode.h
@@ -1,7 +1,7 @@
 //
 // RMAC - Reboot's Macro Assembler for all Atari computers
 // AMODE.H - Addressing Modes
-// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2020 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
@@ -37,7 +37,7 @@
 #define AM_CCR       0110
 #define AM_NONE      0111			// Nothing
 #define CACHES       0120			// Instruction/Data/Both Caches (IC/DC/BC)
-#define CREG         0121				// Control registers (see CREGlut in mach.c)
+#define CREG         0121			// Control registers (see CREGlut in mach.c)
 #define FREG         0122			// FPU registers (fp0-fp7)
 #define FPSCR        0123			// FPU system control registers (fpiar, fpsr, fpcr)
 
@@ -68,7 +68,7 @@
 #define M_CREG       0x00800000L	// Control registers
 #define M_FREG       0x01000000L	// FPn
 #define M_FPSCR      0x02000000L	// fpiar, fpsr, fpcr
-#define M_CACHE40    0x04000000L		// 68040 cache registers (IC40,DC40,BC40)
+#define M_CACHE40    0x04000000L	// 68040 cache registers (IC40,DC40,BC40)
 
 // Addr mode categories
 #define C_ALL        0x00000FFFL
@@ -77,11 +77,13 @@
 #define C_CTRL       0x000007E4L
 #define C_ALT        0x000001FFL
 #define C_ALL030     0x0003FFFFL
+#define C_ALT030     0x000071FDL
+#define C_FPU030     0x0003FFECL    /* (An), #<data>, (An)+, (d16,An), (d16,PC), (d8, An, Xn), (d8, PC, Xn), (bd, An, Xn), An(bd, PC, Xn), ([bd, An, Xn], od), An([bd, PC, Xn], od), ([bd, An], Xn, od), An([bd, PC], Xn, od) */
 #define C_CTRL030    0x0003F7E4L
 #define C_DATA030    0x0003FFFDL
 #define C_MOVES      (M_AIND | M_APOSTINC | M_APREDEC | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
 #define C_BF1        (M_DREG | M_AIND | M_AINDEXED | M_ADISP | M_ABSW | M_ABSL | M_ABASE | M_MEMPOST | M_MEMPRE)
-#define C_BF2        (C_BF1 | M_PCDISP | M_PCINDEXED | M_PCBASE | M_PCMPOST | M_PCMPRE )
+#define C_BF2        (C_BF1 | M_PCDISP | M_PCINDEXED | M_PCBASE | M_PCMPOST | M_PCMPRE)
 #define C_PMOVE      (M_AIND | M_ADISP | M_AINDEXED  | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
 
 #define C_ALTDATA    (C_DATA & C_ALT)
@@ -137,15 +139,15 @@ extern int nmodes;
 extern int am0, am1;
 extern int a0reg, a1reg, a2reg;
 extern TOKEN a0expr[], a1expr[];
-extern VALUE a0exval, a1exval;
+extern uint64_t a0exval, a1exval;
 extern WORD a0exattr, a1exattr;
 extern int a0ixreg, a1ixreg;
 extern int a0ixsiz, a1ixsiz;
 extern TOKEN a0oexpr[], a1oexpr[];
-extern VALUE a0oexval, a1oexval;
+extern uint64_t a0oexval, a1oexval;
 extern WORD a0oexattr, a1oexattr;
 extern SYM * a0esym, * a1esym;
-extern VALUE a0bexval, a1bexval;
+extern uint64_t a0bexval, a1bexval;
 extern WORD a0bexattr, a1bexattr;
 extern WORD a0bsize, a1bsize;
 extern TOKEN a0bexpr[], a1bexpr[];
@@ -155,7 +157,7 @@ extern int bfparam1;
 extern int bfparam2;
 extern int bfval1;
 extern int bfval2;
-extern VALUE bf0exval;
+extern uint64_t bf0exval;
 
 // mnattr:
 #define CGSPECIAL    0x8000			// Special (don't parse addr modes)