X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=amode.c;h=c930a9695269b2787e872b82a7ceb424e599e136;hp=2608d79793f32493ab4d0cf11dd2f8f678fda7e6;hb=HEAD;hpb=f3c7d186a15b89c39e360b9cc89545a0d24bd6a4 diff --git a/amode.c b/amode.c index 2608d79..6fd3538 100644 --- a/amode.c +++ b/amode.c @@ -1,7 +1,7 @@ // -// RMAC - Reboot's Macro Assembler for all Atari computers +// RMAC - Renamed Macro Assembler for all Atari computers // AMODE.C - Addressing Modes -// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends +// Copyright (C) 199x Landon Dyer, 2011-2021 Reboot and Friends // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986 // Source utilised with the kind permission of Landon Dyer // @@ -15,8 +15,8 @@ #include "sect.h" #include "token.h" -#define DEF_KW -#include "kwtab.h" +#define DEF_REG68 +#include "68kregs.h" #define DEF_MN #include "mntab.h" @@ -31,9 +31,6 @@ uint64_t a0exval; // Expression's value WORD a0exattr; // Expression's attribute int a0ixreg; // Index register int a0ixsiz; // Index register size (and scale) -TOKEN a0oexpr[EXPRSIZE]; // Outer displacement expression -uint64_t a0oexval; // Outer displacement value -WORD a0oexattr; // Outer displacement attribute SYM * a0esym; // External symbol involved in expr TOKEN a0bexpr[EXPRSIZE]; // Base displacement expression uint64_t a0bexval; // Base displacement value @@ -49,9 +46,6 @@ uint64_t a1exval; // Expression's value WORD a1exattr; // Expression's attribute int a1ixreg; // Index register int a1ixsiz; // Index register size (and scale) -TOKEN a1oexpr[EXPRSIZE]; // Outer displacement expression -uint64_t a1oexval; // Outer displacement value -WORD a1oexattr; // Outer displacement attribute SYM * a1esym; // External symbol involved in expr TOKEN a1bexpr[EXPRSIZE]; // Base displacement expression uint64_t a1bexval; // Base displacement value @@ -61,7 +55,6 @@ WORD a1extension; // 020+ extension address word WORD am1_030; // ea bits for 020+ addressing modes int a2reg; // Register for div.l (68020+) -WORD mulmode; // to distinguish between 32 and 64 bit multiplications (68020+) int bfparam1; // bfxxx / fmove instruction parameter 1 int bfparam2; // bfxxx / fmove instruction parameter 2 @@ -73,7 +66,7 @@ WORD bf0exattr; // Expression's attribute SYM * bf0esym; // External symbol involved in expr // Function prototypes -int check030bf(void); +int Check030Bitfield(void); // @@ -84,8 +77,8 @@ int amode(int acount) // Initialize global return values nmodes = a0reg = a1reg = 0; am0 = am1 = AM_NONE; - a0expr[0] = a0oexpr[0] = a1expr[0] = a1oexpr[0] = ENDEXPR; - a0exattr = a0oexattr = a1exattr = a1oexattr = 0; + a0expr[0] = a1expr[0] = ENDEXPR; + a0exattr = a1exattr = 0; a0esym = a1esym = NULL; a0bexpr[0] = a1bexpr[0] = ENDEXPR; a0bexval = a1bexval = 0; @@ -97,7 +90,7 @@ int amode(int acount) bf0esym = NULL; // If at EOL, then no addr modes at all - if (*tok.u32 == EOL) + if (*tok == EOL) return 0; // Parse first addressing mode @@ -106,17 +99,14 @@ int amode(int acount) #define AnREG a0reg #define AnIXREG a0ixreg #define AnIXSIZ a0ixsiz - #define AnEXPR (TOKENPTR)a0expr + #define AnEXPR a0expr #define AnEXVAL a0exval #define AnEXATTR a0exattr - #define AnOEXPR (TOKENPTR)a0oexpr - #define AnOEXVAL a0oexval - #define AnOEXATTR a0oexattr #define AnESYM a0esym #define AMn_IX0 am0_ix0 #define AMn_IXN am0_ixn #define CHK_FOR_DISPn CheckForDisp0 - #define AnBEXPR (TOKENPTR)a0bexpr + #define AnBEXPR a0bexpr #define AnBEXVAL a0bexval #define AnBEXATTR a0bexattr #define AnBZISE a0bsize @@ -132,15 +122,15 @@ int amode(int acount) // it's a bitfield instruction--check the parameters inside the {} block // for validity - if (*tok.u32 == '{') - if (check030bf() == ERROR) + if (*tok == '{') + if (Check030Bitfield() == ERROR) return ERROR; - if ((acount == 0) || (*tok.u32 != ',')) + if ((acount == 0) || (*tok != ',')) return 1; // Eat the comma - tok.u32++; + tok++; // Parse second addressing mode #define AnOK a1ok @@ -148,17 +138,14 @@ int amode(int acount) #define AnREG a1reg #define AnIXREG a1ixreg #define AnIXSIZ a1ixsiz - #define AnEXPR (TOKENPTR)a1expr + #define AnEXPR a1expr #define AnEXVAL a1exval #define AnEXATTR a1exattr - #define AnOEXPR (TOKENPTR)a1oexpr - #define AnOEXVAL a1oexval - #define AnOEXATTR a1oexattr #define AnESYM a1esym #define AMn_IX0 am1_ix0 #define AMn_IXN am1_ixn #define CHK_FOR_DISPn CheckForDisp1 - #define AnBEXPR (TOKENPTR)a1bexpr + #define AnBEXPR a1bexpr #define AnBEXVAL a1bexval #define AnBEXATTR a1bexattr #define AnBZISE a1bsize @@ -170,41 +157,32 @@ int amode(int acount) // It's a bitfield instruction--check the parameters inside the {} block // for validity - if (*tok.u32 == '{') - if (check030bf() == ERROR) + if (*tok == '{') + if (Check030Bitfield() == ERROR) return ERROR; // At this point, it is legal for 020+ to have a ':'. For example divu.l // d0,d2:d3 - if (*tok.u32 == ':') + if (*tok == ':') { if ((activecpu & (CPU_68020 | CPU_68030 | CPU_68040)) == 0) return error(unsupport); // TODO: protect this from combinations like Dx:FPx etc :) - tok.u32++; //eat the colon + tok++; //eat the colon - if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) - { - a2reg = (*tok.u32 - KW_D0); - mulmode = 1 << 10; - } - else if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) - { - a2reg = (*tok.u32 - KW_FP0); - mulmode = 1 << 10; - } + if ((*tok >= REG68_D0) && (*tok <= REG68_D7)) + a2reg = (*tok++) & 7; + else if ((*tok >= REG68_FP0) && (*tok <= REG68_FP7)) + a2reg = (*tok++) & 7; else return error("a data or FPU register must follow a :"); - - *tok.u32++; } else { // If no ':' is present then maybe we have something like divs.l d0,d1 // which sould translate to divs.l d0,d1:d1 a2reg = a1reg; - mulmode = 0; } nmodes = 2; @@ -213,9 +191,6 @@ int amode(int acount) // Error messages: badmode: return error("addressing mode syntax"); - - //unmode: - //return error("unimplemented addressing mode"); } @@ -236,17 +211,17 @@ int reglist(WORD * a_rmask) for(;;) { - if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_A7)) - r = *tok.u32++ & 0x0F; + if ((*tok >= REG68_D0) && (*tok <= REG68_A7)) + r = *tok++ & 0x0F; else break; - if (*tok.u32 == '-') + if (*tok == '-') { - tok.u32++; + tok++; - if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_A7)) - cnt = *tok.u32++ & 0x0F; + if ((*tok >= REG68_D0) && (*tok <= REG68_A7)) + cnt = *tok++ & 0x0F; else return error("register list syntax"); @@ -261,10 +236,10 @@ int reglist(WORD * a_rmask) while (cnt-- >= 0) rmask |= msktab[r++]; - if (*tok.u32 != '/') + if (*tok != '/') break; - tok.u32++; + tok++; } *a_rmask = rmask; @@ -288,17 +263,17 @@ int fpu_reglist_left(WORD * a_rmask) for(;;) { - if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) - r = *tok.u32++ & 0x07; + if ((*tok >= REG68_FP0) && (*tok <= REG68_FP7)) + r = *tok++ & 0x07; else break; - if (*tok.u32 == '-') + if (*tok == '-') { - tok.u32++; + tok++; - if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) - cnt = *tok.u32++ & 0x07; + if ((*tok >= REG68_FP0) && (*tok <= REG68_FP7)) + cnt = *tok++ & 0x07; else return error("register list syntax"); @@ -315,10 +290,10 @@ int fpu_reglist_left(WORD * a_rmask) while (cnt-- >= 0) rmask |= msktab_minus[r++]; - if (*tok.u32 != '/') + if (*tok != '/') break; - tok.u32++; + tok++; } *a_rmask = rmask; @@ -330,8 +305,8 @@ int fpu_reglist_left(WORD * a_rmask) int fpu_reglist_right(WORD * a_rmask) { static WORD msktab_plus[] = { - 0x0001, 0x0002, 0x0004, 0x0008, - 0x0010, 0x0020, 0x0040, 0x0080 + 0x0080, 0x0040, 0x0020, 0x0010, + 0x0008, 0x0004, 0x0002, 0x0001 }; WORD rmask = 0; @@ -339,17 +314,17 @@ int fpu_reglist_right(WORD * a_rmask) for(;;) { - if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) - r = *tok.u32++ & 0x07; + if ((*tok >= REG68_FP0) && (*tok <= REG68_FP7)) + r = *tok++ & 0x07; else break; - if (*tok.u32 == '-') + if (*tok == '-') { - tok.u32++; + tok++; - if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) - cnt = *tok.u32++ & 0x07; + if ((*tok >= REG68_FP0) && (*tok <= REG68_FP7)) + cnt = *tok++ & 0x07; else return error("register list syntax"); @@ -364,10 +339,10 @@ int fpu_reglist_right(WORD * a_rmask) while (cnt-- >= 0) rmask |= msktab_plus[r++]; - if (*tok.u32 != '/') + if (*tok != '/') break; - tok.u32++; + tok++; } *a_rmask = rmask; @@ -382,26 +357,24 @@ int fpu_reglist_right(WORD * a_rmask) // bfxxx {param1,param2} // param1/2 are either data registers or immediate values // -int check030bf(void) +int Check030Bitfield(void) { + PTR tp; CHECK00; - tok.u32++; + tok++; - if (*tok.u32 == CONST) + if (*tok == CONST) { - tok.u32++; -// bfval1 = (int)*(uint64_t *)tok.u32; - bfval1 = (int)*tok.u64; + tp.u32 = tok + 1; + bfval1 = (int)*tp.u64++; + tok = tp.u32; // Do=0, offset=immediate - shift it to place bfparam1 = (0 << 11); -// tok.u32++; -// tok.u32++; - tok.u64++; } - else if (*tok.u32 == SYMBOL) + else if (*tok == SYMBOL) { - if (expr((TOKENPTR)bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) + if (expr(bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) return ERROR; if (!(bf0exattr & DEFINED)) @@ -412,42 +385,39 @@ int check030bf(void) // Do=0, offset=immediate - shift it to place bfparam1 = (0 << 11); } - else if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) + else if ((*tok >= REG68_D0) && (*tok <= REG68_D7)) { // Do=1, offset=data register - shift it to place bfparam1 = (1 << 11); - bfval1 = (*(int *)tok.u32 - 128); - tok.u32++; + bfval1 = (*(int *)tok - 128); + tok++; } else return ERROR; // Eat the ':', if any - if (*tok.u32 == ':') - tok.u32++; + if (*tok == ':') + tok++; - if (*tok.u32 == '}' && tok.u32[1] == EOL) + if (*tok == '}' && tok[1] == EOL) { // It is ok to have }, EOL here - it might be "fmove fpn, {dx}" - tok.u32++; + tok++; return OK; } - if (*tok.u32 == CONST) + if (*tok == CONST) { - tok.u32++; -// bfval2 = (int)*(uint64_t *)tok.u32; - bfval2 = (int)*tok.u64; + tp.u32 = tok + 1; + bfval2 = (int)*tp.u64++; + tok = tp.u32; // Do=0, offset=immediate - shift it to place bfparam2 = (0 << 5); -// tok.u32++; -// tok.u32++; - tok.u64++; } - else if (*tok.u32 == SYMBOL) + else if (*tok == SYMBOL) { - if (expr((TOKENPTR)bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) + if (expr(bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) return ERROR; bfval2 = (int)bf0exval; @@ -458,17 +428,17 @@ int check030bf(void) // Do=0, offset=immediate - shift it to place bfparam2 = (0 << 5); } - else if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) + else if ((*tok >= REG68_D0) && (*tok <= REG68_D7)) { // Do=1, offset=data register - shift it to place - bfval2 = ((*(int *)tok.u32 - 128)); + bfval2 = (*(int *)tok - 128); bfparam2 = (1 << 5); - tok.u32++; + tok++; } else return ERROR; - tok.u32++; // Eat the '}' + tok++; // Eat the '}' return OK; }