X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?p=rmac;a=blobdiff_plain;f=amode.c;h=2608d79793f32493ab4d0cf11dd2f8f678fda7e6;hp=8a69672bb075b90184b6f983949b7763627d96f4;hb=f3c7d186a15b89c39e360b9cc89545a0d24bd6a4;hpb=5f23454f7155f0c77ea1bede3f9e60b39da99fa8 diff --git a/amode.c b/amode.c index 8a69672..2608d79 100644 --- a/amode.c +++ b/amode.c @@ -1,7 +1,7 @@ // -// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System +// RMAC - Reboot's Macro Assembler for all Atari computers // AMODE.C - Addressing Modes -// Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends +// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986 // Source utilised with the kind permission of Landon Dyer // @@ -20,22 +20,23 @@ #define DEF_MN #include "mntab.h" +extern char unsupport[]; // Address-mode information int nmodes; // Number of addr'ing modes found int am0; // Addressing mode int a0reg; // Register TOKEN a0expr[EXPRSIZE]; // Expression -VALUE a0exval; // Expression's value +uint64_t a0exval; // Expression's value WORD a0exattr; // Expression's attribute int a0ixreg; // Index register int a0ixsiz; // Index register size (and scale) TOKEN a0oexpr[EXPRSIZE]; // Outer displacement expression -VALUE a0oexval; // Outer displacement value +uint64_t a0oexval; // Outer displacement value WORD a0oexattr; // Outer displacement attribute SYM * a0esym; // External symbol involved in expr TOKEN a0bexpr[EXPRSIZE]; // Base displacement expression -VALUE a0bexval; // Base displacement value +uint64_t a0bexval; // Base displacement value WORD a0bexattr; // Base displacement attribute WORD a0bsize; // Base displacement size WORD a0extension; // 020+ extension address word @@ -44,28 +45,30 @@ WORD am0_030; // ea bits for 020+ addressing modes int am1; // Addressing mode int a1reg; // Register TOKEN a1expr[EXPRSIZE]; // Expression -VALUE a1exval; // Expression's value +uint64_t a1exval; // Expression's value WORD a1exattr; // Expression's attribute int a1ixreg; // Index register int a1ixsiz; // Index register size (and scale) TOKEN a1oexpr[EXPRSIZE]; // Outer displacement expression -VALUE a1oexval; // Outer displacement value +uint64_t a1oexval; // Outer displacement value WORD a1oexattr; // Outer displacement attribute SYM * a1esym; // External symbol involved in expr TOKEN a1bexpr[EXPRSIZE]; // Base displacement expression -VALUE a1bexval; // Base displacement value +uint64_t a1bexval; // Base displacement value WORD a1bexattr; // Base displacement attribute WORD a1bsize; // Base displacement size WORD a1extension; // 020+ extension address word WORD am1_030; // ea bits for 020+ addressing modes int a2reg; // Register for div.l (68020+) -WORD mulmode; // To distinguish between 32 and 64 bit multiplications (68020+) +WORD mulmode; // to distinguish between 32 and 64 bit multiplications (68020+) -int bfparam1; // bfxxx instruction parameter 1 -int bfparam2; // bfxxx instruction parameter 2 +int bfparam1; // bfxxx / fmove instruction parameter 1 +int bfparam2; // bfxxx / fmove instruction parameter 2 +int bfval1; // bfxxx / fmove value 1 +int bfval2; // bfxxx / fmove value 2 TOKEN bf0expr[EXPRSIZE]; // Expression -VALUE bf0exval; // Expression's value +uint64_t bf0exval; // Expression's value WORD bf0exattr; // Expression's attribute SYM * bf0esym; // External symbol involved in expr @@ -85,7 +88,8 @@ int amode(int acount) a0exattr = a0oexattr = a1exattr = a1oexattr = 0; a0esym = a1esym = NULL; a0bexpr[0] = a1bexpr[0] = ENDEXPR; - a0bexval = a0bsize = a0extension = a1bexval = a1bsize = a1extension = 0; + a0bexval = a1bexval = 0; + a0bsize = a0extension = a1bsize = a1extension = 0; am0_030 = am1_030 = 0; bfparam1 = bfparam2 = 0; bf0expr[0] = ENDEXPR; @@ -93,7 +97,7 @@ int amode(int acount) bf0esym = NULL; // If at EOL, then no addr modes at all - if (*tok == EOL) + if (*tok.u32 == EOL) return 0; // Parse first addressing mode @@ -102,17 +106,17 @@ int amode(int acount) #define AnREG a0reg #define AnIXREG a0ixreg #define AnIXSIZ a0ixsiz - #define AnEXPR a0expr + #define AnEXPR (TOKENPTR)a0expr #define AnEXVAL a0exval #define AnEXATTR a0exattr - #define AnOEXPR a0oexpr + #define AnOEXPR (TOKENPTR)a0oexpr #define AnOEXVAL a0oexval #define AnOEXATTR a0oexattr #define AnESYM a0esym #define AMn_IX0 am0_ix0 #define AMn_IXN am0_ixn #define CHK_FOR_DISPn CheckForDisp0 - #define AnBEXPR a0bexpr + #define AnBEXPR (TOKENPTR)a0bexpr #define AnBEXVAL a0bexval #define AnBEXATTR a0bexattr #define AnBZISE a0bsize @@ -128,14 +132,15 @@ int amode(int acount) // it's a bitfield instruction--check the parameters inside the {} block // for validity - if ((*tok == '{') && (check030bf() == ERROR)) - return ERROR; + if (*tok.u32 == '{') + if (check030bf() == ERROR) + return ERROR; - if ((acount == 0) || (*tok != ',')) + if ((acount == 0) || (*tok.u32 != ',')) return 1; // Eat the comma - tok++; + tok.u32++; // Parse second addressing mode #define AnOK a1ok @@ -143,17 +148,17 @@ int amode(int acount) #define AnREG a1reg #define AnIXREG a1ixreg #define AnIXSIZ a1ixsiz - #define AnEXPR a1expr + #define AnEXPR (TOKENPTR)a1expr #define AnEXVAL a1exval #define AnEXATTR a1exattr - #define AnOEXPR a1oexpr + #define AnOEXPR (TOKENPTR)a1oexpr #define AnOEXVAL a1oexval #define AnOEXATTR a1oexattr #define AnESYM a1esym #define AMn_IX0 am1_ix0 #define AMn_IXN am1_ixn #define CHK_FOR_DISPn CheckForDisp1 - #define AnBEXPR a1bexpr + #define AnBEXPR (TOKENPTR)a1bexpr #define AnBEXVAL a1bexval #define AnBEXATTR a1bexattr #define AnBZISE a1bsize @@ -165,33 +170,34 @@ int amode(int acount) // It's a bitfield instruction--check the parameters inside the {} block // for validity - if ((*tok == '{') && (check030bf() == ERROR)) + if (*tok.u32 == '{') + if (check030bf() == ERROR) return ERROR; // At this point, it is legal for 020+ to have a ':'. For example divu.l // d0,d2:d3 - if (*tok == ':') + if (*tok.u32 == ':') { if ((activecpu & (CPU_68020 | CPU_68030 | CPU_68040)) == 0) return error(unsupport); // TODO: protect this from combinations like Dx:FPx etc :) - tok++; //eat the colon + tok.u32++; //eat the colon - if ((*tok >= KW_D0) && (*tok <= KW_D7)) + if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) { - a2reg = (*tok - KW_D0); + a2reg = (*tok.u32 - KW_D0); mulmode = 1 << 10; } - else if ((*tok >= KW_FP0) && (*tok <= KW_FP7)) + else if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) { - a2reg = (*tok - KW_FP0); + a2reg = (*tok.u32 - KW_FP0); mulmode = 1 << 10; } else return error("a data or FPU register must follow a :"); - *tok++; + *tok.u32++; } else { @@ -230,17 +236,17 @@ int reglist(WORD * a_rmask) for(;;) { - if ((*tok >= KW_D0) && (*tok <= KW_A7)) - r = *tok++ & 0x0F; + if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_A7)) + r = *tok.u32++ & 0x0F; else break; - if (*tok == '-') + if (*tok.u32 == '-') { - tok++; + tok.u32++; - if ((*tok >= KW_D0) && (*tok <= KW_A7)) - cnt = *tok++ & 0x0F; + if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_A7)) + cnt = *tok.u32++ & 0x0F; else return error("register list syntax"); @@ -255,10 +261,10 @@ int reglist(WORD * a_rmask) while (cnt-- >= 0) rmask |= msktab[r++]; - if (*tok != '/') + if (*tok.u32 != '/') break; - tok++; + tok.u32++; } *a_rmask = rmask; @@ -282,17 +288,17 @@ int fpu_reglist_left(WORD * a_rmask) for(;;) { - if ((*tok >= KW_FP0) && (*tok <= KW_FP7)) - r = *tok++ & 0x07; + if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) + r = *tok.u32++ & 0x07; else break; - if (*tok == '-') + if (*tok.u32 == '-') { - tok++; + tok.u32++; - if ((*tok >= KW_FP0) && (*tok <= KW_FP7)) - cnt = *tok++ & 0x07; + if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) + cnt = *tok.u32++ & 0x07; else return error("register list syntax"); @@ -304,13 +310,15 @@ int fpu_reglist_left(WORD * a_rmask) else cnt = 0; + r = 0; + while (cnt-- >= 0) rmask |= msktab_minus[r++]; - if (*tok != '/') + if (*tok.u32 != '/') break; - tok++; + tok.u32++; } *a_rmask = rmask; @@ -331,17 +339,17 @@ int fpu_reglist_right(WORD * a_rmask) for(;;) { - if ((*tok >= KW_FP0) && (*tok <= KW_FP7)) - r = *tok++ & 0x07; + if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) + r = *tok.u32++ & 0x07; else break; - if (*tok == '-') + if (*tok.u32 == '-') { - tok++; + tok.u32++; - if ((*tok >= KW_FP0) && (*tok <= KW_FP7)) - cnt = *tok++ & 0x07; + if ((*tok.u32 >= KW_FP0) && (*tok.u32 <= KW_FP7)) + cnt = *tok.u32++ & 0x07; else return error("register list syntax"); @@ -356,10 +364,10 @@ int fpu_reglist_right(WORD * a_rmask) while (cnt-- >= 0) rmask |= msktab_plus[r++]; - if (*tok != '/') + if (*tok.u32 != '/') break; - tok++; + tok.u32++; } *a_rmask = rmask; @@ -376,92 +384,91 @@ int fpu_reglist_right(WORD * a_rmask) // int check030bf(void) { - WARNING(Add more strict checks as well as checks for non defined (yet) labels) - - if ((activecpu & (CPU_68020 | CPU_68030 | CPU_68040)) == 0) - return error(unsupport); + CHECK00; + tok.u32++; - tok++; - - if (*tok == CONST) + if (*tok.u32 == CONST) { - tok++; - bfparam1 = *(int *)tok; - - if ((bfparam1 > 31) || (bfparam1 < 0)) - return error("bfxxx offset: immediate value must be between 0 and 31"); + tok.u32++; +// bfval1 = (int)*(uint64_t *)tok.u32; + bfval1 = (int)*tok.u64; // Do=0, offset=immediate - shift it to place - bfparam1 = (bfparam1 << 6) | (0 << 11); - tok++; + bfparam1 = (0 << 11); +// tok.u32++; +// tok.u32++; + tok.u64++; } - else if (*tok == SYMBOL) + else if (*tok.u32 == SYMBOL) { - if (expr(bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) + if (expr((TOKENPTR)bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) return ERROR; - bfparam1 = bf0exval; + if (!(bf0exattr & DEFINED)) + return error("bfxxx offset: immediate value must evaluate"); - if ((bfparam1 > 31) || (bfparam1 < 0)) - return error("bfxxx offset: immediate value must be between 0 and 31"); + bfval1 = (int)bf0exval; // Do=0, offset=immediate - shift it to place - bfparam1 = (bfparam1 << 6) | (0 << 11); + bfparam1 = (0 << 11); } - else if ((*tok >= KW_D0) && (*tok <= KW_D7)) + else if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) { // Do=1, offset=data register - shift it to place - bfparam1 = ((*(int *)tok - 128) << 6) | (1 << 11); - tok++; + bfparam1 = (1 << 11); + bfval1 = (*(int *)tok.u32 - 128); + tok.u32++; } else return ERROR; - if (*tok==':') - tok++; //eat the ':' + // Eat the ':', if any + if (*tok.u32 == ':') + tok.u32++; - if (*tok == '}' && tok[1] == EOL) + if (*tok.u32 == '}' && tok.u32[1] == EOL) { // It is ok to have }, EOL here - it might be "fmove fpn, {dx}" - tok++; + tok.u32++; return OK; } - if (*tok == CONST) + if (*tok.u32 == CONST) { - tok++; - bfparam2 = *(int *)tok; - - if (bfparam2 > 31 || bfparam2 < 0) - return error("bfxxx width: immediate value must be between 0 and 31"); + tok.u32++; +// bfval2 = (int)*(uint64_t *)tok.u32; + bfval2 = (int)*tok.u64; // Do=0, offset=immediate - shift it to place - bfparam2 = (bfparam2 << 0) | (0 << 5); - tok++; + bfparam2 = (0 << 5); +// tok.u32++; +// tok.u32++; + tok.u64++; } - else if (*tok == SYMBOL) + else if (*tok.u32 == SYMBOL) { - if (expr(bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) + if (expr((TOKENPTR)bf0expr, &bf0exval, &bf0exattr, &bf0esym) != OK) return ERROR; - bfparam2 = bf0exval; + bfval2 = (int)bf0exval; - if (bfparam2 > 31 || bfparam2 < 0) - return error("bfxxx width: immediate value must be between 0 and 31"); + if (!(bf0exattr & DEFINED)) + return error("bfxxx width: immediate value must evaluate"); // Do=0, offset=immediate - shift it to place - bfparam2 = (bfparam2 << 0) | (0 << 5); + bfparam2 = (0 << 5); } - else if ((*tok >= KW_D0) && (*tok <= KW_D7)) + else if ((*tok.u32 >= KW_D0) && (*tok.u32 <= KW_D7)) { // Do=1, offset=data register - shift it to place - bfparam2 = ((*(int *)tok - 128) << 0) | (1 << 5); - tok++; + bfval2 = ((*(int *)tok.u32 - 128)); + bfparam2 = (1 << 5); + tok.u32++; } else return ERROR; - tok++; // Eat the '}' + tok.u32++; // Eat the '}' return OK; }