- *chptr++=(uint8_t)(w); \
- sloc += 2; ch_size += 2; if(orgactive) orgaddr += 2;}
-#define D_long(lw) {*chptr++=(uint8_t)((lw)>>24); \
- *chptr++=(uint8_t)((lw)>>16);\
- *chptr++=(uint8_t)((lw)>>8); \
- *chptr++=(uint8_t)(lw); \
- sloc += 4; ch_size += 4; if(orgactive) orgaddr += 4;}
-#define D_quad(qw) {*chptr++=(uint8_t)((qw)>>56); \
- *chptr++=(uint8_t)((qw)>>48);\
- *chptr++=(uint8_t)((qw)>>40);\
- *chptr++=(uint8_t)((qw)>>32);\
- *chptr++=(uint8_t)((qw)>>24);\
- *chptr++=(uint8_t)((qw)>>16);\
- *chptr++=(uint8_t)((qw)>>8); \
- *chptr++=(uint8_t)(qw); \
- sloc += 8; ch_size += 8; if(orgactive) orgaddr += 8;}
-#define D_rword(w) {*chptr++=(uint8_t)(w); *chptr++=(uint8_t)((w)>>8); \
- sloc+=2; ch_size+=2;if(orgactive) orgaddr += 2;}
+ *chptr++=(uint8_t)(w); \
+ sloc += 2; ch_size += 2; if(orgactive) orgaddr += 2;}
+#define D_long(lw) {chcheck(4);*chptr++=(uint8_t)((lw)>>24); \
+ *chptr++=(uint8_t)((lw)>>16);\
+ *chptr++=(uint8_t)((lw)>>8); \
+ *chptr++=(uint8_t)(lw); \
+ sloc += 4; ch_size += 4; if(orgactive) orgaddr += 4;}
+#define D_quad(qw) {chcheck(8);*chptr++=(uint8_t)((qw)>>56); \
+ *chptr++=(uint8_t)((qw)>>48);\
+ *chptr++=(uint8_t)((qw)>>40);\
+ *chptr++=(uint8_t)((qw)>>32);\
+ *chptr++=(uint8_t)((qw)>>24);\
+ *chptr++=(uint8_t)((qw)>>16);\
+ *chptr++=(uint8_t)((qw)>>8); \
+ *chptr++=(uint8_t)(qw); \
+ sloc += 8; ch_size += 8; if(orgactive) orgaddr += 8;}
+
+// D_rword deposits a "6502" format (low, high) word (01).
+#define D_rword(w) {chcheck(2);*chptr++=(uint8_t)(w); \
+ *chptr++=(uint8_t)((w)>>8); \
+ sloc+=2; ch_size+=2;if(orgactive) orgaddr += 2;}
+
+// Macro for the 56001. Word size on this device is 24 bits wide. I hope that
+// orgaddr += 1 means that the addresses in the device reflect this. [A: Yes.]
+#define D_dsp(w) {chcheck(3);*chptr++=(uint8_t)(w>>16); \
+ *chptr++=(uint8_t)(w>>8); *chptr++=(uint8_t)w; \
+ sloc+=1; ch_size += 3; if(orgactive) orgaddr += 1; \
+ dsp_written_data_in_current_org=1;}
+