Add support for 64-bit evaluations.

[rmac] / riscasm.c

diff --git a/riscasm.c b/riscasm.c
index 2c291ffe9daad4b687f938dc35509312c044771b..63466716173eef8ae94f8a348d3dd8981e6d479b 100644 (file)
--- a/riscasm.c
+++ b/riscasm.c
@@ -1,19 +1,20 @@
 //
-// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
+// RMAC - Reboot's Macro Assembler for all Atari computers
 // RISCA.C - GPU/DSP Assembler
-// Copyright (C) 199x Landon Dyer, 2011 - 2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
 
 #include "riscasm.h"
+#include "amode.h"
+#include "direct.h"
 #include "error.h"
-#include "sect.h"
-#include "token.h"
 #include "expr.h"
-#include "direct.h"
 #include "mark.h"
-#include "amode.h"
+#include "procln.h"
+#include "sect.h"
+#include "token.h"
 
 #define DEF_MR                         // Declare keyword values
 #include "risckw.h"                    // Incl. generated risc keywords
@@ -23,7 +24,7 @@
 
 
 unsigned altbankok = 0;                // Ok to use alternate register bank
-unsigned orgactive = 0;                // RISC org directive active
+unsigned orgactive = 0;                // RISC/6502 org directive active
 unsigned orgaddr = 0;          // Org'd address
 unsigned orgwarning = 0;       // Has an ORG warning been issued
 int lastOpcode = -1;           // Last RISC opcode assembled
@@ -126,38 +127,30 @@ void strtoupper(char * s)
 //
 static inline int MalformedOpcode(int signal)
 {
-       char buf[16];
-       sprintf(buf, "%02X", signal);
-       return errors("Malformed opcode [internal $%s]", buf);
+       return error("Malformed opcode [internal $%02X]", signal);
 }
 
+
 //
 // Function to return "Illegal Indexed Register" error
 // Anyone trying to index something other than R14 or R15
 //
 static inline int IllegalIndexedRegister(int reg)
 {
-    char buf[16];
-    sprintf(buf, "%d", reg - KW_R0);
-    return errors("Attempted index reference with non-indexable register (r%s)", buf);
+       return error("Attempted index reference with non-indexable register (r%d)", reg - KW_R0);
 }
 
+
 //
 // Function to return "Illegal Indexed Register" error for EQUR scenarios
 // Trying to use register value within EQUR that isn't 14 or 15
 //
-static inline int IllegalIndexedRegisterEqur(SYM *sy)
+static inline int IllegalIndexedRegisterEqur(SYM * sy)
 {
-    //char buf[160];
-    char *buf = NULL;
-    buf = (char *)malloc((strlen(sy->sname) + 7) * sizeof(char));
-    if (NULL != buf) {
-        sprintf(buf, "%s = r%d",sy->sname, sy->svalue);
-        return errors("Attempted index reference with non-indexable register within EQUR (%s)", buf);
-    }
-    return errors("Unable to allocate memory! (IllegalIndexRegisterEqur)", "OOPS");
+       return error("Attempted index reference with non-indexable register within EQUR (%s = r%d)", sy->sname, sy->svalue);
 }
 
+
 //
 // Build RISC instruction word
 //
@@ -181,7 +174,7 @@ void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2)
 //
 int GetRegister(WORD rattr)
 {
-       VALUE eval;                                     // Expression value
+       uint64_t eval;                          // Expression value
        WORD eattr;                                     // Expression attributes
        SYM * esym;                                     // External symbol involved in expr.
        TOKEN r_expr[EXPRSIZE];         // Expression token list
@@ -224,7 +217,7 @@ int GenerateRISCCode(int state)
        WORD attrflg;
        int indexed;                            // Indexed register flag
 
-       VALUE eval;                                     // Expression value
+       uint64_t eval;                          // Expression value
        WORD eattr;                                     // Expression attributes
        SYM * esym;                                     // External symbol involved in expr.
        TOKEN r_expr[EXPRSIZE];         // Expression token list
@@ -729,7 +722,8 @@ int GenerateRISCCode(int state)
                        {
                                // CC using a constant number
                                tok++;
-                               val = *tok;
+                               tok++;          // Toss hi LONG, as most likely not 64-bit number
+                               val = *tok;     // Use lo LONG
                                tok++;
                                CHECK_COMMA;
                        }
@@ -757,9 +751,7 @@ int GenerateRISCCode(int state)
                                        ccsym = lookup(string[tok[1]], LABEL, 0);
 
                                        if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
-                                       {
                                                val = ccsym->svalue;
-                                       }
                                        else
                                                return error("unknown condition code");
                                }
@@ -804,7 +796,7 @@ int GenerateRISCCode(int state)
                                reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
 
                                if ((reg2 < -16) || (reg2 > 15))
-                                       error("PC relative overflow");
+                                       error("PC relative overflow (outside of -16 to 15)");
                        }
 
                        BuildRISCIntructionWord(parm, reg2, reg1);