.equr overhaul part 1: remove gpu/dsp only restriction, make sure things still work...

[rmac] / riscasm.c

diff --git a/riscasm.c b/riscasm.c
index 5681f354e5a1d480d7a97783a9f9f138e663d058..fb6c5ce18781e6ec5cb1ccc9ba90b88473244a3b 100644 (file)
--- a/riscasm.c
+++ b/riscasm.c
@@ -231,8 +231,8 @@ static int EvaluateRegisterFromTokenStream(uint32_t fixup)
        }
 
        // If we got a register in range (0-31), return it
-       if (eval <= 31)
-               return (int)eval;
+       if (eattr & RISCREG)
+               return (int)eval - KW_R0;
 
        // Otherwise, it's out of range & we flag an error
        return error(reg_err);
@@ -474,8 +474,8 @@ int GenerateRISCCode(int state)
                        {
                                if ((tok[2] == '+') || (tok[2] == '-'))
                                {
-                                       if ((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) {
-                                               indexed = (sy->svalue & 0x1F);
+                                       if ((sy->svalue - KW_R0) == 14 || (sy->svalue - KW_R0) == 15) {
+                                               indexed = (sy->svalue - KW_R0);
                                                tok++;
                                        }
                                        else
@@ -590,10 +590,10 @@ int GenerateRISCCode(int state)
 
                        if (sy->sattre & EQUATEDREG)
                        {
-                               if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
+                               if (((sy->svalue - KW_R0) == 14 || (sy->svalue - KW_R0) == 15)
                                        && (tok[2] != ')'))
                                {
-                                       indexed = (sy->svalue & 0x1F);
+                                       indexed = (sy->svalue - KW_R0);
                                        tok++;
                                }
                        }