//
-// RMAC - Reboot's Macro Assembler for all Atari computers
+// RMAC - Renamed Macro Assembler for all Atari computers
// PROCLN.C - Line Processing
-// Copyright (C) 199x Landon Dyer, 2011-2018 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2022 Reboot and Friends
// RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
// Source utilised with the kind permission of Landon Dyer
//
#include "6502.h"
#include "amode.h"
#include "direct.h"
+#include "dsp56k_amode.h"
+#include "dsp56k_mach.h"
#include "error.h"
#include "expr.h"
#include "listing.h"
#define DEF_MN // Incl 68k keyword definitions
#define DECL_MN // Incl 68k keyword state machine tables
#include "mntab.h"
+#define DEF_REG68 // Incl 68k register definitions
+#include "68kregs.h"
#define DEF_MR
#define DECL_MR
#define DECL_MO // Include OP keyword state machine tables
#include "opkw.h"
+#define DEF_DSP // Include DSP56K keywords definitions
+#define DECL_DSP // Include DSP56K keyword state machine tables
+#include "dsp56kkw.h"
+#define DEF_REG56 // Include DSP56K register definitions
+#include "56kregs.h"
+
IFENT * ifent; // Current ifent
static IFENT ifent0; // Root ifent
IFENT * f_ifent; // Freelist of ifents
int just_bss; // 1, ds.b in microprocessor mode
uint32_t pcloc; // Value of "PC" at beginning of line
SYM * lab_sym; // Label on line (or NULL)
+char * label_defined; // The name of the last label defined in current line (if any)
const char extra_stuff[] = "extra (unexpected) text found after addressing mode";
const char comma_error[] = "missing comma";
M_FPSCR // 0123
}; // 0123 length
-
// Function prototypes
int HandleLabel(char *, int);
-
//
// Initialize line processor
//
ifent0.if_state = 0;
}
-
//
// Line processor
//
char * opname = NULL; // Name of dirctve/mnemonic/macro
int listflag; // 0: Don't call listeol()
WORD rmask; // Register list, for REG
- int registerbank; // RISC register bank
- int riscreg; // RISC register
+ int equreg; // RISC register
listflag = 0; // Initialise listing flag
loop: // Line processing loop label
state = -3; // No keyword (just EOL)
label = NULL; // No label
+ label_defined = NULL; // No label defined yet
lab_sym = NULL; // No (exported) label
equate = NULL; // No equate
tk = tok; // Save first token in line
// First token MUST be a symbol (Shamus: not sure why :-/)
if (*tok != SYMBOL)
{
- if ((*tok >= KW_D0) && (*tok <= KW_R31))
- error("cannot use reserved keyword as label name or .equ");
- else
- error("syntax error; expected symbol");
+ error("syntax error; expected symbol");
goto loop;
}
// Skip past label (but record it)
if (j == ':' || j == DCOLON)
{
-as68label:
label = string[tok[1]]; // Get label name
labtyp = tok[2]; // Get label type
tok += 3; // Go to next line token
-
- // AS68 MODE:
- // Looks like another label follows the previous one, so handle
- // the previous one until there aren't any more
- if (as68_flag && (*tok == SYMBOL && tok[2] == ':'))
- {
- if (HandleLabel(label, labtyp) != 0)
- goto loop;
-
- goto as68label;
- }
}
// EOL is legal here...
{
if (HandleLabel(label, labtyp) != 0)
goto loop;
+
+ label_defined = label;
}
HandleRept();
corresponding register bool to true. Whenever it's undef'ed, set it to false.
When checking to see if it's already been equated, issue a warning.
*/
- // Check that we are in a RISC section
- if (!rgpu && !rdsp)
- {
- error(".equr/.regequ must be defined in .gpu/.dsp section");
- goto loop;
- }
// Check for register to equate to
- if ((*tok >= KW_R0) && (*tok <= KW_R31))
+ // This check will change once we split the registers per architecture into their own tables
+ // and out of kw.tab. But for now it'll do...
+ if ((*tok >= REG68_D0) && (*tok <= REG56_BA))
{
-// sy->sattre = EQUATEDREG | RISCSYM; // Mark as equated register
- sy->sattre = EQUATEDREG; // Mark as equated register
- riscreg = (*tok - KW_R0);
-//is there any reason to do this, since we're putting this in svalue?
-//i'm thinking, no. Let's test that out! :-D
-// sy->sattre |= (riscreg << 8); // Store register number
-//everything seems to build fine without it... We'll leave it here Just In Case(tm)
-
-#define DEBODGE_REGBANK
-#ifdef DEBODGE_REGBANK
- // Default is current state of "regbank"
- registerbank = regbank;
-#else
- // Default is no register bank specified
- registerbank = BANK_N;
-#endif
-
- // Check for ",<bank #>" override notation
- if ((tok[1] == ',') && (tok[2] == CONST))
+ sy->sattre = EQUATEDREG; // Mark as equated register
+ equreg = *tok;
+ // Check for ",<bank #>" override notation and skip past it.
+ // It is ignored now. Was that ever useful anyway?
+ if ((rgpu ||rdsp) && (tok[1] == ',') && (tok[2] == CONST))
{
- // Advance token pointer to the constant
- tok += 3;
-
- // Anything other than a 0 or a 1 will result in "No Bank"
- if (*(uint64_t *)tok == 0)
- registerbank = BANK_0;
- else if (*(uint64_t *)tok == 1)
- registerbank = BANK_1;
+ // Advance token pointer and skip everything
+ tok += 4;
}
-#ifdef DEBODGE_REGBANK
- sy->sattre |= registerbank; // Store register bank
-#else
-// What needs to happen here is to prime registerbank with regbank, then use
-// registerbank down below for the bank marking.
-#warning "!!! regbank <-> registerbank confusion here !!!"
-// The question here is why, if we're allowed to override the ".regbankN" rules
-// above, then why is it using the one set by the directive in the extended
-// attributes and not in what ends up in symbol->svalue?
-// ".regbankN" is not an original Madmac directive, so it's suspect
- sy->sattre |= regbank; // Store register bank
-#endif
eattr = ABS | DEFINED | GLOBAL;
- eval = riscreg;
+ eval = equreg;
tok++;
}
// Checking for a register symbol
// Make sure symbol is a valid equreg
if (!sy2 || !(sy2->sattre & EQUATEDREG))
{
- error("invalid GPU/DSP .equr/.regequ definition");
+ error("invalid .equr/.regequ definition");
goto loop;
}
else
{
- eattr = ABS | DEFINED | GLOBAL; // Copy symbols attributes
+ eattr = ABS | DEFINED | GLOBAL; // Copy symbol's attributes
sy->sattre = sy2->sattre;
eval = (sy2->svalue & 0xFFFFF0FF);
tok += 2;
}
else
{
- error("invalid GPU/DSP .equr/.regequ definition");
+ error("invalid .equr/.regequ definition");
goto loop;
}
}
if (list_flag) // Put value in listing
listvalue((uint32_t)eval);
- at_eol(); // Must be at EOL now
+ ErrorIfNotAtEOL(); // Must be at EOL now
goto loop;
}
// Non-zero == error occurred
if (HandleLabel(label, labtyp) != 0)
goto loop;
+
+ label_defined = label;
}
// Punt on EOL
}
}
+ // If we are in 56K mode and still in need of a mnemonic then search for one
+ if (dsp56001 && ((state < 0) || (state >= 1000)))
+ {
+ for(state=0, p=opname; state>=0;)
+ {
+ j = dspbase[state] + (int)tolowertab[*p];
+
+ // Reject, character doesn't match
+ if (dspcheck[j] != state)
+ {
+ state = -1; // No match
+ break;
+ }
+
+ // Must accept or reject at EOS
+ if (!*++p)
+ {
+ state = dspaccept[j]; // (-1 on no terminal match)
+ break;
+ }
+
+ state = dsptab[j];
+ }
+
+ // Call DSP code generator if we found a mnemonic
+ if (state >= 2000)
+ {
+ LONG parcode;
+ int operands;
+ MNTABDSP * md = &dsp56k_machtab[state - 2000];
+ deposit_extra_ea = 0; // Assume no extra word needed
+
+ if (md->mnfunc == dsp_mult)
+ {
+ // Special case for multiplication instructions: they require
+ // 3 operands
+ if ((operands = dsp_amode(3)) == ERROR)
+ goto loop;
+ }
+ else if ((md->mnattr & PARMOVE) && md->mn0 != M_AM_NONE)
+ {
+ if (dsp_amode(2) == ERROR)
+ goto loop;
+ }
+ else if ((md->mnattr & PARMOVE) && md->mn0 == M_AM_NONE)
+ {
+ // Instructions that have parallel moves but use no operands
+ // (probably only move). In this case, don't parse addressing
+ // modes--just go straight to parallel parse
+ dsp_am0 = dsp_am1 = M_AM_NONE;
+ }
+ else
+ {
+ // Non parallel move instructions can have up to 4 parameters
+ // (well, only tcc instructions really)
+ if ((operands = dsp_amode(4)) == ERROR)
+ goto loop;
+
+ if (operands == 4)
+ {
+ dsp_tcc4(md->mninst);
+ goto loop;
+ }
+ }
+
+ if (md->mnattr & PARMOVE)
+ {
+ // Check for parallel moves
+ if ((parcode = parmoves(dsp_a1reg)) == ERROR)
+ goto loop;
+ }
+ else
+ {
+ if (*tok != EOL)
+ error("parallel moves not allowed with this instruction");
+
+ parcode = 0;
+ }
+
+ while ((dsp_am0 & md->mn0) == 0 || (dsp_am1 & md->mn1) == 0)
+ md = &dsp56k_machtab[md->mncont];
+
+ GENLINENOSYM();
+ (*md->mnfunc)(md->mninst | (parcode << 8));
+ goto loop;
+ }
+ }
+
// Invoke macro or complain about bad mnemonic
if (state < 0)
{
// Call special-mode handler
if (m->mnattr & CGSPECIAL)
{
+ GENLINENOSYM();
(*m->mnfunc)(m->mninst, siz);
goto loop;
}
if (amode(1) < 0) // Parse 0, 1 or 2 addr modes
goto loop;
- if (*tok != EOL)
- error(extra_stuff);
+ // Check that we're at EOL
+ // The only exception is ptestr/ptestw instructions
+ // that have 3 or 4 operands and are not handled by
+ // amode(). (yes, we're taking a performance hit here sadly)
+ if (m->mnfunc != m_ptestr && m->mnfunc != m_ptestw)
+ if (*tok != EOL)
+ error(extra_stuff);
amsk0 = amsktab[am0];
amsk1 = amsktab[am1];
// Keep a backup of chptr (used for optimisations during codegen)
chptr_opcode = chptr;
- for(;;)
- {
- if ((m->mnattr & siz) && (amsk0 & m->mn0) != 0 && (amsk1 & m->mn1) != 0)
- {
- (*m->mnfunc)(m->mninst, siz);
- goto loop;
- }
-
+ while (!(m->mnattr & siz) || (amsk0 & m->mn0) == 0 || (amsk1 & m->mn1) == 0)
m = &machtab[m->mncont];
- }
-}
+ DEBUG { printf(" 68K: mninst=$%X, siz=$%X, mnattr=$%X, amsk0=$%X, mn0=$%X, amsk1=$%X, mn1=$%X\n", m->mninst, siz, m->mnattr, amsk0, m->mn0, amsk1, m->mn1); }
+
+ GENLINENOSYM();
+ (*m->mnfunc)(m->mninst, siz);
+ goto loop;
+}
//
// Handle the creation of labels
return 0;
}
-
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