//
-// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
+// RMAC - Renamed Macro Assembler for all Atari computers
// PROCLN.C - Line Processing
-// Copyright (C) 199x Landon Dyer, 2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2022 Reboot and Friends
// RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
// Source utilised with the kind permission of Landon Dyer
//
#include "procln.h"
-#include "listing.h"
+#include "6502.h"
#include "amode.h"
+#include "direct.h"
+#include "dsp56k_amode.h"
+#include "dsp56k_mach.h"
#include "error.h"
-#include "sect.h"
#include "expr.h"
+#include "listing.h"
#include "mach.h"
-#include "direct.h"
#include "macro.h"
-#include "symbol.h"
+#include "op.h"
#include "riscasm.h"
+#include "sect.h"
+#include "symbol.h"
#define DEF_KW // Declare keyword values
#include "kwtab.h" // Incl generated keyword tables & defs
#define DEF_MN // Incl 68k keyword definitions
#define DECL_MN // Incl 68k keyword state machine tables
#include "mntab.h"
+#define DEF_REG68 // Incl 68k register definitions
+#include "68kregs.h"
#define DEF_MR
#define DECL_MR
#include "risckw.h"
-#define DEF_MP /* include 6502 keyword definitions */
-#define DECL_MP /* include 6502 keyword state machine tables */
-#include "6502.h"
-extern int m6502; /* 1, assembler in .6502 mode */
-extern VOID m6502cg(); /* 6502 code generator */
-extern VOID m6502obj(int ofd);
+#define DEF_MP // Include 6502 keyword definitions
+#define DECL_MP // Include 6502 keyword state machine tables
+#include "6502kw.h"
+
+#define DEF_MO // Include OP keyword definitions
+#define DECL_MO // Include OP keyword state machine tables
+#include "opkw.h"
+
+#define DEF_DSP // Include DSP56K keywords definitions
+#define DECL_DSP // Include DSP56K keyword state machine tables
+#include "dsp56kkw.h"
+#define DEF_REG56 // Include DSP56K register definitions
+#include "56kregs.h"
IFENT * ifent; // Current ifent
static IFENT ifent0; // Root ifent
-static IFENT * f_ifent; // Freelist of ifents
-static int disabled; // Assembly conditionally disabled
+IFENT * f_ifent; // Freelist of ifents
+int disabled; // Assembly conditionally disabled
int just_bss; // 1, ds.b in microprocessor mode
-VALUE pcloc; // Value of "PC" at beginning of line
+uint32_t pcloc; // Value of "PC" at beginning of line
SYM * lab_sym; // Label on line (or NULL)
+char * label_defined; // The name of the last label defined in current line (if any)
const char extra_stuff[] = "extra (unexpected) text found after addressing mode";
const char comma_error[] = "missing comma";
const char lab_ignored[] = "label ignored";
// Table to convert an addressing-mode number to a bitmask.
-LONG amsktab[0112] = {
+LONG amsktab[0124] = {
M_DREG, M_DREG, M_DREG, M_DREG,
M_DREG, M_DREG, M_DREG, M_DREG,
M_AINDEXED, M_AINDEXED, M_AINDEXED, M_AINDEXED,
M_AINDEXED, M_AINDEXED, M_AINDEXED, M_AINDEXED,
- M_ABSW, // 070
- M_ABSL, // 071
- M_PCDISP, // 072
- M_PCINDEXED, // 073
- M_IMMED, // 074
- 0L, // 075
- 0L, // 076
- 0L, // 077
- M_ABASE, // 0100
- M_MEMPOST, // 0101
- M_MEMPRE, // 0102
- M_PCBASE, // 0103
- M_PCMPOST, // 0104
- M_PCMPRE, // 0105
- M_AM_USP, // 0106
- M_AM_SR, // 0107
- M_AM_CCR, // 0110
- M_AM_NONE // 0111
-}; // 0112 length
-
+ M_ABSW, // 070
+ M_ABSL, // 071
+ M_PCDISP, // 072
+ M_PCINDEXED, // 073
+ M_IMMED, // 074
+ 0L, // 075
+ 0L, // 076
+ 0L, // 077
+ M_ABASE, // 0100
+ M_MEMPOST, // 0101
+ M_MEMPRE, // 0102
+ M_PCBASE, // 0103
+ M_PCMPOST, // 0104
+ M_PCMPRE, // 0105
+ M_AM_USP, // 0106
+ M_AM_SR, // 0107
+ M_AM_CCR, // 0110
+ M_AM_NONE, // 0111
+ 0x30, // 0112
+ 0x30, // 0113
+ 0L, // 0114
+ 0L, // 0115
+ 0L, // 0116
+ 0L, // 0117
+ M_CACHE40, // 0120
+ M_CREG, // 0121
+ M_FREG, // 0122
+ M_FPSCR // 0123
+}; // 0123 length
// Function prototypes
int HandleLabel(char *, int);
-
//
// Initialize line processor
//
ifent0.if_state = 0;
}
-
//
// Line processor
//
char * equate; // Symbol (or NULL)
int labtyp = 0; // Label type (':', DCOLON)
int equtyp = 0; // Equ type ('=', DEQUALS)
- VALUE eval; // Expression value
+ uint64_t eval; // Expression value
WORD eattr; // Expression attributes
SYM * esym; // External symbol involved in expr.
WORD siz = 0; // Size suffix to mnem/diretve/macro
char * opname = NULL; // Name of dirctve/mnemonic/macro
int listflag; // 0: Don't call listeol()
WORD rmask; // Register list, for REG
- int registerbank; // RISC register bank
- int riscreg; // RISC register
+ int equreg; // RISC register
listflag = 0; // Initialise listing flag
loop: // Line processing loop label
// Get another line of tokens
if (TokenizeLine() == TKEOF)
{
-if (debug) printf("Assemble: Found TKEOF flag...\n");
+DEBUG { printf("Assemble: Found TKEOF flag...\n"); }
if (list_flag && listflag) // Flush last line of source
listeol();
return;
}
- DEBUG DumpTokenBuffer();
+ DEBUG { DumpTokenBuffer(); }
if (list_flag)
{
state = -3; // No keyword (just EOL)
label = NULL; // No label
+ label_defined = NULL; // No label defined yet
lab_sym = NULL; // No (exported) label
equate = NULL; // No equate
tk = tok; // Save first token in line
- pcloc = (VALUE)sloc; // Set beginning-of-line PC
+ pcloc = (uint32_t)sloc; // Set beginning-of-line PC
loop1: // Internal line processing loop
if (*tok != SYMBOL)
{
error("syntax error; expected symbol");
+
goto loop;
}
// Skip past label (but record it)
if (j == ':' || j == DCOLON)
{
-as68label:
label = string[tok[1]]; // Get label name
labtyp = tok[2]; // Get label type
tok += 3; // Go to next line token
-
- // AS68 MODE:
- // Looks like another label follows the previous one, so handle
- // the previous one until there aren't any more
- if (as68_flag && (*tok == SYMBOL && tok[2] == ':'))
- {
- if (HandleLabel(label, labtyp) != 0)
- goto loop;
-
- goto as68label;
- }
}
// EOL is legal here...
if (*tok == EOL)
goto normal;
- // Next token MUST be a symbol
+ // First token MUST be a symbol (if we get here, tok didn't advance)
if (*tok++ != SYMBOL)
{
error("syntax error; expected symbol");
// Check for ".b" ".w" ".l" after directive, macro or mnemonic.
siz = SIZN;
- if (*tok == DOTW)
- siz = SIZW, tok++;
- else if (*tok == DOTL)
- siz = SIZL, tok++;
- else if (*tok == DOTB)
- siz = SIZB, tok++;
+ switch (*tok)
+ {
+ case DOTW: siz = SIZW, tok++; break;
+ case DOTL: siz = SIZL, tok++; break;
+ case DOTB: siz = SIZB, tok++; break;
+ case DOTD: siz = SIZD, tok++; break;
+ case DOTP: siz = SIZP, tok++; break;
+ case DOTQ: siz = SIZQ, tok++; break;
+ case DOTS: siz = SIZS, tok++; break;
+ case DOTX: siz = SIZX, tok++; break;
+ }
// Do special directives (500..999) (These must be handled in "real time")
if (state >= 500 && state < 1000)
{
case MN_IF:
d_if();
- goto loop;
+ goto loop;
+
case MN_ELSE:
d_else();
goto loop;
+
case MN_ENDIF:
d_endif();
goto loop;
+
case MN_IIF: // .iif --- immediate if
if (disabled || expr(exprbuf, &eval, &eattr, &esym) != OK)
goto loop;
goto loop;
goto loop1;
+
case MN_MACRO: // .macro --- macro definition
if (!disabled)
{
}
goto loop;
+
case MN_EXITM: // .exitm --- exit macro
case MN_ENDM: // .endm --- same as .exitm
if (!disabled)
}
goto loop;
+
case MN_REPT:
if (!disabled)
{
{
if (HandleLabel(label, labtyp) != 0)
goto loop;
+
+ label_defined = label;
}
- defrept();
+ HandleRept();
}
goto loop;
+
case MN_ENDR:
if (!disabled)
error("mis-nested .endr");
{
if ((equtyp == EQUREG) && (sy->sattre & UNDEF_EQUR))
{
-//REALLY? sy->sattre |= ~UNDEF_EQUR;
sy->sattre &= ~UNDEF_EQUR;
sy->svalue = 0;
}
else if ((equtyp == CCDEF) && (sy->sattre & UNDEF_CC))
{
-//REALLY? sy->sattre |= ~UNDEF_CC;
sy->sattre &= ~UNDEF_CC;
sy->svalue = 0;
}
else
{
- errors("multiple equate to '%s'", sy->sname);
+ error("multiple equate to '%s'", sy->sname);
goto loop;
}
}
corresponding register bool to true. Whenever it's undef'ed, set it to false.
When checking to see if it's already been equated, issue a warning.
*/
- // Check that we are in a RISC section
- if (!rgpu && !rdsp)
- {
- error(".equr/.regequ must be defined in .gpu/.dsp section");
- goto loop;
- }
// Check for register to equate to
- if ((*tok >= KW_R0) && (*tok <= KW_R31))
+ // This check will change once we split the registers per architecture into their own tables
+ // and out of kw.tab. But for now it'll do...
+ if ((*tok >= REG68_D0) && (*tok <= REG56_BA))
{
-// sy->sattre = EQUATEDREG | RISCSYM; // Mark as equated register
- sy->sattre = EQUATEDREG; // Mark as equated register
- riscreg = (*tok - KW_R0);
-//is there any reason to do this, since we're putting this in svalue?
-//i'm thinking, no. Let's test that out! :-D
-// sy->sattre |= (riscreg << 8); // Store register number
-//everything seems to build fine without it... We'll leave it here Just In Case(tm)
-
-#define DEBODGE_REGBANK
-#ifdef DEBODGE_REGBANK
- // Default is current state of "regbank"
- registerbank = regbank;
-#else
- // Default is no register bank specified
- registerbank = BANK_N;
-#endif
-
- // Check for ",<bank #>" override notation
- if ((tok[1] == ',') && (tok[2] == CONST))
+ sy->sattre = EQUATEDREG; // Mark as equated register
+ equreg = *tok;
+ // Check for ",<bank #>" override notation and skip past it.
+ // It is ignored now. Was that ever useful anyway?
+ if ((rgpu ||rdsp) && (tok[1] == ',') && (tok[2] == CONST))
{
- // Advance token pointer to the constant
- tok += 3;
-
- // Anything other than a 0 or a 1 will result in "No Bank"
- if (*tok == 0)
- registerbank = BANK_0;
- else if (*tok == 1)
- registerbank = BANK_1;
+ // Advance token pointer and skip everything
+ tok += 4;
}
-#ifdef DEBODGE_REGBANK
- sy->sattre |= registerbank; // Store register bank
-#else
-// What needs to happen here is to prime registerbank with regbank, then use
-// registerbank down below for the bank marking.
-#warning "!!! regbank <-> registerbank confusion here !!!"
-// The question here is why, if we're allowed to override the ".regbankN" rules
-// above, then why is it using the one set by the directive in the extended
-// attributes and not in what ends up in symbol->svalue?
-// ".regbankN" is not an original Madmac directive, so it's suspect
- sy->sattre |= regbank; // Store register bank
-#endif
eattr = ABS | DEFINED | GLOBAL;
-// & what does this $80000080 constant mean???
-// eval = 0x80000080 + (riscreg) + (registerbank << 8);
- eval = riscreg;
+ eval = equreg;
tok++;
}
// Checking for a register symbol
// Make sure symbol is a valid equreg
if (!sy2 || !(sy2->sattre & EQUATEDREG))
{
- error("invalid GPU/DSP .equr/.regequ definition");
+ error("invalid .equr/.regequ definition");
goto loop;
}
else
{
- eattr = ABS | DEFINED | GLOBAL; // Copy symbols attributes
+ eattr = ABS | DEFINED | GLOBAL; // Copy symbol's attributes
sy->sattre = sy2->sattre;
eval = (sy2->svalue & 0xFFFFF0FF);
tok += 2;
}
else
{
- error("invalid GPU/DSP .equr/.regequ definition");
+ error("invalid .equr/.regequ definition");
goto loop;
}
}
if (reglist(&rmask) < 0)
goto loop;
- eval = (VALUE)rmask;
+ eval = (uint32_t)rmask;
eattr = ABS | DEFINED;
}
else if (equtyp == CCDEF)
else if (expr(exprbuf, &eval, &eattr, &esym) != OK)
goto loop;
}
- //equ a equr
+ // equ an equr
else if (*tok == SYMBOL)
{
sy2 = lookup(string[tok[1]], LABEL, j);
sy->stype = sy2->stype;
sy->sattr = sy2->sattr;
sy->sattre = sy2->sattre;
-//ICK sy->svalue = (sy2->svalue & 0xFFFFF0FF);
sy->svalue = sy2->svalue;
goto loop;
}
sy->svalue = eval;
if (list_flag) // Put value in listing
- listvalue(eval);
+ listvalue((uint32_t)eval);
- at_eol(); // Must be at EOL now
+ ErrorIfNotAtEOL(); // Must be at EOL now
goto loop;
}
// Non-zero == error occurred
if (HandleLabel(label, labtyp) != 0)
goto loop;
+
+ label_defined = label;
}
// Punt on EOL
if (state == -3)
goto loop;
- /*
- * If we're in 6502 mode and are still in need
- * of a mnemonic, then search for valid 6502 mnemonic.
- */
- if (m6502 &&
- (state < 0 || state >= 1000))
+ // If we're in 6502 mode and are still in need of a mnemonic, then search
+ // for valid 6502 mnemonic.
+ if (m6502 && (state < 0 || state >= 1000))
{
#ifdef ST
state = kmatch(opname, mpbase, mpcheck, mptab, mpaccept);
#else
- for (state = 0, p = opname; state >= 0;)
+ for(state=0, p=opname; state>= 0; )
{
j = mpbase[state] + tolowertab[*p];
- if (mpcheck[j] != state) /* reject, character doesn't match */
+
+ if (mpcheck[j] != state) // Reject, character doesn't match
{
- state = -1; /* no match */
+ state = -1; // No match
break;
}
if (!*++p)
- { /* must accept or reject at EOS */
- state = mpaccept[j]; /* (-1 on no terminal match) */
+ { // Must accept or reject at EOS
+ state = mpaccept[j]; // (-1 on no terminal match)
break;
}
+
state = mptab[j];
}
#endif
- /*
- * Call 6502 code generator if we found a mnemonic
- */
+ // Call 6502 code generator if we found a mnemonic
if (state >= 2000)
{
m6502cg(state - 2000);
goto loop;
}
}
-
+
// If we are in GPU or DSP mode and still in need of a mnemonic then search
// for one
if ((rgpu || rdsp) && (state < 0 || state >= 1000))
}
}
+ // If we are in OP mode and still in need of a mnemonic then search for one
+ if (robjproc && ((state < 0) || (state >= 1000)))
+ {
+ for(state=0, p=opname; state>=0;)
+ {
+ j = mobase[state] + (int)tolowertab[*p];
+
+ // Reject, character doesn't match
+ if (mocheck[j] != state)
+ {
+ state = -1; // No match
+ break;
+ }
+
+ // Must accept or reject at EOS
+ if (!*++p)
+ {
+ state = moaccept[j]; // (-1 on no terminal match)
+ break;
+ }
+
+ state = motab[j];
+ }
+
+ // Call OP code generator if we found a mnemonic
+ if (state >= 3100)
+ {
+ GenerateOPCode(state);
+ goto loop;
+ }
+ }
+
+ // If we are in 56K mode and still in need of a mnemonic then search for one
+ if (dsp56001 && ((state < 0) || (state >= 1000)))
+ {
+ for(state=0, p=opname; state>=0;)
+ {
+ j = dspbase[state] + (int)tolowertab[*p];
+
+ // Reject, character doesn't match
+ if (dspcheck[j] != state)
+ {
+ state = -1; // No match
+ break;
+ }
+
+ // Must accept or reject at EOS
+ if (!*++p)
+ {
+ state = dspaccept[j]; // (-1 on no terminal match)
+ break;
+ }
+
+ state = dsptab[j];
+ }
+
+ // Call DSP code generator if we found a mnemonic
+ if (state >= 2000)
+ {
+ LONG parcode;
+ int operands;
+ MNTABDSP * md = &dsp56k_machtab[state - 2000];
+ deposit_extra_ea = 0; // Assume no extra word needed
+
+ if (md->mnfunc == dsp_mult)
+ {
+ // Special case for multiplication instructions: they require
+ // 3 operands
+ if ((operands = dsp_amode(3)) == ERROR)
+ goto loop;
+ }
+ else if ((md->mnattr & PARMOVE) && md->mn0 != M_AM_NONE)
+ {
+ if (dsp_amode(2) == ERROR)
+ goto loop;
+ }
+ else if ((md->mnattr & PARMOVE) && md->mn0 == M_AM_NONE)
+ {
+ // Instructions that have parallel moves but use no operands
+ // (probably only move). In this case, don't parse addressing
+ // modes--just go straight to parallel parse
+ dsp_am0 = dsp_am1 = M_AM_NONE;
+ }
+ else
+ {
+ // Non parallel move instructions can have up to 4 parameters
+ // (well, only tcc instructions really)
+ if ((operands = dsp_amode(4)) == ERROR)
+ goto loop;
+
+ if (operands == 4)
+ {
+ dsp_tcc4(md->mninst);
+ goto loop;
+ }
+ }
+
+ if (md->mnattr & PARMOVE)
+ {
+ // Check for parallel moves
+ if ((parcode = parmoves(dsp_a1reg)) == ERROR)
+ goto loop;
+ }
+ else
+ {
+ if (*tok != EOL)
+ error("parallel moves not allowed with this instruction");
+
+ parcode = 0;
+ }
+
+ while ((dsp_am0 & md->mn0) == 0 || (dsp_am1 & md->mn1) == 0)
+ md = &dsp56k_machtab[md->mncont];
+
+ GENLINENOSYM();
+ (*md->mnfunc)(md->mninst | (parcode << 8));
+ goto loop;
+ }
+ }
+
// Invoke macro or complain about bad mnemonic
if (state < 0)
{
if ((sy = lookup(opname, MACRO, 0)) != NULL)
InvokeMacro(sy, siz);
else
- errors("unknown op '%s'", opname);
+ error("unknown op '%s'", opname);
goto loop;
}
}
// Do mnemonics
- // o can't deposit instrs in BSS or ABS
- // o do automatic .EVEN for instrs
- // o allocate space for largest possible instr
- // o can't do ".b" operations with an address register
+ // o can't deposit instrs in BSS or ABS
+ // o do automatic .EVEN for instrs
+ // o allocate space for largest possible instr
+ // o can't do ".b" operations with an address register
if (scattr & SBSS)
{
error("cannot initialize non-storage (BSS) section");
// Call special-mode handler
if (m->mnattr & CGSPECIAL)
{
+ GENLINENOSYM();
(*m->mnfunc)(m->mninst, siz);
goto loop;
}
if (amode(1) < 0) // Parse 0, 1 or 2 addr modes
goto loop;
- if (*tok != EOL)
- error(extra_stuff);
+ // Check that we're at EOL
+ // The only exception is ptestr/ptestw instructions
+ // that have 3 or 4 operands and are not handled by
+ // amode(). (yes, we're taking a performance hit here sadly)
+ if (m->mnfunc != m_ptestr && m->mnfunc != m_ptestw)
+ if (*tok != EOL)
+ error(extra_stuff);
amsk0 = amsktab[am0];
amsk1 = amsktab[am1];
// Keep a backup of chptr (used for optimisations during codegen)
chptr_opcode = chptr;
- for(;;)
- {
- if ((m->mnattr & siz) && (amsk0 & m->mn0) != 0 && (amsk1 & m->mn1) != 0)
- {
- (*m->mnfunc)(m->mninst, siz);
- goto loop;
- }
-
+ while (!(m->mnattr & siz) || (amsk0 & m->mn0) == 0 || (amsk1 & m->mn1) == 0)
m = &machtab[m->mncont];
- }
-}
+ DEBUG { printf(" 68K: mninst=$%X, siz=$%X, mnattr=$%X, amsk0=$%X, mn0=$%X, amsk1=$%X, mn1=$%X\n", m->mninst, siz, m->mnattr, amsk0, m->mn0, amsk1, m->mn1); }
+
+ GENLINENOSYM();
+ (*m->mnfunc)(m->mninst, siz);
+ goto loop;
+}
//
// Handle the creation of labels
{
symbol = NewSymbol(label, LABEL, environment);
symbol->sattr = 0;
-// symbol->sattre = RISCSYM;
symbol->sattre = 0;
}
else if (symbol->sattr & DEFINED)
- return errors("multiply-defined label '%s'", label);
+ return error("multiply-defined label '%s'", label);
// Put symbol in "order of definition" list if it's not already in it
AddToSymbolDeclarationList(symbol);
lab_sym = symbol;
+ // Yes, our CS professors told us to write checks for equality this way,
+ // but damn, it hurts my brain every time I look at it. :-/
if (0 == environment)
curenv++;
return 0;
}
-
-
-//
-// .if, Start conditional assembly
-//
-int d_if(void)
-{
- IFENT * rif;
- WORD eattr;
- VALUE eval;
- SYM * esym;
-
- // Alloc an IFENTRY
- if ((rif = f_ifent) == NULL)
- rif = (IFENT *)malloc(sizeof(IFENT));
- else
- f_ifent = rif->if_prev;
-
- rif->if_prev = ifent;
- ifent = rif;
-
- if (!disabled)
- {
- if (expr(exprbuf, &eval, &eattr, &esym) != OK)
- return 0;
-
- if ((eattr & DEFINED) == 0)
- return error(undef_error);
-
- disabled = !eval;
- }
-
- rif->if_state = (WORD)disabled;
- return 0;
-}
-
-
-//
-// .else, Do alternate case for .if
-//
-int d_else(void)
-{
- IFENT * rif = ifent;
-
- if (rif->if_prev == NULL)
- return error("mismatched .else");
-
- if (disabled)
- disabled = rif->if_prev->if_state;
- else
- disabled = 1;
-
- rif->if_state = (WORD)disabled;
- return 0;
-}
-
-
-//
-// .endif, End of conditional assembly block
-// This is also called by fpop() to pop levels of IFENTs in case a macro or
-// include file exits early with `exitm' or `end'.
-//
-int d_endif (void)
-{
- IFENT * rif = ifent;
-
- if (rif->if_prev == NULL)
- return error("mismatched .endif");
-
- ifent = rif->if_prev;
- disabled = rif->if_prev->if_state;
- rif->if_prev = f_ifent;
- f_ifent = rif;
- return 0;
-}
-
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