Long forgotten helper script which is used to create tables for VS builds

[rmac] / mach.c

diff --git a/mach.c b/mach.c
index 64061dc4cef46cf97d152b777f97bbdb1207b450..f979c9e98985d1eb8166c5011867271bed7f6c62 100644 (file)
--- a/mach.c
+++ b/mach.c
@@ -1,7 +1,7 @@
 //
 // RMAC - Reboot's Macro Assembler for all Atari computers
 // MACH.C - Code Generation
-// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2019 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
@@ -60,7 +60,7 @@ int m_cas2(WORD inst, WORD siz);
 int m_chk2(WORD inst, WORD siz);
 int m_cmp2(WORD inst, WORD siz);
 int m_bkpt(WORD inst, WORD siz);
-int m_cpbr(WORD inst, WORD siz);
+int m_cpbcc(WORD inst, WORD siz);
 int m_cpdbr(WORD inst, WORD siz);
 int m_muls(WORD inst, WORD siz);
 int m_move16a(WORD inst, WORD siz);
@@ -92,6 +92,7 @@ int m_ploadw(WORD inst, WORD siz);
 
 // FPU
 int m_fabs(WORD inst, WORD siz);
+int m_fbcc(WORD inst, WORD siz);
 int m_facos(WORD inst, WORD siz);
 int m_fadd(WORD inst, WORD siz);
 int m_fasin(WORD inst, WORD siz);
@@ -1186,10 +1187,14 @@ int m_bfop(WORD inst, WORD siz)
 
        //D_word((inst | am0 | a0reg | am1 | a1reg));
        if (inst == B16(11101111, 11000000))
+       {
                // bfins special case
                D_word((inst | am1 | a1reg));
+       }
        else
+       {
                D_word((inst | am0 | a0reg));
+       }
 
        ea0gen(siz);    // Generate EA
 
@@ -1538,13 +1543,10 @@ int m_chk2(WORD inst, WORD siz)
 
 
 //
-// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc))
-// TODO: Better checks for different instructions?
+// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc)), pbcc (68851)
 //
-int m_cpbr(WORD inst, WORD siz)
+int m_fpbr(WORD inst, WORD siz)
 {
-       if ((activecpu & (CPU_68020 | CPU_68030)) && (!activefpu == 0))
-               return error(unsupport);
 
        if (a0exattr & DEFINED)
        {
@@ -1598,6 +1600,38 @@ int m_cpbr(WORD inst, WORD siz)
 }
 
 
+//
+// cpbcc(68020, 68030, 68040 (FBcc), 68060 (FBcc))
+//
+int m_cpbcc(WORD inst, WORD siz)
+{
+       if (!(activecpu & (CPU_68020 | CPU_68030)))
+               return error(unsupport);
+
+       return m_fpbr(inst, siz);
+}
+
+
+//
+// fbcc(6808X, 68040, 68060)
+//
+int m_fbcc(WORD inst, WORD siz)
+{
+       CHECKNOFPU;
+       return m_fpbr(inst, siz);
+}
+
+
+//
+// pbcc(68851 but let's assume 68020 only)
+//
+int m_pbcc(WORD inst, WORD siz)
+{
+       CHECKNO20;
+       return m_fpbr(inst, siz);
+}
+
+
 //
 // cpdbcc(68020, 68030)
 //
@@ -1656,7 +1690,7 @@ int m_muls(WORD inst, WORD siz)
 
        if (flg & 16)
        {
-               // OR-in register number 
+               // OR-in register number
                if (flg & 8)
                        inst |= reg_9[a1reg];           // ea1reg in bits 9..11
                else
@@ -1685,7 +1719,7 @@ int m_muls(WORD inst, WORD siz)
 
                 D_word(inst);
 
-               // Generate ea0 if requested 
+               // Generate ea0 if requested
                if (flg & 2)
                        ea0gen(siz);
 
@@ -2105,16 +2139,6 @@ int m_moves(WORD inst, WORD siz)
 }
 
 
-//
-// PBcc (MC68851)
-//
-int m_pbcc(WORD inst, WORD siz)
-{
-       CHECKNO20;
-       return error("Not implemented yet.");
-}
-
-
 //
 // pflusha (68030, 68040)
 //
@@ -2908,7 +2932,7 @@ int m_fintrz(WORD inst, WORD siz)
 
        if (activefpu == FPU_68040)
                warn("Instruction is emulated in 68040");
-       
+
        return gen_fpu(inst, siz, B8(00000011), FPU_NOWARN);
 }
 
@@ -2944,14 +2968,12 @@ int m_flogn(WORD inst, WORD siz)
 
 
 //
-// flognp1 (68040FPSP, 68060FPSP)
+// flognp1 (6888X, 68040FPSP, 68060FPSP)
 //
 int m_flognp1(WORD inst, WORD siz)
 {
-       if (activefpu & (FPU_68040 | FPU_68060))
-               return gen_fpu(inst, siz, B8(00000110), FPU_FPSP);
-
-       return error("Unsupported in current FPU");
+       CHECKNOFPU;
+       return gen_fpu(inst, siz, B8(00000110), FPU_FPSP);
 }
 
 
@@ -3415,7 +3437,7 @@ int m_fsmul(WORD inst, WORD siz)
 {
        if (activefpu & (FPU_68040 | FPU_68060))
                return gen_fpu(inst, siz, B8(01100011), FPU_NOWARN);
-       
+
        return error("Unsupported in current FPU");
 }
 
@@ -3444,7 +3466,7 @@ int m_fneg(WORD inst, WORD siz)
                a1reg = a0reg;
                return gen_fpu(inst, siz, B8(00011010), FPU_NOWARN);
        }
-       
+
        return gen_fpu(inst, siz, B8(00011010), FPU_NOWARN);
 }
 
@@ -3461,7 +3483,7 @@ int m_fsneg(WORD inst, WORD siz)
                        a1reg = a0reg;
                        return gen_fpu(inst, siz, B8(01011010), FPU_NOWARN);
                }
-               
+
                return gen_fpu(inst, siz, B8(01011010), FPU_NOWARN);
        }
 
@@ -3623,7 +3645,7 @@ int m_fsfsqrt(WORD inst, WORD siz)
 {
        if (activefpu & (FPU_68040 | FPU_68060))
                return gen_fpu(inst, siz, B8(01000001), FPU_NOWARN);
-       
+
        return error("Unsupported in current FPU");
 }
 
@@ -3780,8 +3802,10 @@ int m_lpstop(WORD inst, WORD siz)
        CHECKNO60;
        D_word(B16(00000001, 11000000));
 
-       if (a0exattr&DEFINED)
+       if (a0exattr & DEFINED)
+       {
                D_word(a0exval);
+       }
        else
        {
                AddFixup(FU_WORD, sloc, a0expr);