Slight revamp of the optimisation system, featuring: strengthened flag parser, slight...

[rmac] / eagen0.c

diff --git a/eagen0.c b/eagen0.c
index 5b3c4ab5b35df2e34043b50364407d6bc5fe01c2..60b7e4a6c40d564b76f526cb78186f952a15ff91 100644 (file)
--- a/eagen0.c
+++ b/eagen0.c
@@ -2,19 +2,19 @@
 // RMAC - Reboot's Macro Assembler for all Atari computers
 // EAGEN0.C - Effective Address Code Generation
 //            Generated Code for eaN (Included twice by "eagen.c")
-// Copyright (C) 199x Landon Dyer, 2011-2018 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2020 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
 
 int eaNgen(WORD siz)
 {
-       uint32_t vbd, v = (uint32_t)aNexval;
-       WORD wbd, w = (WORD)(aNexattr & DEFINED);
-       WORD tdbbd, tdb = (WORD)(aNexattr & TDB);
-       vbd = (uint32_t)aNbdexval;
-       wbd = (WORD)(aNbdexattr & DEFINED);
-       tdbbd = (WORD)(aNbdexattr & TDB);
+       uint32_t v = (uint32_t)aNexval;
+       WORD w = (WORD)(aNexattr & DEFINED);
+       WORD tdb = (WORD)(aNexattr & TDB);
+       uint32_t vbd = (uint32_t)aNbdexval;
+       WORD wbd = (WORD)(aNbdexattr & DEFINED);
+       WORD tdbbd = (WORD)(aNbdexattr & TDB);
        uint8_t extDbl[12];
 
        switch (amN)
@@ -31,6 +31,7 @@ int eaNgen(WORD siz)
        case AM_NONE:
                // This is a performance hit, though
                break;
+
        case ADISP:
                // expr(An)
                if (w)
@@ -39,7 +40,7 @@ int eaNgen(WORD siz)
                        if (tdb)
                                MarkRelocatable(cursect, sloc, tdb, MWORD, NULL);
 
-                       if ((v == 0) && CHECK_OPTS(OPT_INDIRECT_DISP) && !movep)
+                       if ((v == 0) && CHECK_OPTS(OPT_OUTER_DISP) && !movep)
                        {
                                // If expr is 0, size optimise the opcode. Generally the lower
                                // 6 bits of the opcode for expr(ax) are 101rrr where rrr=the
@@ -63,7 +64,7 @@ int eaNgen(WORD siz)
                                        chptr_opcode[1] |= 0x0080 & 255;          // slap in 010 bits
                                }
 
-                               if (sbra_flag)
+                               if (optim_warn_flag)
                                        warn("0(An) converted to (An)");
 
                                return OK;
@@ -82,6 +83,7 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case PCDISP:
                if (w)
                {
@@ -104,6 +106,7 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case AINDEXED:
                // Compute ixreg and size+scale
                w = (WORD)((aNixreg << 12) | aNixsiz);
@@ -129,6 +132,7 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case PCINDEXED:
                // Compute ixreg and size+scale
                w = (WORD)((aNixreg << 12) | aNixsiz);
@@ -155,6 +159,7 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case IMMED:
                switch (siz)
                {
@@ -176,6 +181,7 @@ int eaNgen(WORD siz)
                        }
 
                        break;
+
                case SIZW:
                case SIZN:
                        if (w)
@@ -195,6 +201,7 @@ int eaNgen(WORD siz)
                        }
 
                        break;
+
                case SIZL:
                        if (w)
                        {
@@ -210,6 +217,7 @@ int eaNgen(WORD siz)
                        }
 
                        break;
+
                case SIZS:
                        // 68881/68882/68040 only
                        if (w)
@@ -235,6 +243,7 @@ int eaNgen(WORD siz)
                        }
 
                break;
+
                case SIZD:
                        // 68881/68882/68040 only
                        if (w)
@@ -256,6 +265,7 @@ int eaNgen(WORD siz)
                        }
 
                        break;
+
                case SIZX:
                        // 68881/68882/68040 only
                        if (w)
@@ -271,22 +281,29 @@ int eaNgen(WORD siz)
                        }
                        else
                        {
+                               // Why would this be anything other than a floating point
+                               // expression???  Even if there were an undefined symbol in
+                               // the expression, how would that be relevant?  I can't see
+                               // any use case where this would make sense.
                                AddFixup(FU_FLOATDOUB, sloc, aNexpr);
                                memset(extDbl, 0, 12);
                                D_extend(extDbl);
                        }
 
                        break;
+
                default:
                        // IMMED size problem
                        interror(1);
                }
 
                break;
+
     case SIZP:
                // 68881/68882/68040 only
                return error("Sorry, .p constant format is not implemented yet!");
                break;
+
        case ABSW:
                if (w) // Defined
                {
@@ -305,9 +322,14 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case ABSL:
                if (w) // Defined
                {
+                       if (CHECK_OPTS(OPT_PC_RELATIVE))
+                               if (aNexattr&(DEFINED | REFERENCED | EQUATED) == DEFINED | REFERENCED)
+                                       return error("relocation not allowed");
+
                        if (tdb)
                                MarkRelocatable(cursect, sloc, tdb, MLONG, NULL);
 
@@ -320,12 +342,15 @@ int eaNgen(WORD siz)
                }
 
                break;
+
        case DINDW:
                D_word((0x190 | (aNixreg << 12)));
                break;
+
        case DINDL:
                D_word((0x990 | (aNixreg << 12)));
                break;
+
        case ABASE:
        case MEMPOST:
        case MEMPRE:
@@ -333,6 +358,7 @@ int eaNgen(WORD siz)
        case PCMPOST:
        case PCMPRE:
                D_word(aNexten);
+
                // Deposit bd (if not suppressed)
                if ((aNexten & 0x0030) == EXT_BDSIZE0)
                {
@@ -355,7 +381,7 @@ int eaNgen(WORD siz)
                        else
                        {
                                // Arrange for fixup later on
-                               AddFixup(FU_WORD | FU_SEXT, sloc, aNbexpr);
+                               AddFixup(FU_WORD | FU_SEXT | FU_PCRELX, sloc, aNbexpr);
                                D_word(0);
                        }
                }
@@ -377,6 +403,7 @@ int eaNgen(WORD siz)
                                D_long(0);
                        }
                }
+
                // Deposit od (if not suppressed)
                if ((aNexten & 7) == EXT_IISPRE0 || (aNexten & 7) == EXT_IISPREN
                        || (aNexten & 7) == EXT_IISNOIN || (aNexten & 7) == EXT_IISPOSN)
@@ -426,6 +453,7 @@ int eaNgen(WORD siz)
 
                break;
                //return error("unsupported 68020 addressing mode");
+
        default:
                // Bad addressing mode in ea gen
                interror(3);