Multiple fixes for 020+ mode, including:

[rmac] / amode.h

diff --git a/amode.h b/amode.h
index 624603ebc61e74cdd9396ef26875bcb362bc399a..b109baedeba3cb977629207598ec164f4747719d 100644 (file)
--- a/amode.h
+++ b/amode.h
@@ -1,7 +1,7 @@
 //
-// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
+// RMAC - Reboot's Macro Assembler for all Atari computers
 // AMODE.H - Addressing Modes
-// Copyright (C) 199x Landon Dyer, 2017 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2017 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
@@ -15,6 +15,8 @@
 #define DREG         000                       // Dn
 #define AREG         010                       // An
 #define AIND         020                       // (An)
+#define DINDW        0112                      // (Dn.w)
+#define DINDL        0113                      // (Dn.l)
 #define APOSTINC     030                       // (An)+
 #define APREDEC      040                       // -(An)
 #define ADISP        050                       // (d16,An) d16(An)
@@ -35,7 +37,7 @@
 #define AM_CCR       0110
 #define AM_NONE      0111                      // Nothing
 #define CACHES       0120                      // Instruction/Data/Both Caches (IC/DC/BC)
-#define CREG         0121                      // Control registers (see CREGlut in mach.h)
+#define CREG         0121                              // Control registers (see CREGlut in mach.c)
 #define FREG         0122                      // FPU registers (fp0-fp7)
 #define FPSCR        0123                      // FPU system control registers (fpiar, fpsr, fpcr)
 
@@ -66,6 +68,7 @@
 #define M_CREG       0x00800000L       // Control registers
 #define M_FREG       0x01000000L       // FPn
 #define M_FPSCR      0x02000000L       // fpiar, fpsr, fpcr
+#define M_CACHE40    0x04000000L               // 68040 cache registers (IC40,DC40,BC40)
 
 // Addr mode categories
 #define C_ALL        0x00000FFFL
@@ -77,6 +80,9 @@
 #define C_CTRL030    0x0003F7E4L
 #define C_DATA030    0x0003FFFDL
 #define C_MOVES      (M_AIND | M_APOSTINC | M_APREDEC | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
+#define C_BF1        (M_DREG | M_AIND | M_AINDEXED | M_ADISP | M_ABSW | M_ABSL | M_ABASE | M_MEMPOST | M_MEMPRE)
+#define C_BF2        (C_BF1 | M_PCDISP | M_PCINDEXED | M_PCBASE | M_PCMPOST | M_PCMPRE )
+#define C_PMOVE      (M_AIND | M_ADISP | M_AINDEXED  | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
 
 #define C_ALTDATA    (C_DATA & C_ALT)
 #define C_ALTMEM     (C_MEM & C_ALT)
@@ -147,6 +153,8 @@ extern WORD a0extension, a1extension;
 extern WORD mulmode;
 extern int bfparam1;
 extern int bfparam2;
+extern int bfval1;
+extern int bfval2;
 extern VALUE bf0exval;
 
 // mnattr: