2 // RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
3 // RISCA.C - GPU/DSP Assembler
4 // Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends
5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
6 // Source utilised with the kind permission of Landon Dyer
18 #define DEF_MR // Declare keyword values
19 #include "risckw.h" // Incl. generated risc keywords
21 #define DEF_KW // Declare keyword values
22 #include "kwtab.h" // Incl. generated keyword tables & defs
25 unsigned altbankok = 0; // Ok to use alternate register bank
26 unsigned orgactive = 0; // RISC org directive active
27 unsigned orgaddr = 0; // Org'd address
28 unsigned orgwarning = 0; // Has an ORG warning been issued
29 int lastOpcode = -1; // Last RISC opcode assembled
30 uint8_t riscImmTokenSeen; // The '#' (immediate) token was seen
32 const char reg_err[] = "missing register R0...R31";
34 // Jaguar jump condition names
35 const char condname[MAXINTERNCC][5] = {
36 "NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ",
37 "N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO",
41 // Jaguar jump condition numbers
42 const char condnumber[] = {
43 1, 2, 4, 5, 6, 8, 9, 10, 20, 21, 22, 24, 25, 26,
44 0, 0, 1, 2, 4, 4, 5, 8, 8, 20, 24, 31
47 const struct opcoderecord roptbl[] = {
48 { MR_ADD, RI_TWO, 0 },
49 { MR_ADDC, RI_TWO, 1 },
50 { MR_ADDQ, RI_NUM_32, 2 },
51 { MR_ADDQT, RI_NUM_32, 3 },
52 { MR_SUB, RI_TWO, 4 },
53 { MR_SUBC, RI_TWO, 5 },
54 { MR_SUBQ, RI_NUM_32, 6 },
55 { MR_SUBQT, RI_NUM_32, 7 },
56 { MR_NEG, RI_ONE, 8 },
57 { MR_AND, RI_TWO, 9 },
58 { MR_OR, RI_TWO, 10 },
59 { MR_XOR, RI_TWO, 11 },
60 { MR_NOT, RI_ONE, 12 },
61 { MR_BTST, RI_NUM_31, 13 },
62 { MR_BSET, RI_NUM_31, 14 },
63 { MR_BCLR, RI_NUM_31, 15 },
64 { MR_MULT, RI_TWO, 16 },
65 { MR_IMULT, RI_TWO, 17 },
66 { MR_IMULTN, RI_TWO, 18 },
67 { MR_RESMAC, RI_ONE, 19 },
68 { MR_IMACN, RI_TWO, 20 },
69 { MR_DIV, RI_TWO, 21 },
70 { MR_ABS, RI_ONE, 22 },
71 { MR_SH, RI_TWO, 23 },
72 { MR_SHLQ, RI_NUM_32, 24 + SUB32 },
73 { MR_SHRQ, RI_NUM_32, 25 },
74 { MR_SHA, RI_TWO, 26 },
75 { MR_SHARQ, RI_NUM_32, 27 },
76 { MR_ROR, RI_TWO, 28 },
77 { MR_RORQ, RI_NUM_32, 29 },
78 { MR_ROLQ, RI_NUM_32, 29 + SUB32 },
79 { MR_CMP, RI_TWO, 30 },
80 { MR_CMPQ, RI_NUM_15, 31 },
81 { MR_SAT8, RI_ONE, 32 + GPUONLY },
82 { MR_SUBQMOD, RI_NUM_32, 32 + DSPONLY },
83 { MR_SAT16, RI_ONE, 33 + GPUONLY },
84 { MR_SAT16S, RI_ONE, 33 + DSPONLY },
85 { MR_MOVEQ, RI_NUM_31, 35 },
86 { MR_MOVETA, RI_TWO, 36 },
87 { MR_MOVEFA, RI_TWO, 37 },
88 { MR_MOVEI, RI_MOVEI, 38 },
89 { MR_LOADB, RI_LOADN, 39 },
90 { MR_LOADW, RI_LOADN, 40 },
91 { MR_LOADP, RI_LOADN, 42 + GPUONLY },
92 { MR_SAT32S, RI_ONE, 42 + DSPONLY },
93 { MR_STOREB, RI_STOREN, 45 },
94 { MR_STOREW, RI_STOREN, 46 },
95 { MR_STOREP, RI_STOREN, 48 + GPUONLY },
96 { MR_MIRROR, RI_ONE, 48 + DSPONLY },
97 { MR_JUMP, RI_JUMP, 52 },
99 { MR_MMULT, RI_TWO, 54 },
100 { MR_MTOI, RI_TWO, 55 },
101 { MR_NORMI, RI_TWO, 56 },
102 { MR_NOP, RI_NONE, 57 },
103 { MR_SAT24, RI_ONE, 62 },
104 { MR_UNPACK, RI_ONE, 63 + GPUONLY },
105 { MR_PACK, RI_ONE, 63 + GPUONLY },
106 { MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY },
107 { MR_MOVE, RI_MOVE, 0 },
108 { MR_LOAD, RI_LOAD, 0 },
109 { MR_STORE, RI_STORE, 0 }
114 // Convert a string to uppercase
116 void strtoupper(char * s)
124 // Function to return "malformed expression" error
125 // This is done mainly to remove a bunch of GOTO statements in the parser
127 static inline int MalformedOpcode(int signal)
130 sprintf(buf, "%02X", signal);
131 return errors("Malformed opcode [internal $%s]", buf);
136 // Build RISC instruction word
138 void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2)
140 // Check for absolute address setting
141 if (!orgwarning && !orgactive)
143 // warn("GPU/DSP code outside of absolute section");
144 warn("RISC code generated with no origin defined");
148 int value = ((opcode & 0x3F) << 10) + ((reg1 & 0x1F) << 5) + (reg2 & 0x1F);
154 // Get a RISC register
156 int GetRegister(WORD rattr)
158 VALUE eval; // Expression value
159 WORD eattr; // Expression attributes
160 SYM * esym; // External symbol involved in expr.
161 TOKEN r_expr[EXPRSIZE]; // Expression token list
163 // Evaluate what's in the global "tok" buffer
164 if (expr(r_expr, &eval, &eattr, &esym) != OK)
167 if ((challoc - ch_size) < 4)
170 if (!(eattr & DEFINED))
172 AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr);
176 // If we got a register in range (0-31), return it
177 if ((eval >= 0) && (eval <= 31))
180 // Otherwise, it's out of range & we flag an error
181 return error(reg_err);
186 // Do RISC code generation
188 int GenerateRISCCode(int state)
190 int reg1; // Register 1
191 int reg2; // Register 2
192 int val = 0; // Constructed value
199 int indexed; // Indexed register flag
201 VALUE eval; // Expression value
202 WORD eattr; // Expression attributes
203 SYM * esym; // External symbol involved in expr.
204 TOKEN r_expr[EXPRSIZE]; // Expression token list
206 // Get opcode parameter and type
207 unsigned short parm = (WORD)(roptbl[state - 3000].parm);
208 unsigned type = roptbl[state - 3000].typ;
209 riscImmTokenSeen = 0; // Set to "token not seen yet"
211 // Detect whether the opcode parmeter passed determines that the opcode is
212 // specific to only one of the RISC processors and ensure it is legal in
213 // the current code section. If not then show error and return.
214 if (((parm & GPUONLY) && rdsp) || ((parm & DSPONLY) && rgpu))
215 return error("Opcode is not valid in this code section");
217 // Process RISC opcode
220 // No operand instructions
223 BuildRISCIntructionWord(parm, 0, 0);
226 // Single operand instructions (Rd)
227 // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S, UNPACK
229 reg2 = GetRegister(FU_REGTWO);
231 BuildRISCIntructionWord(parm, parm >> 6, reg2);
234 // Two operand instructions (Rs,Rd)
235 // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT, MMULT,
236 // MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
239 altbankok = 1; // MOVEFA
241 reg1 = GetRegister(FU_REGONE);
245 altbankok = 1; // MOVETA
247 reg2 = GetRegister(FU_REGTWO);
249 BuildRISCIntructionWord(parm, reg1, reg2);
252 // Numeric operand (n,Rd) where n = -16..+15
256 // Numeric operand (n,Rd) where n = 0..31
257 // BCLR, BSET, BTST, MOVEQ
260 // Numeric operand (n,Rd) where n = 1..32
261 // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ, RORQ
266 reg1 = -16; reg2 = 15; attrflg = FU_NUM15;
270 reg1 = 0; reg2 = 31; attrflg = FU_NUM31;
273 reg1 = 1; reg2 = 32; attrflg = FU_NUM32;
281 return MalformedOpcode(0x01);
284 riscImmTokenSeen = 1;
286 if (expr(r_expr, &eval, &eattr, &esym) != OK)
287 return MalformedOpcode(0x02);
289 if ((challoc - ch_size) < 4)
292 if (!(eattr & DEFINED))
294 AddFixup((WORD)(FU_WORD | attrflg), sloc, r_expr);
299 if ((int)eval < reg1 || (int)eval > reg2)
300 return error("constant out of range");
304 else if (type == RI_NUM_32)
305 reg1 = (reg1 == 32 ? 0 : eval);
311 reg2 = GetRegister(FU_REGTWO);
313 BuildRISCIntructionWord(parm, reg1, reg2);
316 // Move Immediate--n,Rn--n in Second Word
319 return MalformedOpcode(0x03);
322 riscImmTokenSeen = 1;
324 if (expr(r_expr, &eval, &eattr, &esym) != OK)
325 return MalformedOpcode(0x04);
327 if (lastOpcode == RI_JUMP || lastOpcode == RI_JR)
331 // User doesn't care, emit a NOP to fix
332 BuildRISCIntructionWord(57, 0, 0);
333 warn("MOVEI following JUMP, inserting NOP to fix your BROKEN CODE");
336 warn("MOVEI immediately follows JUMP");
339 if ((challoc - ch_size) < 4)
342 if (!(eattr & DEFINED))
344 AddFixup(FU_LONG | FU_MOVEI, sloc + 2, r_expr);
351 //printf("risca: Doing rmark for RI_MOVEI (tdb=$%X)...\n", eattr & TDB);
352 rmark(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
356 val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000);
358 reg2 = GetRegister(FU_REGTWO);
360 D_word((((parm & 0x3F) << 10) + reg2));
375 reg1 = GetRegister(FU_REGONE);
379 reg2 = GetRegister(FU_REGTWO);
381 BuildRISCIntructionWord(parm, reg1, reg2);
384 // (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59
390 return MalformedOpcode(0x05);
394 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
395 indexed = (*tok - KW_R0);
399 // sy = lookup((char *)tok[1], LABEL, 0);
400 sy = lookup(string[tok[1]], LABEL, 0);
408 if (sy->sattre & EQUATEDREG)
410 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
411 && (*(tok + 2) != ')'))
413 indexed = (sy->svalue & 0x1F);
421 reg1 = GetRegister(FU_REGONE);
431 parm = (WORD)(reg1 - 14 + 58);
434 if (*tok >= KW_R0 && *tok <= KW_R31)
439 // sy = lookup((char *)tok[1], LABEL, 0);
440 sy = lookup(string[tok[1]], LABEL, 0);
448 if (sy->sattre & EQUATEDREG)
454 reg1 = GetRegister(FU_REGONE);
458 if (expr(r_expr, &eval, &eattr, &esym) != OK)
459 return MalformedOpcode(0x06);
461 if ((challoc - ch_size) < 4)
464 if (!(eattr & DEFINED))
465 return error("constant expected after '+'");
471 reg1 = 14 + (parm - 58);
473 warn("NULL offset in LOAD ignored");
477 if (reg1 < 1 || reg1 > 32)
478 return error("constant in LOAD out of range");
483 parm = (WORD)(parm - 58 + 43);
489 reg1 = GetRegister(FU_REGONE);
494 return MalformedOpcode(0x07);
498 reg2 = GetRegister(FU_REGTWO);
500 BuildRISCIntructionWord(parm, reg1, reg2);
503 // Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61
506 reg1 = GetRegister(FU_REGONE);
510 return MalformedOpcode(0x08);
515 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
516 indexed = (*tok - KW_R0);
520 sy = lookup(string[tok[1]], LABEL, 0);
528 if (sy->sattre & EQUATEDREG)
530 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
531 && (*(tok + 2) != ')'))
533 indexed = (sy->svalue & 0x1F);
541 reg2 = GetRegister(FU_REGTWO);
551 parm = (WORD)(reg2 - 14 + 60);
554 if (*tok >= KW_R0 && *tok <= KW_R31)
559 sy = lookup(string[tok[1]], LABEL, 0);
567 if (sy->sattre & EQUATEDREG)
573 reg2 = GetRegister(FU_REGTWO);
577 if (expr(r_expr, &eval, &eattr, &esym) != OK)
578 return MalformedOpcode(0x09);
580 if ((challoc - ch_size) < 4)
583 if (!(eattr & DEFINED))
585 AddFixup(FU_WORD | FU_REGTWO, sloc, r_expr);
594 reg2 = 14 + (parm - 60);
596 warn("NULL offset in STORE ignored");
600 if (reg2 < 1 || reg2 > 32)
601 return error("constant in STORE out of range");
606 parm = (WORD)(parm - 60 + 49);
613 reg2 = GetRegister(FU_REGTWO);
618 return MalformedOpcode(0x0A);
622 BuildRISCIntructionWord(parm, reg2, reg1);
625 // LOADB/LOADP/LOADW (Rn),Rn
628 return MalformedOpcode(0x0B);
631 reg1 = GetRegister(FU_REGONE);
634 return MalformedOpcode(0x0C);
638 reg2 = GetRegister(FU_REGTWO);
640 BuildRISCIntructionWord(parm, reg1, reg2);
643 // STOREB/STOREP/STOREW Rn,(Rn)
645 reg1 = GetRegister(FU_REGONE);
649 return MalformedOpcode(0x0D);
652 reg2 = GetRegister(FU_REGTWO);
655 return MalformedOpcode(0x0E);
659 BuildRISCIntructionWord(parm, reg2, reg1);
662 // Jump Relative - cc,n - n=-16..+15 words, reg2=cc
665 // Jump Absolute - cc,(Rs) - reg2=cc
667 // Check to see if there is a comma in the token string. If not then
668 // the JR or JUMP should default to 0, Jump Always
671 for(t=tok; *t!=EOL; t++)
684 // CC using a constant number
690 else if (*tok == SYMBOL)
693 // strcpy(scratch, (char *)tok[1]);
694 strcpy(scratch, string[tok[1]]);
697 for(i=0; i<MAXINTERNCC; i++)
699 // Look for the condition code & break if found
700 if (strcmp(condname[i], scratch) == 0)
707 // Standard CC was not found, look for an equated one
710 // ccsym = lookup((char *)tok[1], LABEL, 0);
711 ccsym = lookup(string[tok[1]], LABEL, 0);
713 if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
718 return error("unknown condition code");
724 else if (*tok == '(')
726 // Set CC to "Jump Always"
732 // Set CC to "Jump Always"
736 if (val < 0 || val > 31)
737 return error("condition constant out of range");
739 // Store condition code
745 if (expr(r_expr, &eval, &eattr, &esym) != OK)
746 return MalformedOpcode(0x0F);
748 if ((challoc - ch_size) < 4)
751 if (!(eattr & DEFINED))
753 AddFixup(FU_WORD | FU_JR, sloc, r_expr);
758 reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
760 if ((reg2 < -16) || (reg2 > 15))
761 error("PC relative overflow");
764 BuildRISCIntructionWord(parm, reg2, reg1);
770 return MalformedOpcode(0x10);
773 reg2 = GetRegister(FU_REGTWO);
776 return MalformedOpcode(0x11);
780 BuildRISCIntructionWord(parm, reg2, reg1);
785 // Should never get here :-D
787 return error("Unknown RISC opcode type");