2 // RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
3 // RISCA.C - GPU/DSP Assembler
4 // Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends
5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
6 // Source utilised with the kind permission of Landon Dyer
18 #define DEF_MR // Declare keyword values
19 #include "risckw.h" // Incl. generated risc keywords
21 #define DEF_KW // Declare keyword values
22 #include "kwtab.h" // Incl. generated keyword tables & defs
25 unsigned altbankok = 0; // Ok to use alternate register bank
26 unsigned orgactive = 0; // RISC org directive active
27 unsigned orgaddr = 0; // Org'd address
28 unsigned orgwarning = 0; // Has an ORG warning been issued
29 int lastOpcode = -1; // Last RISC opcode assembled
31 const char reg_err[] = "missing register R0...R31";
33 // Jaguar Jump Condition Names
34 const char condname[MAXINTERNCC][5] = {
35 "NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ",
36 "N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO",
40 // Jaguar Jump Condition Numbers
41 const char condnumber[] = {
42 1, 2, 4, 5, 6, 8, 9, 10, 20, 21, 22, 24, 25, 26,
43 0, 0, 1, 2, 4, 4, 5, 8, 8, 20, 24, 31
46 const struct opcoderecord roptbl[] = {
47 { MR_ADD, RI_TWO, 0 },
48 { MR_ADDC, RI_TWO, 1 },
49 { MR_ADDQ, RI_NUM_32, 2 },
50 { MR_ADDQT, RI_NUM_32, 3 },
51 { MR_SUB, RI_TWO, 4 },
52 { MR_SUBC, RI_TWO, 5 },
53 { MR_SUBQ, RI_NUM_32, 6 },
54 { MR_SUBQT, RI_NUM_32, 7 },
55 { MR_NEG, RI_ONE, 8 },
56 { MR_AND, RI_TWO, 9 },
57 { MR_OR, RI_TWO, 10 },
58 { MR_XOR, RI_TWO, 11 },
59 { MR_NOT, RI_ONE, 12 },
60 { MR_BTST, RI_NUM_31, 13 },
61 { MR_BSET, RI_NUM_31, 14 },
62 { MR_BCLR, RI_NUM_31, 15 },
63 { MR_MULT, RI_TWO, 16 },
64 { MR_IMULT, RI_TWO, 17 },
65 { MR_IMULTN, RI_TWO, 18 },
66 { MR_RESMAC, RI_ONE, 19 },
67 { MR_IMACN, RI_TWO, 20 },
68 { MR_DIV, RI_TWO, 21 },
69 { MR_ABS, RI_ONE, 22 },
70 { MR_SH, RI_TWO, 23 },
71 { MR_SHLQ, RI_NUM_32, 24 + SUB32 },
72 { MR_SHRQ, RI_NUM_32, 25 },
73 { MR_SHA, RI_TWO, 26 },
74 { MR_SHARQ, RI_NUM_32, 27 },
75 { MR_ROR, RI_TWO, 28 },
76 { MR_RORQ, RI_NUM_32, 29 },
77 { MR_ROLQ, RI_NUM_32, 29 + SUB32 },
78 { MR_CMP, RI_TWO, 30 },
79 { MR_CMPQ, RI_NUM_15, 31 },
80 { MR_SAT8, RI_ONE, 32 + GPUONLY },
81 { MR_SUBQMOD, RI_NUM_32, 32 + DSPONLY },
82 { MR_SAT16, RI_ONE, 33 + GPUONLY },
83 { MR_SAT16S, RI_ONE, 33 + DSPONLY },
84 { MR_MOVEQ, RI_NUM_31, 35 },
85 { MR_MOVETA, RI_TWO, 36 },
86 { MR_MOVEFA, RI_TWO, 37 },
87 { MR_MOVEI, RI_MOVEI, 38 },
88 { MR_LOADB, RI_LOADN, 39 },
89 { MR_LOADW, RI_LOADN, 40 },
90 { MR_LOADP, RI_LOADN, 42 + GPUONLY },
91 { MR_SAT32S, RI_ONE, 42 + DSPONLY },
92 { MR_STOREB, RI_STOREN, 45 },
93 { MR_STOREW, RI_STOREN, 46 },
94 { MR_STOREP, RI_STOREN, 48 + GPUONLY },
95 { MR_MIRROR, RI_ONE, 48 + DSPONLY },
96 { MR_JUMP, RI_JUMP, 52 },
98 { MR_MMULT, RI_TWO, 54 },
99 { MR_MTOI, RI_TWO, 55 },
100 { MR_NORMI, RI_TWO, 56 },
101 { MR_NOP, RI_NONE, 57 },
102 { MR_SAT24, RI_ONE, 62 },
103 { MR_UNPACK, RI_ONE, 63 + GPUONLY },
104 { MR_PACK, RI_ONE, 63 + GPUONLY },
105 { MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY },
106 { MR_MOVE, RI_MOVE, 0 },
107 { MR_LOAD, RI_LOAD, 0 },
108 { MR_STORE, RI_STORE, 0 }
113 // Convert a string to uppercase
115 void strtoupper(char * s)
123 // Function to return "malformed expression" error
124 // This is done mainly to remove a bunch of GOTO statements in the parser
126 static inline int MalformedOpcode(int signal)
129 sprintf(buf, "%02X", signal);
130 return errors("Malformed opcode [internal $%s]", buf);
135 // Build RISC instruction word
137 void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2)
139 // Check for absolute address setting
140 if (!orgwarning && !orgactive)
142 // warn("GPU/DSP code outside of absolute section");
143 warn("RISC code generated with no origin defined");
147 int value = ((opcode & 0x3F) << 10) + ((reg1 & 0x1F) << 5) + (reg2 & 0x1F);
153 // Get a RISC register
155 int GetRegister(WORD rattr)
157 VALUE eval; // Expression value
158 WORD eattr; // Expression attributes
159 SYM * esym; // External symbol involved in expr.
160 TOKEN r_expr[EXPRSIZE]; // Expression token list
162 // Evaluate what's in the global "tok" buffer
163 if (expr(r_expr, &eval, &eattr, &esym) != OK)
164 // Hmm, the evaluator should report the error to us...
165 // return MalformedOpcode(0x00);
168 if ((challoc - ch_size) < 4)
171 if (!(eattr & DEFINED))
173 AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr);
177 // If we got a register in range (0-31), return it
178 if ((eval >= 0) && (eval <= 31))
181 // Otherwise, it's out of range & we flag an error
182 return error(reg_err);
187 // Do RISC code generation
189 int GenerateRISCCode(int state)
191 int reg1; // Register 1
192 int reg2; // Register 2
193 int val = 0; // Constructed value
200 int indexed; // Indexed register flag
202 VALUE eval; // Expression value
203 WORD eattr; // Expression attributes
204 SYM * esym; // External symbol involved in expr.
205 TOKEN r_expr[EXPRSIZE]; // Expression token list
207 // Get opcode parameter and type
208 unsigned short parm = (WORD)(roptbl[state - 3000].parm);
209 unsigned type = roptbl[state - 3000].typ;
211 // Detect whether the opcode parmeter passed determines that the opcode is
212 // specific to only one of the RISC processors and ensure it is legal in
213 // the current code section. If not then show error and return.
214 if (((parm & GPUONLY) && rdsp) || ((parm & DSPONLY) && rgpu))
215 return error("Opcode is not valid in this code section");
217 // Process RISC opcode
220 // No operand instructions
223 BuildRISCIntructionWord(parm, 0, 0);
226 // Single operand instructions (Rd)
227 // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S, UNPACK
229 reg2 = GetRegister(FU_REGTWO);
231 BuildRISCIntructionWord(parm, parm >> 6, reg2);
234 // Two operand instructions (Rs,Rd)
235 // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT, MMULT,
236 // MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
239 altbankok = 1; // MOVEFA
241 reg1 = GetRegister(FU_REGONE);
245 altbankok = 1; // MOVETA
247 reg2 = GetRegister(FU_REGTWO);
249 BuildRISCIntructionWord(parm, reg1, reg2);
252 // Numeric operand (n,Rd) where n = -16..+15
256 // Numeric operand (n,Rd) where n = 0..31
257 // BCLR, BSET, BTST, MOVEQ
260 // Numeric operand (n,Rd) where n = 1..32
261 // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ, RORQ
266 reg1 = -16; reg2 = 15; attrflg = FU_NUM15;
270 reg1 = 0; reg2 = 31; attrflg = FU_NUM31;
273 reg1 = 1; reg2 = 32; attrflg = FU_NUM32;
281 return MalformedOpcode(0x01);
285 if (expr(r_expr, &eval, &eattr, &esym) != OK)
286 return MalformedOpcode(0x02);
288 if ((challoc - ch_size) < 4)
291 if (!(eattr & DEFINED))
293 AddFixup((WORD)(FU_WORD | attrflg), sloc, r_expr);
298 if ((int)eval < reg1 || (int)eval > reg2)
299 return error("constant out of range");
303 else if (type == RI_NUM_32)
304 reg1 = (reg1 == 32 ? 0 : eval);
310 reg2 = GetRegister(FU_REGTWO);
312 BuildRISCIntructionWord(parm, reg1, reg2);
315 // Move Immediate--n,Rn--n in Second Word
318 return MalformedOpcode(0x03);
322 if (expr(r_expr, &eval, &eattr, &esym) != OK)
323 return MalformedOpcode(0x04);
325 if (lastOpcode == RI_JUMP || lastOpcode == RI_JR)
329 // User doesn't care, emit a NOP to fix
330 BuildRISCIntructionWord(57, 0, 0);
331 warn("MOVEI following JUMP, inserting NOP to fix your BROKEN CODE");
334 warn("MOVEI immediately follows JUMP");
337 if ((challoc - ch_size) < 4)
340 if (!(eattr & DEFINED))
342 AddFixup(FU_LONG | FU_MOVEI, sloc + 2, r_expr);
349 //printf("risca: Doing rmark for RI_MOVEI (tdb=$%X)...\n", eattr & TDB);
350 rmark(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
354 val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000);
356 reg2 = GetRegister(FU_REGTWO);
358 D_word((((parm & 0x3F) << 10) + reg2));
373 reg1 = GetRegister(FU_REGONE);
377 reg2 = GetRegister(FU_REGTWO);
379 BuildRISCIntructionWord(parm, reg1, reg2);
382 // (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59
388 return MalformedOpcode(0x05);
392 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
393 indexed = (*tok - KW_R0);
397 // sy = lookup((char *)tok[1], LABEL, 0);
398 sy = lookup(string[tok[1]], LABEL, 0);
406 if (sy->sattre & EQUATEDREG)
408 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
409 && (*(tok + 2) != ')'))
411 indexed = (sy->svalue & 0x1F);
419 reg1 = GetRegister(FU_REGONE);
429 parm = (WORD)(reg1 - 14 + 58);
432 if (*tok >= KW_R0 && *tok <= KW_R31)
437 // sy = lookup((char *)tok[1], LABEL, 0);
438 sy = lookup(string[tok[1]], LABEL, 0);
446 if (sy->sattre & EQUATEDREG)
452 reg1 = GetRegister(FU_REGONE);
456 if (expr(r_expr, &eval, &eattr, &esym) != OK)
457 return MalformedOpcode(0x06);
459 if ((challoc - ch_size) < 4)
462 if (!(eattr & DEFINED))
463 return error("constant expected after '+'");
469 reg1 = 14 + (parm - 58);
471 warn("NULL offset in LOAD ignored");
475 if (reg1 < 1 || reg1 > 32)
476 return error("constant in LOAD out of range");
481 parm = (WORD)(parm - 58 + 43);
487 reg1 = GetRegister(FU_REGONE);
492 return MalformedOpcode(0x07);
496 reg2 = GetRegister(FU_REGTWO);
498 BuildRISCIntructionWord(parm, reg1, reg2);
501 // Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61
504 reg1 = GetRegister(FU_REGONE);
508 return MalformedOpcode(0x08);
513 if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
514 indexed = (*tok - KW_R0);
518 sy = lookup(string[tok[1]], LABEL, 0);
526 if (sy->sattre & EQUATEDREG)
528 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
529 && (*(tok + 2) != ')'))
531 indexed = (sy->svalue & 0x1F);
539 reg2 = GetRegister(FU_REGTWO);
549 parm = (WORD)(reg2 - 14 + 60);
552 if (*tok >= KW_R0 && *tok <= KW_R31)
557 sy = lookup(string[tok[1]], LABEL, 0);
565 if (sy->sattre & EQUATEDREG)
571 reg2 = GetRegister(FU_REGTWO);
575 if (expr(r_expr, &eval, &eattr, &esym) != OK)
576 return MalformedOpcode(0x09);
578 if ((challoc - ch_size) < 4)
581 if (!(eattr & DEFINED))
583 AddFixup(FU_WORD | FU_REGTWO, sloc, r_expr);
592 reg2 = 14 + (parm - 60);
594 warn("NULL offset in STORE ignored");
598 if (reg2 < 1 || reg2 > 32)
599 return error("constant in STORE out of range");
604 parm = (WORD)(parm - 60 + 49);
611 reg2 = GetRegister(FU_REGTWO);
616 return MalformedOpcode(0x0A);
620 BuildRISCIntructionWord(parm, reg2, reg1);
623 // LOADB/LOADP/LOADW (Rn),Rn
626 return MalformedOpcode(0x0B);
629 reg1 = GetRegister(FU_REGONE);
632 return MalformedOpcode(0x0C);
636 reg2 = GetRegister(FU_REGTWO);
638 BuildRISCIntructionWord(parm, reg1, reg2);
641 // STOREB/STOREP/STOREW Rn,(Rn)
643 reg1 = GetRegister(FU_REGONE);
647 return MalformedOpcode(0x0D);
650 reg2 = GetRegister(FU_REGTWO);
653 return MalformedOpcode(0x0E);
657 BuildRISCIntructionWord(parm, reg2, reg1);
660 // Jump Relative - cc,n - n=-16..+15 words, reg2=cc
663 // Jump Absolute - cc,(Rs) - reg2=cc
665 // Check to see if there is a comma in the token string. If not then
666 // the JR or JUMP should default to 0, Jump Always
669 for(t=tok; *t!=EOL; t++)
682 // CC using a constant number
688 else if (*tok == SYMBOL)
691 // strcpy(scratch, (char *)tok[1]);
692 strcpy(scratch, string[tok[1]]);
695 for(i=0; i<MAXINTERNCC; i++)
697 // Look for the condition code & break if found
698 if (strcmp(condname[i], scratch) == 0)
705 // Standard CC was not found, look for an equated one
708 // ccsym = lookup((char *)tok[1], LABEL, 0);
709 ccsym = lookup(string[tok[1]], LABEL, 0);
711 if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
716 return error("unknown condition code");
722 else if (*tok == '(')
724 // Set CC to "Jump Always"
730 // Set CC to "Jump Always"
734 if (val < 0 || val > 31)
735 return error("condition constant out of range");
737 // Store condition code
743 if (expr(r_expr, &eval, &eattr, &esym) != OK)
744 return MalformedOpcode(0x0F);
746 if ((challoc - ch_size) < 4)
749 if (!(eattr & DEFINED))
751 AddFixup(FU_WORD | FU_JR, sloc, r_expr);
756 reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
758 if ((reg2 < -16) || (reg2 > 15))
759 error("PC relative overflow");
762 BuildRISCIntructionWord(parm, reg2, reg1);
768 return MalformedOpcode(0x10);
771 reg2 = GetRegister(FU_REGTWO);
774 return MalformedOpcode(0x11);
778 BuildRISCIntructionWord(parm, reg2, reg1);
783 // Should never get here :-D
785 return error("Unknown RISC opcode type");