Shamusworld >> Repos - rmac/blob - riscasm.c

   1 //
   2 // RMAC - Reboot's Macro Assembler for all Atari computers
   3 // RISCA.C - GPU/DSP Assembler
   4 // Copyright (C) 199x Landon Dyer, 2011-2018 Reboot and Friends
   5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
   6 // Source utilised with the kind permission of Landon Dyer
   7 //
   8
   9 #include "riscasm.h"
  10 #include "amode.h"
  11 #include "direct.h"
  12 #include "error.h"
  13 #include "expr.h"
  14 #include "mark.h"
  15 #include "procln.h"
  16 #include "rmac.h"
  17 #include "sect.h"
  18 #include "token.h"
  19
  20 #define DEF_MR                          // Declare keyword values
  21 #include "risckw.h"                     // Incl. generated risc keywords
  22
  23 #define DEF_KW                          // Declare keyword values
  24 #include "kwtab.h"                      // Incl. generated keyword tables & defs
  25
  26 #define MAXINTERNCC 26          // Maximum internal condition codes
  27
  28
  29 unsigned altbankok = 0;         // Ok to use alternate register bank
  30 unsigned orgactive = 0;         // RISC/6502 org directive active
  31 unsigned orgaddr = 0;           // Org'd address
  32 unsigned orgwarning = 0;        // Has an ORG warning been issued
  33 int lastOpcode = -1;            // Last RISC opcode assembled
  34 uint8_t riscImmTokenSeen;       // The '#' (immediate) token was seen
  35
  36 static const char reg_err[] = "missing register R0...R31";
  37
  38 // Jaguar jump condition names
  39 static const char condname[MAXINTERNCC][5] = {
  40         "NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ",
  41         "N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO",
  42         "PL", "MI", "F"
  43 };
  44
  45 // Jaguar jump condition numbers
  46 static const char condnumber[] = {
  47         1, 2, 4, 5, 6, 8, 9, 10, 20, 21, 22, 24, 25, 26,
  48         0, 0, 1, 2, 4, 4, 5,  8,  8, 20, 24, 31
  49 };
  50
  51 // Opcode Specific Data
  52 struct opcoderecord {
  53         uint16_t state;         // Opcode Name (unused)
  54         uint16_t type;          // Opcode Type
  55         uint16_t param;         // Opcode Parameter
  56 };
  57
  58 static const struct opcoderecord roptbl[] = {
  59         { MR_ADD,     RI_TWO,    0 },
  60         { MR_ADDC,    RI_TWO,    1 },
  61         { MR_ADDQ,    RI_NUM_32, 2 },
  62         { MR_ADDQT,   RI_NUM_32, 3 },
  63         { MR_SUB,     RI_TWO,    4 },
  64         { MR_SUBC,    RI_TWO,    5 },
  65         { MR_SUBQ,    RI_NUM_32, 6 },
  66         { MR_SUBQT,   RI_NUM_32, 7 },
  67         { MR_NEG,     RI_ONE,    8 },
  68         { MR_AND,     RI_TWO,    9 },
  69         { MR_OR,      RI_TWO,    10 },
  70         { MR_XOR,     RI_TWO,    11 },
  71         { MR_NOT,     RI_ONE,    12 },
  72         { MR_BTST,    RI_NUM_31, 13 },
  73         { MR_BSET,    RI_NUM_31, 14 },
  74         { MR_BCLR,    RI_NUM_31, 15 },
  75         { MR_MULT,    RI_TWO,    16 },
  76         { MR_IMULT,   RI_TWO,    17 },
  77         { MR_IMULTN,  RI_TWO,    18 },
  78         { MR_RESMAC,  RI_ONE,    19 },
  79         { MR_IMACN,   RI_TWO,    20 },
  80         { MR_DIV,     RI_TWO,    21 },
  81         { MR_ABS,     RI_ONE,    22 },
  82         { MR_SH,      RI_TWO,    23 },
  83         { MR_SHLQ,    RI_NUM_32, 24 + SUB32 },
  84         { MR_SHRQ,    RI_NUM_32, 25 },
  85         { MR_SHA,     RI_TWO,    26 },
  86         { MR_SHARQ,   RI_NUM_32, 27 },
  87         { MR_ROR,     RI_TWO,    28 },
  88         { MR_RORQ,    RI_NUM_32, 29 },
  89         { MR_ROLQ,    RI_NUM_32, 29 + SUB32 },
  90         { MR_CMP,     RI_TWO,    30 },
  91         { MR_CMPQ,    RI_NUM_15, 31 },
  92         { MR_SAT8,    RI_ONE,    32 + GPUONLY },
  93         { MR_SUBQMOD, RI_NUM_32, 32 + DSPONLY },
  94         { MR_SAT16,   RI_ONE,    33 + GPUONLY },
  95         { MR_SAT16S,  RI_ONE,    33 + DSPONLY },
  96         { MR_MOVEQ,   RI_NUM_31, 35 },
  97         { MR_MOVETA,  RI_TWO,    36 },
  98         { MR_MOVEFA,  RI_TWO,    37 },
  99         { MR_MOVEI,   RI_MOVEI,  38 },
 100         { MR_LOADB,   RI_LOADN,  39 },
 101         { MR_LOADW,   RI_LOADN,  40 },
 102         { MR_LOADP,   RI_LOADN,  42 + GPUONLY },
 103         { MR_SAT32S,  RI_ONE,    42 + DSPONLY },
 104         { MR_STOREB,  RI_STOREN, 45 },
 105         { MR_STOREW,  RI_STOREN, 46 },
 106         { MR_STOREP,  RI_STOREN, 48 + GPUONLY },
 107         { MR_MIRROR,  RI_ONE,    48 + DSPONLY },
 108         { MR_JUMP,    RI_JUMP,   52 },
 109         { MR_JR,      RI_JR,     53 },
 110         { MR_MMULT,   RI_TWO,    54 },
 111         { MR_MTOI,    RI_TWO,    55 },
 112         { MR_NORMI,   RI_TWO,    56 },
 113         { MR_NOP,     RI_NONE,   57 },
 114         { MR_SAT24,   RI_ONE,    62 },
 115         { MR_UNPACK,  RI_ONE,    63 + GPUONLY | (0 << 6) },
 116         { MR_PACK,    RI_ONE,    63 + GPUONLY | (1 << 6) },
 117         { MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY },
 118         { MR_MOVE,    RI_MOVE,   0 },
 119         { MR_LOAD,    RI_LOAD,   0 },
 120         { MR_STORE,   RI_STORE,  0 }
 121 };
 122
 123 #define MALF_NUM                0
 124 #define MALF_EXPR               1
 125 #define MALF_LPAREN             2
 126 #define MALF_RPAREN             3
 127
 128 static const char malform1[] = "missing '#'";
 129 static const char malform2[] = "bad expression";
 130 static const char malform3[] = "missing ')'";
 131 static const char malform4[] = "missing '('";
 132
 133 static const char * malformErr[] = {
 134         malform1, malform2, malform3, malform4
 135 };
 136
 137
 138 //
 139 // Function to return "malformed expression" error
 140 // This is done mainly to remove a bunch of GOTO statements in the parser
 141 //
 142 static inline int MalformedOpcode(int signal)
 143 {
 144         return error("Malformed opcode, %s", malformErr[signal]);
 145 }
 146
 147
 148 //
 149 // Function to return "Illegal Indexed Register" error
 150 // Anyone trying to index something other than R14 or R15
 151 //
 152 static inline int IllegalIndexedRegister(int reg)
 153 {
 154         return error("Attempted index reference with non-indexable register (r%d)", reg - KW_R0);
 155 }
 156
 157
 158 //
 159 // Function to return "Illegal Indexed Register" error for EQUR scenarios
 160 // Trying to use register value within EQUR that isn't 14 or 15
 161 //
 162 static inline int IllegalIndexedRegisterEqur(SYM * sy)
 163 {
 164         return error("Attempted index reference with non-indexable register within EQUR (%s = r%d)", sy->sname, sy->svalue);
 165 }
 166
 167
 168 //
 169 // Build up & deposit RISC instruction word
 170 //
 171 static void DepositRISCInstructionWord(uint16_t opcode, int reg1, int reg2)
 172 {
 173         // Check for absolute address setting
 174         if (!orgwarning && !orgactive)
 175         {
 176                 warn("RISC code generated with no origin defined");
 177                 orgwarning = 1;
 178         }
 179
 180         int value = ((opcode & 0x3F) << 10) + ((reg1 & 0x1F) << 5) + (reg2 & 0x1F);
 181         D_word(value);
 182 }
 183
 184
 185 //
 186 // Evaluate the RISC register from the token stream. Passed in value is the
 187 // FIXUP attribute to use if the expression comes back as undefined.
 188 //
 189 static int EvaluateRegisterFromTokenStream(uint32_t attr)
 190 {
 191         uint64_t eval;                          // Expression value
 192         WORD eattr;                                     // Expression attributes
 193         SYM * esym;                                     // External symbol involved in expr.
 194         TOKEN r_expr[EXPRSIZE];         // Expression token list
 195
 196         // Evaluate what's in the global "tok" buffer
 197         if (expr(r_expr, &eval, &eattr, &esym) != OK)
 198                 return ERROR;
 199
 200         if (!(eattr & DEFINED))
 201         {
 202                 AddFixup(FU_WORD | attr, sloc, r_expr);
 203                 return 0;
 204         }
 205
 206         // If we got a register in range (0-31), return it
 207         if (eval <= 31)
 208                 return (int)eval;
 209
 210         // Otherwise, it's out of range & we flag an error
 211         return error(reg_err);
 212 }
 213
 214
 215 //
 216 // Do RISC code generation
 217 //
 218 int GenerateRISCCode(int state)
 219 {
 220         int reg1;                                       // Register 1
 221         int reg2;                                       // Register 2
 222         int val = 0;                            // Constructed value
 223         char scratch[80];
 224         SYM * ccsym;
 225         SYM * sy;
 226         int i, commaFound;
 227         TOKEN * t;
 228         uint16_t attrflg;
 229         int indexed;                            // Indexed register flag
 230
 231         uint64_t eval;                          // Expression value
 232         uint16_t eattr;                                 // Expression attributes
 233         SYM * esym;                                     // External symbol involved in expr.
 234         TOKEN r_expr[EXPRSIZE];         // Expression token list
 235
 236         // Get opcode parameter and type
 237         uint16_t parm = roptbl[state - 3000].param;
 238         uint16_t type = roptbl[state - 3000].type;
 239         riscImmTokenSeen = 0;           // Set to "token not seen yet"
 240
 241         // Detect whether the opcode parmeter passed determines that the opcode is
 242         // specific to only one of the RISC processors and ensure it is legal in
 243         // the current code section. If not then show error and return.
 244         if (((parm & GPUONLY) && rdsp) || ((parm & DSPONLY) && rgpu))
 245                 return error("Opcode is not valid in this code section");
 246
 247         // Process RISC opcode
 248         switch (type)
 249         {
 250         // No operand instructions
 251         // NOP (57)
 252         case RI_NONE:
 253                 DepositRISCInstructionWord(parm, 0, 0);
 254                 break;
 255
 256         // Single operand instructions (Rd)
 257         // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S,
 258         // UNPACK
 259         case RI_ONE:
 260                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 261                 at_eol();
 262                 DepositRISCInstructionWord(parm, parm >> 6, reg2);
 263                 break;
 264
 265         // Two operand instructions (Rs,Rd)
 266         // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT,
 267         // MMULT, MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
 268         case RI_TWO:
 269                 if (parm == 37)
 270                         altbankok = 1;                      // MOVEFA
 271
 272                 reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 273                 CHECK_COMMA;
 274
 275                 if (parm == 36)
 276                         altbankok = 1;                      // MOVETA
 277
 278                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 279                 at_eol();
 280                 DepositRISCInstructionWord(parm, reg1, reg2);
 281                 break;
 282
 283         // Numeric operand (n,Rd) where n = -16..+15
 284         // CMPQ
 285         case RI_NUM_15:
 286
 287         // Numeric operand (n,Rd) where n = 0..31
 288         // BCLR, BSET, BTST, MOVEQ
 289         case RI_NUM_31:
 290
 291         // Numeric operand (n,Rd) where n = 1..32
 292         // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ,
 293         // RORQ
 294         case RI_NUM_32:
 295                 switch (type)
 296                 {
 297                 case RI_NUM_15:
 298                         reg1 = -16; reg2 = 15; attrflg = FU_NUM15;
 299                         break;
 300                 default:
 301                 case RI_NUM_31:
 302                         reg1 =   0; reg2 = 31; attrflg = FU_NUM31;
 303                         break;
 304                 case RI_NUM_32:
 305                         reg1 =   1; reg2 = 32; attrflg = FU_NUM32;
 306                         break;
 307                 }
 308
 309                 if (parm & SUB32)
 310                         attrflg |= FU_SUB32;
 311
 312                 if (*tok != '#')
 313                         return MalformedOpcode(MALF_NUM);
 314
 315                 tok++;
 316                 riscImmTokenSeen = 1;
 317
 318                 if (expr(r_expr, &eval, &eattr, &esym) != OK)
 319                         return MalformedOpcode(MALF_EXPR);
 320
 321                 if (!(eattr & DEFINED))
 322                 {
 323                         AddFixup((WORD)(FU_WORD | attrflg), sloc, r_expr);
 324                         reg1 = 0;
 325                 }
 326                 else
 327                 {
 328                         if (((int)eval < reg1) || ((int)eval > reg2))
 329                                 return error("constant out of range (%d to %d", reg1, reg2);
 330
 331                         if (parm & SUB32)
 332                                 reg1 = 32 - (int)eval;
 333                         else if (type == RI_NUM_32)
 334                                 reg1 = (reg1 == 32 ? 0 : (int)eval);
 335                         else
 336                                 reg1 = (int)eval;
 337                 }
 338
 339                 CHECK_COMMA;
 340                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 341                 at_eol();
 342                 DepositRISCInstructionWord(parm, reg1, reg2);
 343                 break;
 344
 345         // Move Immediate--n,Rn--n in Second Word
 346         case RI_MOVEI:
 347                 if (*tok != '#')
 348                         return MalformedOpcode(MALF_NUM);
 349
 350                 tok++;
 351                 riscImmTokenSeen = 1;
 352
 353                 // Check for equated register after # and return error if so
 354                 if (*tok == SYMBOL)
 355                 {
 356                         sy = lookup(string[tok[1]], LABEL, 0);
 357
 358                         if (sy && (sy->sattre & EQUATEDREG))
 359                                 return error("equated register in 1st operand of MOVEI instruction");
 360                 }
 361
 362                 if (expr(r_expr, &eval, &eattr, &esym) != OK)
 363                         return MalformedOpcode(MALF_EXPR);
 364
 365                 if ((lastOpcode == RI_JUMP) || (lastOpcode == RI_JR))
 366                 {
 367                         if (legacy_flag)
 368                         {
 369                                 // User doesn't care, emit a NOP to fix
 370                                 DepositRISCInstructionWord(57, 0, 0);
 371                                 warn("MOVEI following JUMP, inserting NOP to fix your BROKEN CODE");
 372                         }
 373                         else
 374                                 warn("MOVEI immediately follows JUMP");
 375                 }
 376
 377                 if (!(eattr & DEFINED))
 378                 {
 379                         AddFixup(FU_LONG | FU_MOVEI, sloc + 2, r_expr);
 380                         eval = 0;
 381                 }
 382                 else
 383                 {
 384                         if (eattr & TDB)
 385                                 MarkRelocatable(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
 386                 }
 387
 388                 CHECK_COMMA;
 389                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 390                 at_eol();
 391
 392                 DepositRISCInstructionWord(parm, 0, reg2);
 393                 val = WORDSWAP32(eval);
 394                 D_long(val);
 395                 break;
 396
 397         // PC,Rd or Rs,Rd
 398         case RI_MOVE:
 399                 if (*tok == KW_PC)
 400                 {
 401                         parm = 51;
 402                         reg1 = 0;
 403                         tok++;
 404                 }
 405                 else
 406                 {
 407                         parm = 34;
 408                         reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 409                 }
 410
 411                 CHECK_COMMA;
 412                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 413                 at_eol();
 414                 DepositRISCInstructionWord(parm, reg1, reg2);
 415                 break;
 416
 417         // (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59
 418         case RI_LOAD:
 419                 indexed = 0;
 420                 parm = 41;
 421
 422                 if (*tok != '(')
 423                         return MalformedOpcode(MALF_LPAREN);
 424
 425                 tok++;
 426
 427         if ((tok[1] == '+') || (tok[1] == '-'))
 428                 {
 429                         // Trying to make indexed call
 430                         if ((*tok == KW_R14) || (*tok == KW_R15))
 431                                 indexed = (*tok - KW_R0);
 432                         else
 433                                 return IllegalIndexedRegister(*tok);
 434                 }
 435
 436                 if (*tok == SYMBOL)
 437                 {
 438                         sy = lookup(string[tok[1]], LABEL, 0);
 439
 440                         if (!sy)
 441                         {
 442                                 error(reg_err);
 443                                 return ERROR;
 444                         }
 445
 446                         if (sy->sattre & EQUATEDREG)
 447                         {
 448                                 if ((tok[2] == '+') || (tok[2] == '-'))
 449                                 {
 450                                         if ((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) {
 451                                                 indexed = (sy->svalue & 0x1F);
 452                                                 tok++;
 453                                         }
 454                                         else
 455                                                 return IllegalIndexedRegisterEqur(sy);
 456                                 }
 457                         }
 458                 }
 459
 460                 if (!indexed)
 461                 {
 462                         reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 463                 }
 464                 else
 465                 {
 466                         reg1 = indexed;
 467                         indexed = 0;
 468                         tok++;
 469
 470                         if (*tok == '+')
 471                         {
 472                                 parm = (WORD)(reg1 - 14 + 58);
 473                                 tok++;
 474
 475                                 if ((*tok >= KW_R0) && (*tok <= KW_R31))
 476                                         indexed = 1;
 477
 478                                 if (*tok == SYMBOL)
 479                                 {
 480                                         sy = lookup(string[tok[1]], LABEL, 0);
 481
 482                                         if (!sy)
 483                                         {
 484                                                 error(reg_err);
 485                                                 return ERROR;
 486                                         }
 487
 488                                         if (sy->sattre & EQUATEDREG)
 489                                                 indexed = 1;
 490                                 }
 491
 492                                 if (indexed)
 493                                 {
 494                                         reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 495                                 }
 496                                 else
 497                                 {
 498                                         if (expr(r_expr, &eval, &eattr, &esym) != OK)
 499                                                 return MalformedOpcode(MALF_EXPR);
 500
 501                                         if (!(eattr & DEFINED))
 502                                                 return error("constant expected after '+'");
 503
 504                                         reg1 = (int)eval;
 505
 506                                         if (reg1 == 0)
 507                                         {
 508                                                 reg1 = 14 + (parm - 58);
 509                                                 parm = 41;
 510                                                 warn("NULL offset in LOAD ignored");
 511                                         }
 512                                         else
 513                                         {
 514                                                 if ((reg1 < 1) || (reg1 > 32))
 515                                                         return error("constant in LOAD out of range (1-32)");
 516
 517                                                 if (reg1 == 32)
 518                                                         reg1 = 0;
 519
 520                                                 parm = (WORD)(parm - 58 + 43);
 521                                         }
 522                                 }
 523                         }
 524                         else
 525                         {
 526                                 reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 527                         }
 528                 }
 529
 530                 if (*tok != ')')
 531                         return MalformedOpcode(MALF_RPAREN);
 532
 533                 tok++;
 534                 CHECK_COMMA;
 535                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 536                 at_eol();
 537                 DepositRISCInstructionWord(parm, reg1, reg2);
 538                 break;
 539
 540         // Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61
 541         case RI_STORE:
 542                 parm = 47;
 543                 reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 544                 CHECK_COMMA;
 545
 546                 if (*tok != '(')
 547                         return MalformedOpcode(MALF_LPAREN);
 548
 549                 tok++;
 550                 indexed = 0;
 551
 552                 if (((*tok == KW_R14) || (*tok == KW_R15)) && (tok[1] != ')'))
 553                         indexed = *tok - KW_R0;
 554
 555                 if (*tok == SYMBOL)
 556                 {
 557                         sy = lookup(string[tok[1]], LABEL, 0);
 558
 559                         if (!sy)
 560                         {
 561                                 error(reg_err);
 562                                 return ERROR;
 563                         }
 564
 565                         if (sy->sattre & EQUATEDREG)
 566                         {
 567                                 if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
 568                                         && (tok[2] != ')'))
 569                                 {
 570                                         indexed = (sy->svalue & 0x1F);
 571                                         tok++;
 572                                 }
 573                         }
 574                 }
 575
 576                 if (!indexed)
 577                 {
 578                         reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 579                 }
 580                 else
 581                 {
 582                         reg2 = indexed;
 583                         indexed = 0;
 584                         tok++;
 585
 586                         if (*tok == '+')
 587                         {
 588                                 parm = (WORD)(reg2 - 14 + 60);
 589                                 tok++;
 590
 591                                 if ((*tok >= KW_R0) && (*tok <= KW_R31))
 592                                         indexed = 1;
 593
 594                                 if (*tok == SYMBOL)
 595                                 {
 596                                         sy = lookup(string[tok[1]], LABEL, 0);
 597
 598                                         if (!sy)
 599                                         {
 600                                                 error(reg_err);
 601                                                 return ERROR;
 602                                         }
 603
 604                                         if (sy->sattre & EQUATEDREG)
 605                                                 indexed = 1;
 606                                 }
 607
 608                                 if (indexed)
 609                                 {
 610                                         reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 611                                 }
 612                                 else
 613                                 {
 614                                         if (expr(r_expr, &eval, &eattr, &esym) != OK)
 615                                                 return MalformedOpcode(MALF_EXPR);
 616
 617                                         if (!(eattr & DEFINED))
 618                                         {
 619                                                 AddFixup(FU_WORD | FU_REGTWO, sloc, r_expr);
 620                                                 reg2 = 0;
 621                                         }
 622                                         else
 623                                         {
 624                                                 reg2 = (int)eval;
 625
 626                                                 if (reg2 == 0)
 627                                                 {
 628                                                         reg2 = 14 + (parm - 60);
 629                                                         parm = 47;
 630                                                         warn("NULL offset in STORE ignored");
 631                                                 }
 632                                                 else
 633                                                 {
 634                                                         if ((reg2 < 1) || (reg2 > 32))
 635                                                                 return error("constant in STORE out of range (1-32)");
 636
 637                                                         if (reg2 == 32)
 638                                                                 reg2 = 0;
 639
 640                                                         parm = (WORD)(parm - 60 + 49);
 641                                                 }
 642                                         }
 643                                 }
 644                         }
 645                         else
 646                         {
 647                                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 648                         }
 649                 }
 650
 651                 if (*tok != ')')
 652                         return MalformedOpcode(MALF_RPAREN);
 653
 654                 tok++;
 655                 at_eol();
 656                 DepositRISCInstructionWord(parm, reg2, reg1);
 657                 break;
 658
 659         // LOADB/LOADP/LOADW (Rn),Rn
 660         case RI_LOADN:
 661                 if (*tok != '(')
 662                         return MalformedOpcode(MALF_LPAREN);
 663
 664                 tok++;
 665                 reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 666
 667                 if (*tok != ')')
 668                         return MalformedOpcode(MALF_RPAREN);
 669
 670                 tok++;
 671                 CHECK_COMMA;
 672                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 673                 at_eol();
 674                 DepositRISCInstructionWord(parm, reg1, reg2);
 675                 break;
 676
 677         // STOREB/STOREP/STOREW Rn,(Rn)
 678         case RI_STOREN:
 679                 reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
 680                 CHECK_COMMA;
 681
 682                 if (*tok != '(')
 683                         return MalformedOpcode(MALF_LPAREN);
 684
 685                 tok++;
 686                 reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 687
 688                 if (*tok != ')')
 689                         return MalformedOpcode(MALF_RPAREN);
 690
 691                 tok++;
 692                 at_eol();
 693                 DepositRISCInstructionWord(parm, reg2, reg1);
 694                 break;
 695
 696         // Jump Relative - cc,n - n=-16..+15 words, reg2=cc
 697         case RI_JR:
 698
 699         // Jump Absolute - cc,(Rs) - reg2=cc
 700         case RI_JUMP:
 701                 // Check to see if there is a comma in the token string. If not then
 702                 // the JR or JUMP should default to 0, Jump Always
 703                 commaFound = 0;
 704
 705                 for(t=tok; *t!=EOL; t++)
 706                 {
 707                         if (*t == ',')
 708                         {
 709                                 commaFound = 1;
 710                                 break;
 711                         }
 712                 }
 713
 714                 if (commaFound)
 715                 {
 716                         if (*tok == CONST)
 717                         {
 718                                 // CC using a constant number (O_o)
 719                                 PTR tp;
 720                                 tp.tk = tok + 1;
 721                                 val = *tp.i64++;
 722                                 tok = tp.tk;
 723                                 CHECK_COMMA;
 724                         }
 725                         else if (*tok == SYMBOL)
 726                         {
 727                                 val = 9999;
 728                                 strcpy(scratch, string[tok[1]]);
 729                                 strtoupper(scratch);
 730
 731                                 for(i=0; i<MAXINTERNCC; i++)
 732                                 {
 733                                         // Look for the condition code & break if found
 734                                         if (strcmp(condname[i], scratch) == 0)
 735                                         {
 736                                                 val = condnumber[i];
 737                                                 break;
 738                                         }
 739                                 }
 740
 741                                 // Standard CC was not found, look for an equated one
 742                                 if (val == 9999)
 743                                 {
 744                                         ccsym = lookup(string[tok[1]], LABEL, 0);
 745
 746                                         if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
 747                                                 val = (int)ccsym->svalue;
 748                                         else
 749                                                 return error("unknown condition code");
 750                                 }
 751
 752                                 tok += 2;
 753                                 CHECK_COMMA;
 754                         }
 755                         else if (*tok == '(')
 756                         {
 757                                 // Set CC to "Jump Always"
 758                                 val = 0;
 759                         }
 760                 }
 761                 else
 762                 {
 763                         // Set CC to "Jump Always"
 764                         val = 0;
 765                 }
 766
 767                 if ((val < 0) || (val > 31))
 768                         return error("condition constant out of range");
 769
 770                 // Store condition code
 771                 reg1 = val;
 772
 773                 if (type == RI_JR)
 774                 {
 775                         // JR cc,n
 776                         if (expr(r_expr, &eval, &eattr, &esym) != OK)
 777                                 return MalformedOpcode(MALF_EXPR);
 778
 779                         if (!(eattr & DEFINED))
 780                         {
 781                                 AddFixup(FU_WORD | FU_JR, sloc, r_expr);
 782                                 reg2 = 0;
 783                         }
 784                         else
 785                         {
 786                                 reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
 787
 788                                 if ((reg2 < -16) || (reg2 > 15))
 789                                         error("PC relative overflow in JR (outside of -16 to 15)");
 790                         }
 791                 }
 792                 else
 793                 {
 794                         // JUMP cc, (Rn)
 795                         if (*tok != '(')
 796                                 return MalformedOpcode(MALF_LPAREN);
 797
 798                         tok++;
 799                         reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
 800
 801                         if (*tok != ')')
 802                                 return MalformedOpcode(MALF_RPAREN);
 803
 804                         tok++;
 805                         at_eol();
 806                 }
 807
 808                 DepositRISCInstructionWord(parm, reg2, reg1);
 809                 break;
 810
 811         // We should never get here. If we do, somebody done fucked up. :-D
 812         default:
 813                 return error("Unknown RISC opcode type");
 814         }
 815
 816         lastOpcode = type;
 817         return 0;
 818 }
 819