-// Virtual 6809B v1.2P (Last build: 5/30/1998)
-// Protected mode version
-//
-// by James L. Hammons
-//
-// (c) 1998 Underground Software
-
-#include "v6809b.h"
-#include "v6809.h" // Pull in some funcs...
-
-// Global defs (needed because functions can only return one value.
-// Maybe you could use a struct to pass multiple values, but
-// what a pain in the ass! This way makes a little more sense
-// to me.)
-
-WORD pcrB, xrB, yrB, srB, urB; // Double byte registers
-BYTE ccrB, arB, brB, dprB; // Single byte registers
-long iclockB; // Instruction clock
-bool illegalB = false; // Illegal instruction executed flag
-
-static WORD addr; // Temporary variables common to all funcs...
-static BYTE tmp;
-
-extern BYTE FetchB(); // You need to define these functions
-extern WORD FetchWB(); // externally because every hardware situation
-extern BYTE RdMemB(WORD); // is going to be different...
-extern void WrMemB(WORD, BYTE);
-
-void (* exec_op0B[256])(); // Array of page zero opcode functions...
-void (* exec_op1B[256])(); // Array of page one opcode functions...
-void (* exec_op2B[256])(); // Array of page two opcode functions...
-
-//
-// Function to read TFR/EXG post byte
-//
-WORD ReadEXGB(BYTE code)
-{
- WORD retval;
-
- switch(code)
- {
- case 0: retval = (arB<<8) | brB; break;
- case 1: retval = xrB; break;
- case 2: retval = yrB; break;
- case 3: retval = urB; break;
- case 4: retval = srB; break;
- case 5: retval = pcrB; break;
- case 8: retval = arB; break;
- case 9: retval = brB; break;
- case 10: retval = ccrB; break;
- case 11: retval = dprB; break;
- default: retval = 0xFF;
- }
- return(retval);
-}
-
-//
-// Function to set TFR/EXG data
-//
-void WriteEXGB(BYTE code, WORD data)
-{
- switch(code)
- {
- case 0: { arB = data>>8; brB = data&0xFF; break; }
- case 1: xrB = data; break;
- case 2: yrB = data; break;
- case 3: urB = data; break;
- case 4: srB = data; break;
- case 5: pcrB = data; break;
- case 8: arB = data&0xFF; break;
- case 9: brB = data&0xFF; break;
- case 10: ccrB = data&0xFF; break;
- case 11: dprB = data&0xFF; break;
- }
-}
-
-//
-// Function to decode register data
-//
-WORD DecodeRegB(BYTE reg)
-{
- WORD retval;
-
- switch(reg)
- {
- case 0: retval = xrB; break;
- case 1: retval = yrB; break;
- case 2: retval = urB; break;
- case 3: retval = srB; break;
- }
- return(retval);
-}
-
-//
-// Function to decode IDX data
-//
-WORD DecodeIDXB(BYTE code)
-{
- WORD addr, woff;
- BYTE reg = (code&0x60)>>5, idxind = (code&0x10)>>4, lo_nyb = code&0x0F;
-
- if (!(code&0x80)) // Hi bit unset? Then decode 4 bit offset
- {
- addr = DecodeRegB(reg) + (idxind ? lo_nyb-16 : lo_nyb);
- }
- else
- {
- if (idxind)
- {
- switch(lo_nyb)
- {
- case 1: { woff = DecodeRegB(reg);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1);
- switch(reg)
- {
- case 0: xrB++; xrB++; break;
- case 1: yrB++; yrB++; break;
- case 2: urB++; urB++; break;
- case 3: srB++; srB++; break;
- }
- break; }
- case 3: { switch(reg)
- {
- case 0: xrB--; xrB--; break;
- case 1: yrB--; yrB--; break;
- case 2: urB--; urB--; break;
- case 3: srB--; srB--; break;
- }
- woff = DecodeRegB(reg);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 4: { woff = DecodeRegB(reg);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 5: { woff = DecodeRegB(reg) + SignedB(brB);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 6: { woff = DecodeRegB(reg) + SignedB(arB);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 8: { woff = DecodeRegB(reg) + SignedB(FetchB());
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 9: { woff = DecodeRegB(reg) + SignedW(FetchWB());
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 11: { woff = DecodeRegB(reg) + SignedW((arB<<8) | brB);
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 12: { woff = pcrB + SignedB(FetchB());
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 13: { woff = pcrB + SignedW(FetchWB());
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- case 15: { woff = FetchWB();
- addr = (RdMemB(woff)<<8) | RdMemB(woff+1); break; }
- }
- }
- else
- {
- switch(lo_nyb)
- {
- case 0: { addr = DecodeRegB(reg);
- switch(reg)
- {
- case 0: xrB++; break;
- case 1: yrB++; break;
- case 2: urB++; break;
- case 3: srB++; break;
- }
- break; }
- case 1: { addr = DecodeRegB(reg);
- switch(reg)
- {
- case 0: xrB++; xrB++; break;
- case 1: yrB++; yrB++; break;
- case 2: urB++; urB++; break;
- case 3: srB++; srB++; break;
- }
- break; }
- case 2: { switch(reg)
- {
- case 0: xrB--; break;
- case 1: yrB--; break;
- case 2: urB--; break;
- case 3: srB--; break;
- }
- addr = DecodeRegB(reg); break; }
- case 3: { switch(reg)
- {
- case 0: xrB--; xrB--; break;
- case 1: yrB--; yrB--; break;
- case 2: urB--; urB--; break;
- case 3: srB--; srB--; break;
- }
- addr = DecodeRegB(reg); break; }
- case 4: { addr = DecodeRegB(reg); break; }
- case 5: { addr = DecodeRegB(reg) + SignedB(brB); break; }
- case 6: { addr = DecodeRegB(reg) + SignedB(arB); break; }
- case 8: { addr = DecodeRegB(reg) + SignedB(FetchB()); break; }
- case 9: { addr = DecodeRegB(reg) + SignedW(FetchWB()); break; }
- case 11: { addr = DecodeRegB(reg) + SignedW((arB<<8) | brB); break; }
- case 12: { addr = pcrB + SignedB(FetchB()); break; }
- case 13: { addr = pcrB + SignedW(FetchWB()); break; }
- }
- }
- }
- return(addr);
-}
-
-//
-// Page zero instructions...
-//
-
-void BOp00(void) // NEG DP
-{
- addr = (dprB<<8) | FetchB();
- tmp = 256 - RdMemB(addr);
- WrMemB(addr, tmp);
- (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (tmp > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
- iclockB += 6;
-}
-void BOp03(void) // COM DP
-{
- addr = (dprB<<8) | FetchB();
- tmp = 0xFF ^ RdMemB(addr);
- WrMemB(addr, tmp);
- ccrB &= 0xFD; ccrB |= 0x01; // CLV SEC
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp04(void) // LSR DP
-{
- addr = (dprB<<8) | FetchB();
- tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
- tmp >>= 1; WrMemB(addr, tmp);
- ccrB &= 0xF7; // CLN
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 6;
-}
-void BOp06(void) // ROR DP
-{
- addr = (dprB<<8) | FetchB(); BYTE tmp2 = RdMemB(addr);
- tmp = (tmp2>>1) + (ccrB&0x01)*128;
- WrMemB(addr, tmp);
- (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp07(void) // ASR DP
-{
- addr = (dprB<<8) | FetchB(); tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- tmp >>= 1;
- if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp08(void) // LSL DP
-{
- addr = (dprB<<8) | FetchB(); // NEEDS OVERFLOW ADJUSTMENT
- tmp = RdMemB(addr);
- (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- tmp <<= 1;
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp09(void) // ROL DP
-{
- addr = (dprB<<8) | FetchB(); BYTE tmp2 = RdMemB(addr);
- tmp = (tmp2<<1) + (ccrB&0x01);
- WrMemB(addr, tmp);
- (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- ((tmp2&0x80)^((tmp2<<1)&0x80) ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp0A(void) // DEC DP
-{
- addr = (dprB<<8) | FetchB();
- tmp = RdMemB(addr) - 1;
- WrMemB(addr, tmp);
- (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp0C(void) // INC DP
-{
- addr = (dprB<<8) | FetchB();
- tmp = RdMemB(addr) + 1;
- WrMemB(addr, tmp);
- (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp0D(void) // TST DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp0E(void) // JMP DP
-{
- pcrB = (dprB<<8) | FetchB();
- iclockB += 3;
-}
-void BOp0F(void) // CLR DP
-{
- WrMemB((dprB<<8)|FetchB(), 0);
- ccrB &= 0xF0; ccrB |= 0x04; // CLN, SEZ, CLV, CLC
- iclockB += 6;
-}
-void BOp12(void) // NOP
-{
- iclockB += 2;
-}
-void BOp13(void) // SYNC
-{
- iclockB += 2;
-}
-void BOp16(void) // LBRA
-{
- pcrB += SignedW(FetchWB());
- iclockB += 5;
-}
-void BOp17(void) // LBSR
-{
- addr = FetchWB();
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
- pcrB += SignedW(addr);
- iclockB += 9;
-}
-void BOp19(void) // DAA
-{
- /*if ((ccrB&0x20) || ((arB&0x0F) > 0x09)) // H set or lo nyb too big?
- {
- arB += 0x06; ccrB |= 0x20; // Then adjust & set half carry
- }
- if ((ccrB&0x01) || (arB > 0x9F)) // C set or hi nyb too big?
- {
- arB += 0x60; ccrB |= 0x01; // Then adjust & set carry
- }
- ccrB &= 0xF1; // CL NZV
- if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
- if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 2; //*/
-
- BYTE msn, lsn; // Will this work??
- WORD t, cf = 0;
- msn=arB & 0xf0; lsn=arB & 0x0f;
- if( lsn>0x09 || ccrB&0x20 ) cf |= 0x06;
- if( msn>0x80 && lsn>0x09 ) cf |= 0x60;
- if( msn>0x90 || ccrB&0x01 ) cf |= 0x60;
- t = cf + arB;
- ccrB &= 0xF1; // CL NZV
- //CLR_NZV; /* keep carry from previous operation */
- if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
- if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
- //SET_NZ8((byte)t); SET_C8(t);
- ccrB |= ((t&0x100)>>8); // Adjust Carry (?)
- arB = t;
-}
-void BOp1A(void) // ORCC #
-{
- ccrB |= FetchB();
- iclockB += 3;
-}
-void BOp1C(void) // ANDCC #
-{
- ccrB &= FetchB();
- iclockB += 3;
-}
-void BOp1D(void) // SEX
-{
- (brB&0x80 ? arB = 0xFF : arB = 0x00);
- ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp1E(void) // EXG
-{
- tmp = FetchB();
- addr = ReadEXGB(tmp>>4); WriteEXGB(tmp>>4, ReadEXGB(tmp&0xF));
- WriteEXGB(tmp&0xF, addr);
- iclockB += 8;
-}
-void BOp1F(void) // TFR
-{
- tmp = FetchB();
- WriteEXGB(tmp&0xF, ReadEXGB(tmp>>4));
- iclockB += 7;
-}
-void BOp20(void) // BRA
-{
- pcrB += SignedB(FetchB()); // Branch always
- iclockB += 3;
-}
-void BOp21(void) // BRN
-{
- FetchB();
- iclockB += 3;
-}
-void BOp22(void) // BHI
-{
- tmp = FetchB();
- if (!(ccrB&0x05)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp23(void) // BLS
-{
- tmp = FetchB();
- if (ccrB&0x05) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp24(void) // BCC (BHS)
-{
- tmp = FetchB();
- if (!(ccrB&0x01)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp25(void) // BCS (BLO)
-{
- tmp = FetchB();
- if (ccrB&0x01) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp26(void) // BNE
-{
- tmp = FetchB();
- if (!(ccrB&0x04)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp27(void) // BEQ
-{
- tmp = FetchB();
- if (ccrB&0x04) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp28(void) // BVC
-{
- tmp = FetchB();
- if (!(ccrB&0x02)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp29(void) // BVS
-{
- tmp = FetchB();
- if (ccrB&0x02) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2A(void) // BPL
-{
- tmp = FetchB();
- if (!(ccrB&0x08)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2B(void) // BMI
-{
- tmp = FetchB();
- if (ccrB&0x08) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2C(void) // BGE
-{
- tmp = FetchB();
- if (!(((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2D(void) // BLT
-{
- tmp = FetchB();
- if (((ccrB&0x08) >> 2) ^ (ccrB&0x02)) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2E(void) // BGT
-{
- tmp = FetchB();
- if (!((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02)))) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp2F(void) // BLE
-{
- tmp = FetchB();
- if ((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedB(tmp);
- iclockB += 3;
-}
-void BOp30(void) // LEAX
-{
- xrB = DecodeIDXB(FetchB());
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 4;
-}
-void BOp31(void) // LEAY
-{
- yrB = DecodeIDXB(FetchB());
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 4;
-}
-void BOp32(void) // LEAS
-{
- srB = DecodeIDXB(FetchB());
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 4;
-}
-void BOp33(void) // LEAU
-{
- urB = DecodeIDXB(FetchB());
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 4;
-}
-void BOp34(void) // PSHS
-{
- tmp = FetchB();
- if (tmp&0x80) { WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8); }
- if (tmp&0x40) { WrMemB(--srB, urB&0xFF); WrMemB(--srB, urB>>8); }
- if (tmp&0x20) { WrMemB(--srB, yrB&0xFF); WrMemB(--srB, yrB>>8); }
- if (tmp&0x10) { WrMemB(--srB, xrB&0xFF); WrMemB(--srB, xrB>>8); }
- if (tmp&0x08) WrMemB(--srB, dprB);
- if (tmp&0x04) WrMemB(--srB, brB);
- if (tmp&0x02) WrMemB(--srB, arB);
- if (tmp&0x01) WrMemB(--srB, ccrB);
- iclockB += 5;
-}
-void BOp35(void) // PULS
-{
- tmp = FetchB();
- if (tmp&0x01) ccrB = RdMemB(srB++);
- if (tmp&0x02) arB = RdMemB(srB++);
- if (tmp&0x04) brB = RdMemB(srB++);
- if (tmp&0x08) dprB = RdMemB(srB++);
- if (tmp&0x10) xrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- if (tmp&0x20) yrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- if (tmp&0x40) urB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- if (tmp&0x80) pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- iclockB += 5;
-}
-void BOp36(void) // PSHU
-{
- tmp = FetchB();
- if (tmp&0x80) { WrMemB(--urB, pcrB&0xFF); WrMemB(--urB, pcrB>>8); }
- if (tmp&0x40) { WrMemB(--urB, srB&0xFF); WrMemB(--urB, srB>>8); }
- if (tmp&0x20) { WrMemB(--urB, yrB&0xFF); WrMemB(--urB, yrB>>8); }
- if (tmp&0x10) { WrMemB(--urB, xrB&0xFF); WrMemB(--urB, xrB>>8); }
- if (tmp&0x08) WrMemB(--urB, dprB);
- if (tmp&0x04) WrMemB(--urB, brB);
- if (tmp&0x02) WrMemB(--urB, arB);
- if (tmp&0x01) WrMemB(--urB, ccrB);
- iclockB += 5;
-}
-void BOp37(void) // PULU
-{
- tmp = FetchB();
- if (tmp&0x01) ccrB = RdMemB(urB++);
- if (tmp&0x02) arB = RdMemB(urB++);
- if (tmp&0x04) brB = RdMemB(urB++);
- if (tmp&0x08) dprB = RdMemB(urB++);
- if (tmp&0x10) xrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
- if (tmp&0x20) yrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
- if (tmp&0x40) srB = (RdMemB(urB++)<<8) | RdMemB(urB++);
- if (tmp&0x80) pcrB = (RdMemB(urB++)<<8) | RdMemB(urB++);
- iclockB += 5;
-}
-void BOp39(void) // RTS
-{
- pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- iclockB += 5;
-}
-void BOp3A(void) // ABX
-{
- xrB += brB;
- iclockB += 3;
-}
-void BOp3B(void) // RTI
-{
- ccrB = RdMemB(srB++);
- if (ccrB&0x80) // If E flag set, pull all regs
- {
- arB = RdMemB(srB++); brB = RdMemB(srB++); dprB = RdMemB(srB++);
- xrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- yrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- urB = (RdMemB(srB++)<<8) | RdMemB(srB++);
- iclockB += 15;
- }
- else
- {
- iclockB += 6;
- }
- pcrB = (RdMemB(srB++)<<8) | RdMemB(srB++);
-}
-void BOp3C(void) // CWAI
-{
- ccrB &= FetchB(); ccrB |= 0x80;
- iclockB += 1000000; // Force interrupt
-}
-void BOp3D(void) // MUL
-{
- addr = arB * brB; arB = addr>>8; brB = addr&0xFF;
- (addr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
- (brB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
- iclockB += 11;
-}
-void BOp3E(void) // RESET
-{
-}
-void BOp3F(void) // SWI
-{
-}
-void BOp40(void) // NEGA
-{
- arB = 256 - arB;
- (arB > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
- (arB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp43(void) // COMA
-{
- arB ^= 0xFF;
- ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp44(void) // LSRA
-{
- (arB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
- arB >>= 1;
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp46(void) // RORA
-{
- tmp = arB; arB = (tmp>>1) + (ccrB&0x01)*128;
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp47(void) // ASRA
-{
- (arB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- arB >>= 1; // Do the shift
- if (arB&0x40) arB |= 0x80; // Set neg if it was set
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp48(void) // LSLA [Keep checking from here...]
-{
- (arB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- arB <<= 1;
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp49(void) // ROLA
-{
- tmp = arB; arB = (tmp<<1) + (ccrB&0x01);
- (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp4A(void) // DECA
-{
- arB--;
- (arB == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp4C(void) // INCA
- {
- arB++;
- (arB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp4D(void) // TSTA
- {
- ccrB &= 0xFD; // Clear oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp4F(void) // CLRA
-{
- arB = 0;
- ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
- iclockB += 2;
-}
-void BOp50(void) // NEGB
- {
- brB = 256 - brB;
-// ((brB^tmp)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Adjust H carry
- (brB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (brB > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
- iclockB += 2;
- }
-void BOp53(void) // COMB
- {
- brB ^= 0xFF;
- ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp54(void) // LSRB
- {
- (brB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
- brB >>= 1;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp56(void) // RORB
- {
- tmp = brB; brB = (brB >> 1) + (ccrB&0x01)*128;
- (tmp&0x01 ? ccrB |=0x01 : ccrB &= 0xFE); // Shift bit into carry
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp57(void) // ASRB
- {
- (brB&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- brB >>= 1; // Do the shift
- if (brB&0x40) brB |= 0x80; // Set neg if it was set
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp58(void) // LSLB
- {
- (brB&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- brB <<= 1;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp59(void) // ROLB
-{
- tmp = brB;
- brB = (tmp<<1) + (ccrB&0x01);
- (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp5A(void) // DECB
- {
- brB--;
- (brB == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp5C(void) // INCB
- {
- brB++;
- (brB == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp5D(void) // TSTB
- {
- ccrB &= 0xFD; // Clear oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp5F(void) // CLRB
- {
- brB = 0;
- ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
- iclockB += 2;
- }
-void BOp60(void) // NEG IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr); BYTE res = 256 - tmp;
- WrMemB(addr, res);
-// ((res^tmp)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Adjust H carry
- (res == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (res == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (res&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (res > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
- iclockB += 6;
- }
-void BOp63(void) // COM IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr) ^ 0xFF;
- WrMemB(addr, tmp);
- ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp64(void) // LSR IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
- tmp >>= 1; WrMemB(addr, tmp);
- ccrB &= 0xF7; // CLN
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 6;
- }
-void BOp66(void) // ROR IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr); BYTE tmp2 = tmp;
- tmp = (tmp >> 1) + (ccrB&0x01)*128;
- WrMemB(addr, tmp);
- (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp67(void) // ASR IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- tmp >>= 1;
- if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp68(void) // LSL IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr);
- (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- tmp <<= 1;
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp69(void) // ROL IDX
-{
- BYTE tmp2 = RdMemB(DecodeIDXB(FetchB()));
- tmp = (tmp2<<1) + (ccrB&0x01);
- WrMemB(addr, tmp);
- (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOp6A(void) // DEC IDX
- {
- BYTE tmp; WORD addr;
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr) - 1;
- WrMemB(addr, tmp);
- (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp6C(void) // INC IDX
- {
- addr = DecodeIDXB(FetchB());
- tmp = RdMemB(addr) + 1;
- WrMemB(addr, tmp);
- (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp6D(void) // TST IDX
- {
- tmp = RdMemB(DecodeIDXB(FetchB()));
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp6E(void) // JMP IDX
-{
- pcrB = DecodeIDXB(FetchB());
- iclockB += 3;
-}
-void BOp6F(void) // CLR IDX
-{
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, 0);
- ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
- iclockB += 6;
-}
-void BOp70(void) // NEG ABS
- {
- addr = FetchWB();
- tmp = RdMemB(addr); BYTE res = 256 - tmp;
- WrMemB(addr, res);
- (res == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (res == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (res&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (res > 0x7F ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust carry
- iclockB += 7;
- }
-void BOp73(void) // COM ABS
- {
- addr = FetchWB();
- tmp = RdMemB(addr) ^ 0xFF;
- WrMemB(addr, tmp);
- ccrB &= 0xFD; ccrB |= 0x01; // CLV, SEC
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp74(void) // LSR ABS
- {
- addr = FetchWB();
- tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift low bit into carry
- tmp >>= 1; WrMemB(addr, tmp);
- ccrB &= 0xF7; // CLN
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- iclockB += 7;
- }
-void BOp76(void) // ROR ABS
- {
- BYTE tmp; WORD addr;
- addr = FetchWB();
- tmp = RdMemB(addr); BYTE tmp2 = tmp;
- tmp = (tmp >> 1) + (ccrB&0x01)*128;
- WrMemB(addr, tmp);
- (tmp2&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp77(void) // ASR ABS
- {
- BYTE tmp; WORD addr;
- addr = FetchWB();
- tmp = RdMemB(addr);
- (tmp&0x01 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift bit into carry
- tmp >>= 1;
- if (tmp&0x40) tmp |= 0x80; // Set Neg if it was set
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp78(void) // LSL ABS
- {
- BYTE tmp; WORD addr;
- addr = FetchWB();
- tmp = RdMemB(addr);
- (tmp&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- tmp <<= 1;
- WrMemB(addr, tmp);
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp79(void) // ROL ABS
-{
- BYTE tmp2 = RdMemB(FetchWB());
- tmp = (tmp2<<1) + (ccrB&0x01);
- WrMemB(addr, tmp);
- (tmp2&0x80 ? ccrB |= 0x01 : ccrB &= 0xFE); // Shift hi bit into carry
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
-}
-void BOp7A(void) // DEC ABS
- {
- BYTE tmp; WORD addr;
- addr = FetchWB();
- tmp = RdMemB(addr) - 1;
- WrMemB(addr, tmp);
- (tmp == 0x7F ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp7C(void) // INC ABS
- {
- BYTE tmp; WORD addr;
- addr = FetchWB();
- tmp = RdMemB(addr) + 1;
- WrMemB(addr, tmp);
- (tmp == 0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // Adjust oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp7D(void) // TST ABS
-{
- BYTE tmp = RdMemB(FetchWB());
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
-}
-void BOp7E(void) // JMP ABS
-{
- pcrB = FetchWB();
- iclockB += 3;
-}
-void BOp7F(void) // CLR ABS
- {
- WrMemB(FetchWB(), 0);
- ccrB &= 0xF0; ccrB |= 0x04; // Set NZVC
- iclockB += 7;
- }
-void BOp80(void) // SUBA #
-{
- BYTE tmp = FetchB(); BYTE as = arB;
- arB -= tmp;
- (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp81(void) // CMPA #
-{
- tmp = FetchB();
- BYTE db = arB - tmp;
- (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp82(void) // SBCA #
-{
- tmp = FetchB(); BYTE as = arB;
- arB = arB - tmp - (ccrB&0x01);
- (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOp83(void) // SUBD #
-{
- addr = FetchWB(); WORD dr = (arB<<8)|brB, ds = dr;
- dr -= addr;
- (ds < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((ds^addr^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 4;
-}
-void BOp84(void) // ANDA #
- {
- arB &= FetchB();
- ccrB &= 0xFD; // Clear oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp85(void) // BITA #
- {
- tmp = arB & FetchB();
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp86(void) // LDA #
- {
- arB = FetchB();
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp88(void) // EORA #
- {
- arB ^= FetchB();
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp89(void) // ADCA #
-{
- tmp = FetchB();
- addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative
- iclockB += 2;
-}
-void BOp8A(void) // ORA #
- {
- arB |= FetchB();
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOp8B(void) // ADDA #
-{
- tmp = FetchB(); addr = arB + tmp;
- (addr > 0xFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 2;
-}
-void BOp8C(void) // CMPX #
-{
- addr = FetchWB();
- WORD dw = xrB - addr;
- (xrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((xrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOp8D(void) // BSR
- {
- tmp = FetchB();
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
- pcrB += SignedB(tmp);
- iclockB += 7;
- }
-void BOp8E(void) // LDX #
- {
- xrB = FetchWB();
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 3;
- }
-void BOp90(void) // SUBA DP
- {
- tmp = RdMemB((dprB<<8)|FetchB()); BYTE as = arB;
- arB -= tmp;
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
- }
-void BOp91(void) // CMPA DP
- {
- tmp = RdMemB((dprB<<8)|FetchB());
- BYTE db = arB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
- }
-void BOp92(void) // SBCA DP
-{
- tmp = RdMemB((dprB<<8)|FetchB()); BYTE as = arB;
- arB = arB - tmp - (ccrB&0x01);
- (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOp93(void) // SUBD DP
-{
- addr = (dprB<<8)|FetchB(); WORD dr = (arB<<8)|brB, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- dr -= adr2;
- (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 6;
-}
-void BOp94(void) // ANDA DP
-{
- arB &= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xF1; // CLV CLZ CLN
- if (arB == 0) ccrB |= 0x04; // Adjust Zero flag
- if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 4;
-}
-void BOp95(void) // BITA DP
- {
- tmp = arB & RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp96(void) // LDA DP
-{
- arB = RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xF1; // CLN CLZ CLV
- if (arB == 0) ccrB |= 0x04; // Set Zero flag
- if (arB&0x80) ccrB |= 0x08; // Set Negative flag
- iclockB += 4;
-}
-void BOp97(void) // STA DP
- {
- WrMemB((dprB<<8)|FetchB(), arB);
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp98(void) // EORA DP
- {
- arB ^= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp99(void) // ADCA DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative
- iclockB += 4;
-}
-void BOp9A(void) // ORA DP
- {
- arB |= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp9B(void) // ADDA DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- addr = (WORD)arB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOp9C(void) // CMPX DP
- {
- addr = (dprB<<8)|FetchB();
- WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = xrB - adr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (xrB < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((xrB^adr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 6;
- }
-void BOp9D(void) // JSR DP
- {
- addr = (dprB<<8) | FetchB();
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
- pcrB = addr; // JSR to DP location...
- iclockB += 7;
- }
-void BOp9E(void) // LDX DP
- {
- addr = (dprB<<8) | FetchB();
- xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOp9F(void) // STX DP
- {
- addr = (dprB<<8) | FetchB();
- WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpA0(void) // SUBA IDX
- {
- tmp = RdMemB(DecodeIDXB(FetchB())); BYTE as = arB;
- arB -= tmp;
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
- }
-void BOpA1(void) // CMPA IDX
- {
- tmp = RdMemB(DecodeIDXB(FetchB()));
- BYTE db = arB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
- }
-void BOpA2(void) // SBCA IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB())); BYTE as = arB;
- arB = arB - tmp - (ccrB&0x01);
- (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOpA3(void) // SUBD IDX
-{
- addr = DecodeIDXB(FetchB()); WORD dr = (arB<<8)|brB, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- dr -= adr2;
- (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 6;
-}
-void BOpA4(void) // ANDA IDX
- {
- arB &= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // Clear oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpA5(void) // BITA IDX
- {
- tmp = arB & RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpA6(void) // LDA IDX
-{
- arB = RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xF1; // CLV CLZ CLN
- if (arB == 0) ccrB |= 0x04; // Set Zero flag
- if (arB&0x80) ccrB |= 0x08; // Set Negative flag
- iclockB += 4;
-}
-void BOpA7(void) // STA IDX
-{
- WrMemB(DecodeIDXB(FetchB()), arB);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (arB == 0) ccrB |= 0x04; // Set Zero flag
- if (arB&0x80) ccrB |= 0x08; // Set Negative flag
- iclockB += 4;
-}
-void BOpA8(void) // EORA IDX
- {
- arB ^= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpA9(void) // ADCA IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB()));
- addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpAA(void) // ORA IDX
-{
- arB |= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOpAB(void) // ADDA IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB()));
- addr = (WORD)arB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpAC(void) // CMPX IDX
-{
- addr = DecodeIDXB(FetchB());
- WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = xrB - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (xrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((xrB^addr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 6;
-}
-void BOpAD(void) // JSR IDX
-{
- addr = DecodeIDXB(FetchB());
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
- pcrB = addr; // JSR directly to IDX ptr
- iclockB += 7;
-}
-void BOpAE(void) // LDX IDX
-{
- addr = DecodeIDXB(FetchB());
- xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpAF(void) // STX IDX
-{
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (xrB == 0) ccrB |= 0x04; // Set Zero flag
- if (xrB&0x8000) ccrB |= 0x08; // Set Negative flag
- iclockB += 5;
-}
-void BOpB0(void) // SUBA ABS
- {
- tmp = RdMemB(FetchWB()); BYTE as = arB;
- arB -= tmp;
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (as < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 5;
- }
-void BOpB1(void) // CMPA ABS
- {
- tmp = RdMemB(FetchWB());
- BYTE db = arB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (arB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((arB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 5;
- }
-void BOpB2(void) // SBCA ABS
-{
- tmp = RdMemB(FetchWB()); BYTE as = arB;
- arB = arB - tmp - (ccrB&0x01);
- (as < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((as^tmp^arB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB3(void) // SUBD ABS
-{
- addr = FetchWB(); WORD dr = (arB<<8)|brB, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- dr -= adr2;
- (ds < adr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 7;
-}
-void BOpB4(void) // ANDA ABS
-{
- arB &= RdMemB(FetchWB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB5(void) // BITA ABS
-{
- tmp = arB & RdMemB(FetchWB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB6(void) // LDA ABS
-{
- arB = RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB7(void) // STA ABS
-{
- WrMemB(FetchWB(), arB);
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB8(void) // EORA ABS
-{
- arB ^= RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpB9(void) // ADCA ABS
-{
- tmp = RdMemB(FetchWB());
- addr = (WORD)arB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = addr; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 5;
-}
-void BOpBA(void) // ORA ABS
-{
- arB |= RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpBB(void) // ADDA ABS
-{
- tmp = RdMemB(FetchWB());
- addr = (WORD)arB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((arB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((arB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- arB = addr & 0xFF; // Set accumulator
- (arB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 5;
-}
-void BOpBC(void) // CMPX ABS
-{
- addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = xrB - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (xrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((xrB^addr2^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 7;
-}
-void BOpBD(void) // JSR ABS
-{
- addr = FetchWB();
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8);
- pcrB = addr; // Go to absolute address (Not indir)
- iclockB += 8;
-}
-void BOpBE(void) // LDX ABS
-{
- addr = FetchWB();
- xrB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
-}
-void BOpBF(void) // STX ABS
- {
- addr = FetchWB();
- WrMemB(addr, xrB>>8); WrMemB(addr+1, xrB&0xFF);
- ccrB &= 0xFD; // CLV
- (xrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (xrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOpC0(void) // SUBB #
- {
- tmp = FetchB(); BYTE bs = brB;
- brB -= tmp;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 2;
- }
-void BOpC1(void) // CMPB #
- {
- tmp = FetchB();
- BYTE db = brB - tmp;
- (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOpC2(void) // SBCB #
-{
- tmp = FetchB(); BYTE bs = brB;
- brB = brB - tmp - (ccrB&0x01);
- (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
-}
-void BOpC3(void) // ADDD #
-{
- addr = FetchWB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
- dr += addr;
- (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- dr &= 0xFFFF;
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- ((ds^addr^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 4;
-}
-void BOpC4(void) // ANDB #
- {
- brB &= FetchB();
- ccrB &= 0xFD; // Clear oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOpC5(void) // BITB #
-{
- tmp = brB & FetchB();
- ccrB &= 0xF1; // CLV CLZ CLN
- if (tmp == 0) ccrB |= 0x04; // Set Zero flag
- if (tmp&0x80) ccrB |= 0x08; // Set Negative flag
- iclockB += 2;
-}
-void BOpC6(void) // LDB #
-{
- brB = FetchB();
- ccrB &= 0xF1; // CLV CLZ CLN
- if (brB == 0) ccrB |= 0x04; // Set Zero flag
- if (brB&0x80) ccrB |= 0x08; // Set Negative flag
- iclockB += 2;
-}
-void BOpC8(void) // EORB #
- {
- brB ^= FetchB();
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOpC9(void) // ADCB #
-{
- tmp = FetchB();
- addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- brB = addr & 0xFF; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 2;
-}
-void BOpCA(void) // ORB #
- {
- brB |= FetchB();
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 2;
- }
-void BOpCB(void) // ADDB #
-{
- tmp = FetchB(); addr = brB + tmp;
- (addr > 0xFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- brB = addr & 0xFF; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 2;
-}
-void BOpCC(void) // LDD #
-{
- arB = FetchB(); brB = FetchB();
- ccrB &= 0xFD; // CLV
- ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 3;
-}
-void BOpCE(void) // LDU #
-{
- urB = FetchWB();
- ccrB &= 0xFD; // CLV
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 3;
-}
-void BOpD0(void) // SUBB DP
-{
- tmp = RdMemB((dprB<<8)|FetchB()); BYTE bs = brB;
- brB -= tmp;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
-}
-void BOpD1(void) // CMPB DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- BYTE db = brB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
-}
-void BOpD2(void) // SBCB DP
-{
- tmp = RdMemB((dprB<<8)|FetchB()); BYTE bs = brB;
- brB = brB - tmp - (ccrB&0x01);
- (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOpD3(void) // ADDD DP
-{
- addr = (dprB<<8)|FetchB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
- dr += adr2;
- (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- dr &= 0xFFFF;
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 6;
-}
-void BOpD4(void) // ANDB DP
- {
- brB &= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpD5(void) // BITB DP
- {
- tmp = brB & RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpD6(void) // LDB DP
-{
- brB = RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOpD7(void) // STB DP
- {
- WrMemB((dprB<<8)|FetchB(), brB);
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpD8(void) // EORB DP
- {
- brB ^= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpD9(void) // ADCB DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- brB = addr; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpDA(void) // ORB DP
- {
- brB |= RdMemB((dprB<<8)|FetchB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpDB(void) // ADDB DP
-{
- tmp = RdMemB((dprB<<8)|FetchB());
- addr = (WORD)brB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- brB = addr & 0xFF; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpDC(void) // LDD DP
-{
- addr = (dprB<<8)|FetchB();
- arB = RdMemB(addr); brB = RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpDD(void) // STD DP
-{
- addr = (dprB<<8)|FetchB();
- WrMemB(addr, arB); WrMemB(addr+1, brB);
- ccrB &= 0xFD; // CLV
- ((arB|brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpDE(void) // LDU DP
-{
- addr = (dprB<<8)|FetchB();
- urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpDF(void) // STU DP
-{
- addr = (dprB<<8)|FetchB();
- WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
- ccrB &= 0xFD; // CLV
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
-}
-void BOpE0(void) // SUBB IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB())); BYTE bs = brB;
- brB -= tmp;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
-}
-void BOpE1(void) // CMPB IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB()));
- BYTE db = brB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 4;
-}
-void BOpE2(void) // SBCB IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB())); BYTE bs = brB;
- brB = brB - tmp - (ccrB&0x01);
- (bs < (tmp+(ccrB&0x01)) ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
-}
-void BOpE3(void) // ADDD IDX
-{
- addr = DecodeIDXB(FetchB()); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
- dr += adr2;
- (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- dr &= 0xFFFF;
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 6;
-}
-void BOpE4(void) // ANDB IDX
- {
- brB &= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // Clear oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpE5(void) // BITB IDX
- {
- tmp = brB & RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpE6(void) // LDB IDX
- {
- brB = RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpE7(void) // STB IDX
-{
- WrMemB(DecodeIDXB(FetchB()), brB);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (brB == 0) ccrB |= 0x04; // Adjust Zero flag
- if (brB&0x80) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 4;
-}
-void BOpE8(void) // EORB IDX
- {
- brB ^= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpE9(void) // ADCB IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB()));
- addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- brB = addr; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpEA(void) // ORB IDX
- {
- brB |= RdMemB(DecodeIDXB(FetchB()));
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOpEB(void) // ADDB IDX
-{
- tmp = RdMemB(DecodeIDXB(FetchB()));
- addr = (WORD)brB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- brB = addr; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 4;
-}
-void BOpEC(void) // LDD IDX
-{
- addr = DecodeIDXB(FetchB());
- arB = RdMemB(addr); brB = RdMemB(addr+1);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (!(arB|brB)) ccrB |= 0x04; // Adjust Zero flag
- if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 5;
-}
-void BOpED(void) // STD IDX
-{
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, arB); WrMemB(addr+1, brB);
- ccrB &= 0xF1; // CLV CLZ CLZ
- if (!(arB|brB)) ccrB |= 0x04; // Adjust Zero flag
- if (arB&0x80) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 5;
-}
-void BOpEE(void) // LDU IDX
-{
- addr = DecodeIDXB(FetchB());
- urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (urB == 0) ccrB |= 0x04; // Set Zero flag
- if (urB&0x8000) ccrB |= 0x08; // Set Negative flag
- iclockB += 5;
-}
-void BOpEF(void) // STU IDX
-{
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (urB == 0) ccrB |= 0x04; // Set Zero flag
- if (urB&0x8000) ccrB |= 0x08; // Set Negative flag
- iclockB += 5;
-}
-void BOpF0(void) // SUBB ABS
- {
- tmp = RdMemB(FetchWB()); BYTE bs = brB;
- brB -= tmp;
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- }
-void BOpF1(void) // CMPB ABS
- {
- tmp = RdMemB(FetchWB());
- BYTE db = brB - tmp;
- (db == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (db&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (brB < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((brB^tmp^db^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 5;
- }
-void BOpF2(void) // SBCB ABS
-{
- tmp = RdMemB(FetchWB()); BYTE bs = brB;
- brB = brB - tmp - (ccrB&0x01);
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (bs < tmp ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((bs^tmp^brB^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflow
- iclockB += 5;
-}
-void BOpF3(void) // ADDD ABS
-{
- addr = FetchWB(); long dr = ((arB<<8)|brB)&0xFFFF, ds = dr;
- WORD adr2 = (RdMemB(addr)<<8)|RdMemB(addr+1);
- dr += adr2;
- (dr > 0xFFFF ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- dr &= 0xFFFF;
- (dr == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dr&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- ((ds^adr2^dr^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- arB = dr>>8; brB = dr&0xFF;
- iclockB += 7;
-}
-void BOpF4(void) // ANDB ABS
- {
- brB &= RdMemB(FetchWB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpF5(void) // BITB ABS
- {
- tmp = brB & RdMemB(FetchWB());
- ccrB &= 0xFD; // Clear oVerflow flag
- (tmp == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (tmp&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpF6(void) // LDB ABS
- {
- brB = RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpF7(void) // STB ABS
- {
- WrMemB(FetchWB(), brB);
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpF8(void) // EORB ABS
- {
- brB ^= RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpF9(void) // ADCB ABS
-{
- tmp = RdMemB(FetchWB());
- addr = (WORD)brB + (WORD)tmp + (WORD)(ccrB&0x01);
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- brB = addr & 0xFF; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 5;
-}
-void BOpFA(void) // ORB ABS
- {
- brB |= RdMemB(FetchWB());
- ccrB &= 0xFD; // CLV
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 5;
- }
-void BOpFB(void) // ADDB ABS
-{
- tmp = RdMemB(FetchWB());
- addr = (WORD)brB + (WORD)tmp;
- (addr > 0x00FF ? ccrB |= 0x01 : ccrB &= 0xFE); // Set Carry flag
- ((brB^tmp^addr)&0x10 ? ccrB |= 0x20 : ccrB &= 0xDF); // Set Half carry
- ((brB^tmp^addr^(ccrB<<7))&0x80 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerflo
- brB = addr & 0xFF; // Set accumulator
- (brB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Set Zero flag
- (brB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Set Negative flag
- iclockB += 5;
-}
-void BOpFC(void) // LDD ABS
- {
- addr = FetchWB();
- arB = RdMemB(addr); brB = RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOpFD(void) // STD ABS
- {
- addr = FetchWB();
- WrMemB(addr, arB); WrMemB(addr+1, brB);
- ccrB &= 0xFD; // CLV
- ((arB+brB) == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (arB&0x80 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOpFE(void) // LDU ABS
- {
- addr = FetchWB();
- urB = (RdMemB(addr) << 8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOpFF(void) // STU ABS
- {
- addr = FetchWB();
- WrMemB(addr, urB>>8); WrMemB(addr+1, urB&0xFF);
- ccrB &= 0xFD; // CLV
- (urB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (urB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-
-//
-// Page one opcodes' execute code
-//
-
-void BOp1021(void) // LBRN
-{
- addr = FetchWB();
- iclockB += 5;
-}
-void BOp1022(void) // LBHI
-{
- addr = FetchWB();
- if (!((ccrB&0x01)|(ccrB&0x04))) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1023(void) // LBLS
-{
- addr = FetchWB();
- if ((ccrB&0x01)|(ccrB&0x04)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1024(void) // LBCC (LBHS)
-{
- addr = FetchWB();
- if (!(ccrB&0x01)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1025(void) // LBCS (LBLO)
-{
- addr = FetchWB();
- if (ccrB&0x01) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1026(void) // LBNE
-{
- addr = FetchWB();
- if (!(ccrB&0x04)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1027(void) // LBEQ
-{
- addr = FetchWB();
- if (ccrB&0x04) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1028(void) // LBVC
-{
- addr = FetchWB();
- if (!(ccrB&0x02)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp1029(void) // LBVS
-{
- addr = FetchWB();
- if (ccrB&0x02) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102A(void) // LBPL
-{
- addr = FetchWB();
- if (!(ccrB&0x08)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102B(void) // LBMI
-{
- addr = FetchWB();
- if (ccrB&0x08) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102C(void) // LBGE
-{
- addr = FetchWB();
- if (!(((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102D(void) // LBLT
-{
- addr = FetchWB();
- if (((ccrB&0x08) >> 2) ^ (ccrB&0x02)) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102E(void) // LBGT
-{
- addr = FetchWB();
- if (!((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02)))) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp102F(void) // LBLE
-{
- addr = FetchWB();
- if ((ccrB&0x04) | (((ccrB&0x08) >> 2) ^ (ccrB&0x02))) pcrB += SignedW(addr);
- iclockB += 5;
-}
-void BOp103F(void) // SWI2 (Not yet implemented)
-{
- iclockB += 20;
-}
-void BOp1083(void) // CMPD #
- {
- addr = FetchWB(); WORD dr = (arB<<8)|brB;
- WORD dw = dr - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (dr < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((dr^addr^dw^((WORD)ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 5;
- }
-void BOp108C(void) // CMPY #
- {
- addr = FetchWB();
- WORD dw = yrB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((yrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 5;
- }
-void BOp108E(void) // LDY #
- {
- yrB = FetchWB();
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp1093(void) // CMPD DP
- {
- WORD adr2 = (dprB<<8)|FetchB(), dr = (arB<<8)|brB;
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = dr - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (dr < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((dr^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp109C(void) // CMPY DP
- {
- WORD adr2 = (dprB<<8)|FetchB();
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = yrB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- ((yrB^addr^dw^(ccrB<<15))&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp109E(void) // LDY DP
- {
- addr = (dprB<<8)|FetchB();
- yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp109F(void) // STY DP
- {
- addr = (dprB<<8)|FetchB();
- WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10A3(void) // CMPD IDX
-{
- WORD adr2 = DecodeIDXB(FetchB()), dr = (arB<<8)|brB;
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = dr - addr;
- ccrB &= 0xF0; // CLC CLV CLZ CLN
- if (dr < addr) ccrB |= 0x01; // Set Carry flag
- if ((dr^addr^dw^(ccrB<<15))&0x8000) ccrB |= 0x02; // Set oVerflow
- if (dw == 0) ccrB |= 0x04; // Set Zero flag
- if (dw&0x8000) ccrB |= 0x08; // Set Negative flag
- iclockB += 7;
-}
-void BOp10AC(void) // CMPY IDX
- {
- WORD adr2 = DecodeIDXB(FetchB());
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = yrB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (yrB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^yrB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp10AE(void) // LDY IDX
-{
- addr = DecodeIDXB(FetchB());
- yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xF1; // CLV CLZ CLN
- if (yrB == 0) ccrB |= 0x04; // Adjust Zero flag
- if (yrB&0x8000) ccrB |= 0x08; // Adjust Negative flag
- iclockB += 6;
-}
-void BOp10AF(void) // STY IDX
- {
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10B3(void) // CMPD ABS
- {
- addr = FetchWB(); WORD dr = (arB<<8)|brB;
- WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = dr - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (dr < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^dr^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 8;
- }
-void BOp10BC(void) // CMPY ABS
- {
- addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = yrB - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (yrB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^yrB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 8;
- }
-void BOp10BE(void) // LDY ABS
- {
- addr = FetchWB();
- yrB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp10BF(void) // STY ABS
- {
- addr = FetchWB();
- WrMemB(addr, yrB>>8); WrMemB(addr+1, yrB&0xFF);
- ccrB &= 0xFD; // CLV
- (yrB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (yrB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp10CE(void) // LDS #
- {
- srB = FetchWB();
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 4;
- }
-void BOp10DE(void) // LDS DP
- {
- addr = (dprB<<8)|FetchB();
- srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10DF(void) // STS DP
- {
- addr = (dprB<<8)|FetchB();
- WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10EE(void) // LDS IDX
- {
- addr = DecodeIDXB(FetchB());
- srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10EF(void) // STS IDX
- {
- addr = DecodeIDXB(FetchB());
- WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 6;
- }
-void BOp10FE(void) // LDS ABS
- {
- addr = FetchWB();
- srB = (RdMemB(addr)<<8) | RdMemB(addr+1);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
- }
-void BOp10FF(void) // STS ABS
-{
- addr = FetchWB();
- WrMemB(addr, srB>>8); WrMemB(addr+1, srB&0xFF);
- ccrB &= 0xFD; // CLV
- (srB == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (srB&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- iclockB += 7;
-}
-
-//
-// Page two opcodes' execute code
-//
-
-void BOp113F(void) // SWI3
- {
- iclockB += 20;
- }
-void BOp1183(void) // CMPU #
- {
- addr = FetchWB();
- WORD dw = urB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 5;
- }
-void BOp118C(void) // CMPS #
- {
- addr = FetchWB();
- WORD dw = srB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 5;
- }
-void BOp1193(void) // CMPU DP
- {
- WORD adr2 = (dprB<<8)|FetchB();
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = urB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp119C(void) // CMPS DP
- {
- WORD adr2 = (dprB<<8)|FetchB();
- addr = (RdMemB(adr2)<<8) | RdMemB(adr2+1);
- WORD dw = srB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp11A3(void) // CMPU IDX
- {
- WORD addr2 = DecodeIDXB(FetchB());
- addr = (RdMemB(addr2)<<8) | RdMemB(addr2+1);
- WORD dw = urB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (urB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^urB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp11AC(void) // CMPS IDX
- {
- WORD addr2 = DecodeIDXB(FetchB());
- addr = (RdMemB(addr2)<<8) | RdMemB(addr2+1);
- WORD dw = srB - addr;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (srB < addr ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^srB^addr^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 7;
- }
-void BOp11B3(void) // CMPU ABS
- {
- addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = urB - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (urB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^urB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 8;
- }
-void BOp11BC(void) // CMPS ABS
- {
- addr = FetchWB(); WORD addr2 = (RdMemB(addr)<<8) | RdMemB(addr+1);
- WORD dw = srB - addr2;
- (dw == 0 ? ccrB |= 0x04 : ccrB &= 0xFB); // Adjust Zero flag
- (dw&0x8000 ? ccrB |= 0x08 : ccrB &= 0xF7); // Adjust Negative flag
- (srB < addr2 ? ccrB |= 0x01 : ccrB &= 0xFE); // Adjust Carry flag
- (((ccrB<<15)^srB^addr2^dw)&0x8000 ? ccrB |= 0x02 : ccrB &= 0xFD); // oVerfl
- iclockB += 8;
- }
-
-void IllegalBOp(void) { iclockB++; illegalB = true; }
-
-//
-// Initialize 6809 function adressess
-//
-void Init_6809B(void)
-{
- for(int i=0; i<256; i++) // Set all functions to illegal
- {
- exec_op0B[i] = IllegalBOp;
- exec_op1B[i] = IllegalBOp;
- exec_op2B[i] = IllegalBOp;
- }
- exec_op0B[0x00] = BOp00; exec_op0B[0x03] = BOp03; exec_op0B[0x04] = BOp04;
- exec_op0B[0x06] = BOp06; exec_op0B[0x07] = BOp07; exec_op0B[0x08] = BOp08;
- exec_op0B[0x09] = BOp09; exec_op0B[0x0A] = BOp0A; exec_op0B[0x0C] = BOp0C;
- exec_op0B[0x0D] = BOp0D; exec_op0B[0x0E] = BOp0E; exec_op0B[0x0F] = BOp0F;
- exec_op0B[0x12] = BOp12; exec_op0B[0x13] = BOp13; exec_op0B[0x16] = BOp16;
- exec_op0B[0x17] = BOp17; exec_op0B[0x19] = BOp19; exec_op0B[0x1A] = BOp1A;
- exec_op0B[0x1C] = BOp1C; exec_op0B[0x1D] = BOp1D; exec_op0B[0x1E] = BOp1E;
- exec_op0B[0x1F] = BOp1F; exec_op0B[0x20] = BOp20; exec_op0B[0x21] = BOp21;
- exec_op0B[0x22] = BOp22; exec_op0B[0x23] = BOp23; exec_op0B[0x24] = BOp24;
- exec_op0B[0x25] = BOp25; exec_op0B[0x26] = BOp26; exec_op0B[0x27] = BOp27;
- exec_op0B[0x28] = BOp28; exec_op0B[0x29] = BOp29; exec_op0B[0x2A] = BOp2A;
- exec_op0B[0x2B] = BOp2B; exec_op0B[0x2C] = BOp2C; exec_op0B[0x2D] = BOp2D;
- exec_op0B[0x2E] = BOp2E; exec_op0B[0x2F] = BOp2F; exec_op0B[0x30] = BOp30;
- exec_op0B[0x31] = BOp31; exec_op0B[0x32] = BOp32; exec_op0B[0x33] = BOp33;
- exec_op0B[0x34] = BOp34; exec_op0B[0x35] = BOp35; exec_op0B[0x36] = BOp36;
- exec_op0B[0x37] = BOp37; exec_op0B[0x39] = BOp39; exec_op0B[0x3A] = BOp3A;
- exec_op0B[0x3B] = BOp3B; exec_op0B[0x3C] = BOp3C; exec_op0B[0x3D] = BOp3D;
- exec_op0B[0x3E] = BOp3E; exec_op0B[0x3F] = BOp3F; exec_op0B[0x40] = BOp40;
- exec_op0B[0x43] = BOp43; exec_op0B[0x44] = BOp44; exec_op0B[0x46] = BOp46;
- exec_op0B[0x47] = BOp47; exec_op0B[0x48] = BOp48; exec_op0B[0x49] = BOp49;
- exec_op0B[0x4A] = BOp4A; exec_op0B[0x4C] = BOp4C; exec_op0B[0x4D] = BOp4D;
- exec_op0B[0x4F] = BOp4F; exec_op0B[0x50] = BOp50; exec_op0B[0x53] = BOp53;
- exec_op0B[0x54] = BOp54; exec_op0B[0x56] = BOp56; exec_op0B[0x57] = BOp57;
- exec_op0B[0x58] = BOp58; exec_op0B[0x59] = BOp59; exec_op0B[0x5A] = BOp5A;
- exec_op0B[0x5C] = BOp5C; exec_op0B[0x5D] = BOp5D; exec_op0B[0x5F] = BOp5F;
- exec_op0B[0x60] = BOp60; exec_op0B[0x63] = BOp63; exec_op0B[0x64] = BOp64;
- exec_op0B[0x66] = BOp66; exec_op0B[0x67] = BOp67; exec_op0B[0x68] = BOp68;
- exec_op0B[0x69] = BOp69; exec_op0B[0x6A] = BOp6A; exec_op0B[0x6C] = BOp6C;
- exec_op0B[0x6D] = BOp6D; exec_op0B[0x6E] = BOp6E; exec_op0B[0x6F] = BOp6F;
- exec_op0B[0x70] = BOp70; exec_op0B[0x73] = BOp73; exec_op0B[0x74] = BOp74;
- exec_op0B[0x76] = BOp76; exec_op0B[0x77] = BOp77; exec_op0B[0x78] = BOp78;
- exec_op0B[0x79] = BOp79; exec_op0B[0x7A] = BOp7A; exec_op0B[0x7C] = BOp7C;
- exec_op0B[0x7D] = BOp7D; exec_op0B[0x7E] = BOp7E; exec_op0B[0x7F] = BOp7F;
- exec_op0B[0x80] = BOp80; exec_op0B[0x81] = BOp81; exec_op0B[0x82] = BOp82;
- exec_op0B[0x83] = BOp83; exec_op0B[0x84] = BOp84; exec_op0B[0x85] = BOp85;
- exec_op0B[0x86] = BOp86; exec_op0B[0x88] = BOp88; exec_op0B[0x89] = BOp89;
- exec_op0B[0x8A] = BOp8A; exec_op0B[0x8B] = BOp8B; exec_op0B[0x8C] = BOp8C;
- exec_op0B[0x8D] = BOp8D; exec_op0B[0x8E] = BOp8E; exec_op0B[0x90] = BOp90;
- exec_op0B[0x91] = BOp91; exec_op0B[0x92] = BOp92; exec_op0B[0x93] = BOp93;
- exec_op0B[0x94] = BOp94; exec_op0B[0x95] = BOp95; exec_op0B[0x96] = BOp96;
- exec_op0B[0x97] = BOp97; exec_op0B[0x98] = BOp98; exec_op0B[0x99] = BOp99;
- exec_op0B[0x9A] = BOp9A; exec_op0B[0x9B] = BOp9B; exec_op0B[0x9C] = BOp9C;
- exec_op0B[0x9D] = BOp9D; exec_op0B[0x9E] = BOp9E; exec_op0B[0x9F] = BOp9F;
- exec_op0B[0xA0] = BOpA0; exec_op0B[0xA1] = BOpA1; exec_op0B[0xA2] = BOpA2;
- exec_op0B[0xA3] = BOpA3; exec_op0B[0xA4] = BOpA4; exec_op0B[0xA5] = BOpA5;
- exec_op0B[0xA6] = BOpA6; exec_op0B[0xA7] = BOpA7; exec_op0B[0xA8] = BOpA8;
- exec_op0B[0xA9] = BOpA9; exec_op0B[0xAA] = BOpAA; exec_op0B[0xAB] = BOpAB;
- exec_op0B[0xAC] = BOpAC; exec_op0B[0xAD] = BOpAD; exec_op0B[0xAE] = BOpAE;
- exec_op0B[0xAF] = BOpAF; exec_op0B[0xB0] = BOpB0; exec_op0B[0xB1] = BOpB1;
- exec_op0B[0xB2] = BOpB2; exec_op0B[0xB3] = BOpB3; exec_op0B[0xB4] = BOpB4;
- exec_op0B[0xB5] = BOpB5; exec_op0B[0xB6] = BOpB6; exec_op0B[0xB7] = BOpB7;
- exec_op0B[0xB8] = BOpB8; exec_op0B[0xB9] = BOpB9; exec_op0B[0xBA] = BOpBA;
- exec_op0B[0xBB] = BOpBB; exec_op0B[0xBC] = BOpBC; exec_op0B[0xBD] = BOpBD;
- exec_op0B[0xBE] = BOpBE; exec_op0B[0xBF] = BOpBF; exec_op0B[0xC0] = BOpC0;
- exec_op0B[0xC1] = BOpC1; exec_op0B[0xC2] = BOpC2; exec_op0B[0xC3] = BOpC3;
- exec_op0B[0xC4] = BOpC4; exec_op0B[0xC5] = BOpC5; exec_op0B[0xC6] = BOpC6;
- exec_op0B[0xC8] = BOpC8; exec_op0B[0xC9] = BOpC9; exec_op0B[0xCA] = BOpCA;
- exec_op0B[0xCB] = BOpCB; exec_op0B[0xCC] = BOpCC;
- exec_op0B[0xCE] = BOpCE; exec_op0B[0xD0] = BOpD0; exec_op0B[0xD1] = BOpD1;
- exec_op0B[0xD2] = BOpD2; exec_op0B[0xD3] = BOpD3; exec_op0B[0xD4] = BOpD4;
- exec_op0B[0xD5] = BOpD5; exec_op0B[0xD6] = BOpD6; exec_op0B[0xD7] = BOpD7;
- exec_op0B[0xD8] = BOpD8; exec_op0B[0xD9] = BOpD9; exec_op0B[0xDA] = BOpDA;
- exec_op0B[0xDB] = BOpDB; exec_op0B[0xDC] = BOpDC; exec_op0B[0xDD] = BOpDD;
- exec_op0B[0xDE] = BOpDE; exec_op0B[0xDF] = BOpDF; exec_op0B[0xE0] = BOpE0;
- exec_op0B[0xE1] = BOpE1; exec_op0B[0xE2] = BOpE2; exec_op0B[0xE3] = BOpE3;
- exec_op0B[0xE4] = BOpE4; exec_op0B[0xE5] = BOpE5; exec_op0B[0xE6] = BOpE6;
- exec_op0B[0xE7] = BOpE7; exec_op0B[0xE8] = BOpE8; exec_op0B[0xE9] = BOpE9;
- exec_op0B[0xEA] = BOpEA; exec_op0B[0xEB] = BOpEB; exec_op0B[0xEC] = BOpEC;
- exec_op0B[0xED] = BOpED; exec_op0B[0xEE] = BOpEE; exec_op0B[0xEF] = BOpEF;
- exec_op0B[0xF0] = BOpF0;
- exec_op0B[0xF1] = BOpF1; exec_op0B[0xF2] = BOpF2; exec_op0B[0xF3] = BOpF3;
- exec_op0B[0xF4] = BOpF4; exec_op0B[0xF5] = BOpF5; exec_op0B[0xF6] = BOpF6;
- exec_op0B[0xF7] = BOpF7; exec_op0B[0xF8] = BOpF8; exec_op0B[0xF9] = BOpF9;
- exec_op0B[0xFA] = BOpFA; exec_op0B[0xFB] = BOpFB; exec_op0B[0xFC] = BOpFC;
- exec_op0B[0xFD] = BOpFD; exec_op0B[0xFE] = BOpFE; exec_op0B[0xFF] = BOpFF;
-
- exec_op1B[0x21] = BOp1021; exec_op1B[0x22] = BOp1022; exec_op1B[0x23] = BOp1023;
- exec_op1B[0x24] = BOp1024; exec_op1B[0x25] = BOp1025; exec_op1B[0x26] = BOp1026;
- exec_op1B[0x27] = BOp1027; exec_op1B[0x28] = BOp1028; exec_op1B[0x29] = BOp1029;
- exec_op1B[0x2A] = BOp102A; exec_op1B[0x2B] = BOp102B; exec_op1B[0x2C] = BOp102C;
- exec_op1B[0x2D] = BOp102D; exec_op1B[0x2E] = BOp102E; exec_op1B[0x2F] = BOp102F;
- exec_op1B[0x3F] = BOp103F; exec_op1B[0x83] = BOp1083; exec_op1B[0x8C] = BOp108C;
- exec_op1B[0x8E] = BOp108E; exec_op1B[0x93] = BOp1093; exec_op1B[0x9C] = BOp109C;
- exec_op1B[0x9E] = BOp109E; exec_op1B[0x9F] = BOp109F; exec_op1B[0xA3] = BOp10A3;
- exec_op1B[0xAC] = BOp10AC; exec_op1B[0xAE] = BOp10AE; exec_op1B[0xAF] = BOp10AF;
- exec_op1B[0xB3] = BOp10B3; exec_op1B[0xBC] = BOp10BC; exec_op1B[0xBE] = BOp10BE;
- exec_op1B[0xBF] = BOp10BF; exec_op1B[0xCE] = BOp10CE; exec_op1B[0xDE] = BOp10DE;
- exec_op1B[0xDF] = BOp10DF; exec_op1B[0xEE] = BOp10EE; exec_op1B[0xEF] = BOp10EF;
- exec_op1B[0xFE] = BOp10FE; exec_op1B[0xFF] = BOp10FF;
-
- exec_op2B[0x3F] = BOp113F; exec_op2B[0x83] = BOp1183; exec_op2B[0x8C] = BOp118C;
- exec_op2B[0x93] = BOp1193; exec_op2B[0x9C] = BOp119C; exec_op2B[0xA3] = BOp11A3;
- exec_op2B[0xAC] = BOp11AC; exec_op2B[0xB3] = BOp11B3; exec_op2B[0xBC] = BOp11BC;
-}
-
-//
-// Function to execute one 6809 instruction
-//
-void Execute_6809B(long num_of_instrs_to_exec)
-{
- for(long i=0; i<num_of_instrs_to_exec; i++)
- {
- BYTE opcode = FetchB(); // Get the opcode
- if (opcode == 0x10) { exec_op1B[FetchB()](); goto EXE_NEXT; }
- if (opcode == 0x11) { exec_op2B[FetchB()](); goto EXE_NEXT; }
- exec_op0B[opcode]();
- EXE_NEXT:
-
- if (iclockB > 24550) // Slightly faster IRQs for SUB processor
- {
- iclockB = 0;
- if (!(ccrB&0x10) /*&& (!inter)*/) // Process an interrupt?
- {
- ccrB |= 0x80; // Set E
- WrMemB(--srB, pcrB&0xFF); WrMemB(--srB, pcrB>>8); // Save all regs...
- WrMemB(--srB, urB&0xFF); WrMemB(--srB, urB>>8);
- WrMemB(--srB, yrB&0xFF); WrMemB(--srB, yrB>>8);
- WrMemB(--srB, xrB&0xFF); WrMemB(--srB, xrB>>8);
- WrMemB(--srB, dprB); WrMemB(--srB, brB);
- WrMemB(--srB, arB); WrMemB(--srB, ccrB);
- ccrB |= 0x50; // Set F,I
- pcrB = (RdMemB(0xFFF8)<<8) | RdMemB(0xFFF9); // And do it!
- }
- }
- }
-}