- case 0: sprintf(buffer, "add r%d,r%d", reg1, reg2); break;
- case 1: sprintf(buffer, "addc r%d,r%d", reg1, reg2); break;
- case 2: sprintf(buffer, "addq $%x,r%d", convert_zero[reg1], reg2); break;
- case 3: sprintf(buffer, "addqt $%x,r%d", convert_zero[reg1], reg2); break;
- case 4: sprintf(buffer, "sub r%d,r%d", reg1, reg2); break;
- case 5: sprintf(buffer, "subc r%d,r%d", reg1, reg2); break;
- case 6: sprintf(buffer, "subq $%x,r%d", convert_zero[reg1], reg2); break;
- case 7: sprintf(buffer, "subqt $%x,r%d", convert_zero[reg1], reg2); break;
- case 8: sprintf(buffer, "neg r%d", reg2); break;
- case 9: sprintf(buffer, "and r%d,r%d", reg1, reg2); break;
- case 10: sprintf(buffer, "or r%d,r%d", reg1, reg2); break;
- case 11: sprintf(buffer, "xor r%d,r%d", reg1, reg2); break;
- case 12: sprintf(buffer, "not r%d", reg2); break;
- case 13: sprintf(buffer, "btst $%x,r%d", reg1, reg2); break;
- case 14: sprintf(buffer, "bset $%x,r%d", reg1, reg2); break;
- case 15: sprintf(buffer, "bclr $%x,r%d", reg1, reg2); break;
- case 16: sprintf(buffer, "mult r%d,r%d", reg1, reg2); break;
- case 17: sprintf(buffer, "imult r%d,r%d", reg1, reg2); break;
- case 18: sprintf(buffer, "imultn r%d,r%d", reg1, reg2); break;
- case 19: sprintf(buffer, "resmac r%d", reg2); break;
- case 20: sprintf(buffer, "imacn r%d,r%d", reg1, reg2); break;
- case 21: sprintf(buffer, "div r%d,r%d", reg1, reg2); break;
- case 22: sprintf(buffer, "abs r%d", reg2); break;
- case 23: sprintf(buffer, "sh r%d,r%d", reg1, reg2); break;
- case 24: sprintf(buffer, "shlq $%x,r%d", 32 - convert_zero[reg1], reg2); break;
- case 25: sprintf(buffer, "shrq $%x,r%d", convert_zero[reg1], reg2); break;
- case 26: sprintf(buffer, "sha r%d,r%d", reg1, reg2); break;
- case 27: sprintf(buffer, "sharq $%x,r%d", convert_zero[reg1], reg2); break;
- case 28: sprintf(buffer, "ror r%d,r%d", reg1, reg2); break;
- case 29: sprintf(buffer, "rorq $%x,r%d", convert_zero[reg1], reg2); break;
- case 30: sprintf(buffer, "cmp r%d,r%d", reg1, reg2); break;
- case 31: sprintf(buffer, "cmpq %s,r%d", signed_16bit((INT16)(reg1 << 11) >> 11), reg2);break;
+ case 0: sprintf(buffer, "ADD R%02d,R%02d", reg1, reg2); break;
+ case 1: sprintf(buffer, "ADDC R%02d,R%02d", reg1, reg2); break;
+ case 2: sprintf(buffer, "ADDQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 3: sprintf(buffer, "ADDQT $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 4: sprintf(buffer, "SUB R%02d,R%02d", reg1, reg2); break;
+ case 5: sprintf(buffer, "SUBC R%02d,R%02d", reg1, reg2); break;
+ case 6: sprintf(buffer, "SUBQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 7: sprintf(buffer, "SUBQT $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 8: sprintf(buffer, "NEG R%02d", reg2); break;
+ case 9: sprintf(buffer, "AND R%02d,R%02d", reg1, reg2); break;
+ case 10: sprintf(buffer, "OR R%02d,R%02d", reg1, reg2); break;
+ case 11: sprintf(buffer, "XOR R%02d,R%02d", reg1, reg2); break;
+ case 12: sprintf(buffer, "NOT R%02d", reg2); break;
+ case 13: sprintf(buffer, "BTST $%X,R%02d", reg1, reg2); break;
+ case 14: sprintf(buffer, "BSET $%X,R%02d", reg1, reg2); break;
+ case 15: sprintf(buffer, "BCLR $%X,R%02d", reg1, reg2); break;
+ case 16: sprintf(buffer, "MULT R%02d,R%02d", reg1, reg2); break;
+ case 17: sprintf(buffer, "IMULT R%02d,R%02d", reg1, reg2); break;
+ case 18: sprintf(buffer, "IMULTN R%02d,R%02d", reg1, reg2); break;
+ case 19: sprintf(buffer, "RESMAC R%02d", reg2); break;
+ case 20: sprintf(buffer, "IMACN R%02d,R%02d", reg1, reg2); break;
+ case 21: sprintf(buffer, "DIV R%02d,R%02d", reg1, reg2); break;
+ case 22: sprintf(buffer, "ABS R%02d", reg2); break;
+ case 23: sprintf(buffer, "SH R%02d,R%02d", reg1, reg2); break;
+ case 24: sprintf(buffer, "SHLQ $%X,R%02d", 32 - convert_zero[reg1], reg2); break;
+ case 25: sprintf(buffer, "SHRQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 26: sprintf(buffer, "SHA R%02d,R%02d", reg1, reg2); break;
+ case 27: sprintf(buffer, "SHARQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 28: sprintf(buffer, "ROR R%02d,R%02d", reg1, reg2); break;
+ case 29: sprintf(buffer, "RORQ $%X,R%02d", convert_zero[reg1], reg2); break;
+ case 30: sprintf(buffer, "CMP R%02d,R%02d", reg1, reg2); break;
+ case 31: sprintf(buffer, "CMPQ %s,R%02d", signed_16bit((INT16)(reg1 << 11) >> 11), reg2);break;