X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fv6809.cpp;h=487493762f5a947db704d4a2eb9337beaffc5145;hb=7c0ff1ece391810183f1d37923a66bf30de480ee;hp=c8e081a7a72ff419acbb7aa328fef2a09370756e;hpb=bb29b68685bde915f16113f5400dbbdb7be6c097;p=thunder

diff --git a/src/v6809.cpp b/src/v6809.cpp
index c8e081a..4874937 100755
--- a/src/v6809.cpp
+++ b/src/v6809.cpp
@@ -637,18 +637,47 @@ static void Op17(void)							// LBSR
 
 static void Op19(void)  // DAA
 {
-  if ((regs.cc&0x20) || ((regs.a&0x0F) > 0x09))    // H set or lo nyb too big?
-  {
-    regs.a += 0x06;  regs.cc |= 0x20;              // Then adjust & set half carry
-  }
-  if ((regs.cc&0x01) || (regs.a > 0x9F))           // C set or hi nyb too big?
-  {
-    regs.a += 0x60;  regs.cc |= 0x01;              // Then adjust & set carry
-  }
-  regs.cc &= 0xF1;                             // CL NZV
-  if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
-  if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
-  regs.clock += 2;
+#if 0
+	uint8 result = regs.a;
+
+	if ((regs.cc&0x20) || ((regs.a&0x0F) > 0x09))    // H set or lo nyb too big?
+	{
+//		regs.a += 0x06;
+		result += 0x06;
+		regs.cc |= 0x20;              // Then adjust & set half carry
+	}
+
+	if ((regs.cc&0x01) || (regs.a > 0x9F))           // C set or hi nyb too big?
+	{
+//		regs.a += 0x60;
+		result += 0x60;
+		regs.cc |= 0x01;              // Then adjust & set carry
+	}
+
+	regs.a = result;
+
+	regs.cc &= 0xF1;                             // CL NZV
+	if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
+	if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
+#else
+	uint16 result = (uint16)regs.a;
+
+	if ((regs.a & 0x0F) > 0x09 || (regs.cc & FLAG_H))
+		result += 0x06;
+
+	if ((regs.a & 0xF0) > 0x90 || (regs.cc & FLAG_C) || ((regs.a & 0xF0) > 0x80 && (regs.a & 0x0F) > 0x09))
+		result += 0x60;
+
+	regs.a = (uint8)result;
+//	SET_ZN(result);
+//	CLR_V;										// Not sure this is correct...
+	regs.cc &= 0xF1;                             // CL NZV
+	if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
+	if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
+//	flagC |= (result & 0x100) >> 8;				// Overwrite carry if it was 0, otherwise, ignore
+	regs.cc |= (result & 0x100) > 8;
+#endif
+	regs.clock += 2;
 }
 
 static void Op1A(void)									// ORCC #
@@ -3126,7 +3155,9 @@ btPtr = (btPtr + 1) & 0xFF;//*/
 
 		// Handle any pending interrupts
 
-		uint32 flags = context->cpuFlags;
+// Hmm, this is bad and only works when flags are changed OUTSIDE of the running context...
+//		uint32 flags = context->cpuFlags;
+		uint32 flags = regs.cpuFlags;
 
 		if (flags & V6809_ASSERT_LINE_RESET)			// *** RESET handler ***
 		{
@@ -3268,5 +3299,46 @@ void SetLineOfCurrentV6809(uint32 line)
 // Clear a line of the currently executing CPU
 void ClearLineOfCurrentV6809(uint32 line)
 {
+#ifdef __DEBUG__
+if (disasm)
+	WriteLog("V6809: Clearing line %s...", (line == V6809_ASSERT_LINE_IRQ ? "IRQ" : "OTHER"));
+#endif
 	regs.cpuFlags &= ~line;
 }
+
+/*
+Small problem: IRQ is not getting cleared!
+
+
+820E: 9A 01          ORA   $01
+V6809: IRQ line asserted!
+        CC=EF-I-Z-- A=00 B=00 DP=56 X=533C Y=53C0 S=57EE U=8215 PC=8210
+8210: A6 C6          LDA   (A),U
+V6809: IRQ line asserted!
+        CC=EF-I---- A=01 B=00 DP=56 X=533C Y=53C0 S=57EE U=8215 PC=8212
+
+*** CONTEXT SWITCH ***
+
+818E: B7 80 00       STA   $8000
+V6809: IRQ line asserted!
+        CC=EF-I---- A=02 B=00 DP=16 X=81AD Y=6224 S=03F2 U=89D7 PC=8191
+8191: B7 88 00       STA   $8800
+WriteMem: CPU #2 Acknowledging IRQ...
+V6809: Clearing line IRQ...
+V6809: IRQ line asserted!
+        CC=EF-I---- A=02 B=00 DP=16 X=81AD Y=6224 S=03F2 U=89D7 PC=8194
+8194: 3B             RTI
+V6809: IRQ line asserted!
+       IRQ taken...
+        CC=EF-I-Z-- A=03 B=00 DP=16 X=1308 Y=6224 S=03F2 U=B0DC PC=8173
+
+*** CONTEXT SWITCH ***
+
+8212: 97 1E          STA   $1E
+V6809: IRQ line asserted!
+        CC=EF-I---- A=01 B=00 DP=56 X=533C Y=53C0 S=57EE U=8215 PC=8214
+8214: 39             RTS
+V6809: IRQ line asserted!
+
+
+*/
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