X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fv6808.cpp;h=ac1352ce49652775b3755e08c6e85d985f441bf0;hb=e3ad811139308bfe8a818cf5e42e7553785fea82;hp=b1095eb3604a281b71dc3feb1967ffeebd6a303e;hpb=0c6f353827a94eb52c21e677658000f98452b247;p=stargem2 diff --git a/src/v6808.cpp b/src/v6808.cpp index b1095eb..ac1352c 100755 --- a/src/v6808.cpp +++ b/src/v6808.cpp @@ -20,7 +20,7 @@ // NOTE: V6808_STATE_WAI is not handled in the main loop correctly. !!! FIX !!! // Some random thoughts: Could there be a performance gain by breaking -// out the flags in regs.cc into separate uint8 variables (or bools)? +// out the flags in regs.cc into separate uint8_t variables (or bools)? // You'd have to convert on entering and exiting the emulation loop, but I // think the perfomance hit would be negligible compared to the gain in not // having to mask and shift flags all the time. Investigate after the @@ -50,14 +50,14 @@ #define SET_N(r) (flagN = ((r) & 0x80) >> 7) #define SET_V(a,b,r) (flagV = (((b) ^ (a) ^ (r) ^ ((r) >> 1)) & 0x80) >> 7) -#define SET_C_CMP(a,b) (flagC = ((uint8)(b) < (uint8)(a) ? 1 : 0)) +#define SET_C_CMP(a,b) (flagC = ((uint8_t)(b) < (uint8_t)(a) ? 1 : 0)) #define SET_ZN(r) SET_N(r); SET_Z(r) #define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b) #define SET_ZNVC_CMP(a,b,r) SET_N(r); SET_Z(r); SET_C_CMP(a,b); SET_V(a,b,r) #define SET_N16(r) (flagN = ((r) & 0x8000) >> 15) #define SET_V16(a,b,r) (flagV = (((b) ^ (a) ^ (r) ^ ((r) >> 1)) & 0x8000) >> 15) -#define SET_C_CMP16(a,b) (flagC = ((uint16)(b) < (uint16)(a) ? 1 : 0)) +#define SET_C_CMP16(a,b) (flagC = ((uint16_t)(b) < (uint16_t)(a) ? 1 : 0)) #define SET_ZNVC_CMP16(a,b,r) SET_N16(r); SET_Z(r); SET_C_CMP16(a,b); SET_V16(a,b,r) #define EA_IMM regs.pc++ @@ -75,10 +75,10 @@ #define READ_ZP_X16 RdMemW(EA_ZP_X) #define READ_ABS16 RdMemW(EA_ABS) -#define READ_IMM_WB(v) uint16 addr = EA_IMM; v = regs.RdMem(addr) -#define READ_ZP_WB(v) uint16 addr = EA_ZP; v = regs.RdMem(addr) -#define READ_ZP_X_WB(v) uint16 addr = EA_ZP_X; v = regs.RdMem(addr) -#define READ_ABS_WB(v) uint16 addr = EA_ABS; v = regs.RdMem(addr) +#define READ_IMM_WB(v) uint16_t addr = EA_IMM; v = regs.RdMem(addr) +#define READ_ZP_WB(v) uint16_t addr = EA_ZP; v = regs.RdMem(addr) +#define READ_ZP_X_WB(v) uint16_t addr = EA_ZP_X; v = regs.RdMem(addr) +#define READ_ABS_WB(v) uint16_t addr = EA_ABS; v = regs.RdMem(addr) #define WRITE_BACK(d) regs.WrMem(addr, (d)) @@ -98,9 +98,9 @@ // Private global variables static V6808REGS regs; -static uint8 flagH, flagI, flagN, flagZ, flagV, flagC; +static uint8_t flagH, flagI, flagN, flagZ, flagV, flagC; -static uint8 CPUCycles[256] = { +static uint8_t CPUCycles[256] = { 1, 2, 1, 1, 1, 1, 2, 2, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 1, 2, 1, 2, 1, 1, 1, 1, 4, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, @@ -121,24 +121,24 @@ static uint8 CPUCycles[256] = { // Private function prototypes -static uint16 RdMemW(uint16); -static uint16 FetchMemW(uint16); +static uint16_t RdMemW(uint16_t); +static uint16_t FetchMemW(uint16_t); // // Read a word out of 6808 memory (little endian format) // -static inline uint16 RdMemW(uint16 address) +static inline uint16_t RdMemW(uint16_t address) { - return (uint16)(regs.RdMem(address) << 8) | regs.RdMem(address + 1); + return (uint16_t)(regs.RdMem(address) << 8) | regs.RdMem(address + 1); } // // Fetch a word out of 6808 memory (little endian format). Increments PC // -static inline uint16 FetchMemW(uint16 address) +static inline uint16_t FetchMemW(uint16_t address) { regs.pc += 2; - return (uint16)(regs.RdMem(address) << 8) | regs.RdMem(address + 1); + return (uint16_t)(regs.RdMem(address) << 8) | regs.RdMem(address + 1); } // @@ -161,7 +161,7 @@ Add Accumulators |ABA | | | | |1B 2 1|A=A+B |T T // ADD opcodes #define OP_ADD_HANDLER(m, acc) \ - uint16 sum = (uint16)(acc) + (m); \ + uint16_t sum = (uint16_t)(acc) + (m); \ flagC = sum >> 8; \ flagH = (sum >> 4) & 0x01; \ SET_V(m, acc, sum); \ @@ -170,49 +170,49 @@ Add Accumulators |ABA | | | | |1B 2 1|A=A+B |T T static void Op8B(void) // ADDA # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_ADD_HANDLER(m, regs.a); } static void Op9B(void) // ADDA ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_ADD_HANDLER(m, regs.a); } static void OpAB(void) // ADDA ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_ADD_HANDLER(m, regs.a); } static void OpBB(void) // ADDA ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_ADD_HANDLER(m, regs.a); } static void OpCB(void) // ADDB # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_ADD_HANDLER(m, regs.b); } static void OpDB(void) // ADDB ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_ADD_HANDLER(m, regs.b); } static void OpEB(void) // ADDB ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_ADD_HANDLER(m, regs.b); } static void OpFB(void) // ADDB ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_ADD_HANDLER(m, regs.b); } @@ -231,7 +231,7 @@ Add with Carry |ADCA |89 2 2|99 3 2|A9 5 2|B9 4 3| |A=A+M+C |T T // ADC opcodes #define OP_ADC_HANDLER(m, acc) \ - uint16 sum = (uint16)acc + (m) + (uint16)flagC; \ + uint16_t sum = (uint16_t)acc + (m) + (uint16_t)flagC; \ flagC = sum >> 8; \ flagH = (sum >> 4) & 0x01; \ SET_V(m, acc, sum); \ @@ -240,49 +240,49 @@ Add with Carry |ADCA |89 2 2|99 3 2|A9 5 2|B9 4 3| |A=A+M+C |T T static void Op89(void) // ADCA # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_ADC_HANDLER(m, regs.a); } static void Op99(void) // ADCA ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_ADC_HANDLER(m, regs.a); } static void OpA9(void) // ADCA ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_ADC_HANDLER(m, regs.a); } static void OpB9(void) // ADCA ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_ADC_HANDLER(m, regs.a); } static void OpC9(void) // ADCB # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_ADC_HANDLER(m, regs.b); } static void OpD9(void) // ADCB ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_ADC_HANDLER(m, regs.b); } static void OpE9(void) // ADCB ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_ADC_HANDLER(m, regs.b); } static void OpF9(void) // ADCB ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_ADC_HANDLER(m, regs.b); } @@ -302,49 +302,49 @@ And |ANDA |84 2 2|94 3 2|A4 5 2|B4 4 3| |A=A+M | T static void Op84(void) // ANDA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_AND_HANDLER(m, regs.a); } static void Op94(void) // ANDA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_AND_HANDLER(m, regs.a); } static void OpA4(void) // ANDA ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_AND_HANDLER(m, regs.a); } static void OpB4(void) // ANDA ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_AND_HANDLER(m, regs.a); } static void OpC4(void) // ANDB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_AND_HANDLER(m, regs.b); } static void OpD4(void) // ANDB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_AND_HANDLER(m, regs.b); } static void OpE4(void) // ANDB ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_AND_HANDLER(m, regs.b); } static void OpF4(void) // ANDB ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_AND_HANDLER(m, regs.b); } @@ -358,54 +358,54 @@ Bit Test |BITA |85 2 2|95 3 2|A5 5 2|B5 4 3| |A+M | T // BIT opcodes #define OP_BIT_HANDLER(m, acc) \ - int8 result = acc & (m); \ + int8_t result = acc & (m); \ SET_ZN(result) static void Op85(void) // BITA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_BIT_HANDLER(m, regs.a); } static void Op95(void) // BITA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_BIT_HANDLER(m, regs.a); } static void OpA5(void) // BITA ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_BIT_HANDLER(m, regs.a); } static void OpB5(void) // BITA ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_BIT_HANDLER(m, regs.a); } static void OpC5(void) // BITB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_BIT_HANDLER(m, regs.b); } static void OpD5(void) // BITB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_BIT_HANDLER(m, regs.b); } static void OpE5(void) // BITB ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_BIT_HANDLER(m, regs.b); } static void OpF5(void) // BITB ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_BIT_HANDLER(m, regs.b); } @@ -462,54 +462,54 @@ Compare sets flags as if a subtraction had been carried out. If the value in the */ #define OP_CMP_HANDLER(m, acc) \ - uint16 result = acc - (m); \ + uint16_t result = acc - (m); \ SET_ZNVC_CMP(m, acc, result) static void Op81(void) // CMPA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_CMP_HANDLER(m, regs.a); } static void Op91(void) // CMPA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_CMP_HANDLER(m, regs.a); } static void OpA1(void) // CMPA ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_CMP_HANDLER(m, regs.a); } static void OpB1(void) // CMPA ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_CMP_HANDLER(m, regs.a); } static void OpC1(void) // CMPB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_CMP_HANDLER(m, regs.b); } static void OpD1(void) // CMPB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_CMP_HANDLER(m, regs.b); } static void OpE1(void) // CMPB ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_CMP_HANDLER(m, regs.b); } static void OpF1(void) // CMPB ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_CMP_HANDLER(m, regs.b); } @@ -536,7 +536,7 @@ Complement 1's |COM | | |63 7 2|73 6 3| |M=-M | T static void Op63(void) // COM ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_COM_HANDLER(m); WRITE_BACK(m); @@ -544,7 +544,7 @@ static void Op63(void) // COM ZP, X static void Op73(void) // COM ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_COM_HANDLER(m); WRITE_BACK(m); @@ -578,7 +578,7 @@ Complement 2's |NEG | | |60 7 2|70 6 3| |M=00-M | T static void Op60(void) // NEG ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_NEG_HANDLER(m); WRITE_BACK(m); @@ -586,7 +586,7 @@ static void Op60(void) // NEG ZP, X static void Op70(void) // NEG ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_NEG_HANDLER(m); WRITE_BACK(m); @@ -610,7 +610,7 @@ Decimal Adjust |DAA | | | | |19 2 1|* | T static void Op19(void) // DAA { - uint16 result = (uint16)regs.a; + uint16_t result = (uint16_t)regs.a; if ((regs.a & 0x0F) > 0x09 || flagH) result += 0x06; @@ -618,7 +618,7 @@ static void Op19(void) // DAA if ((regs.a & 0xF0) > 0x90 || flagC || ((regs.a & 0xF0) > 0x80 && (regs.a & 0x0F) > 0x09)) result += 0x60; - regs.a = (uint8)result; + regs.a = (uint8_t)result; SET_ZN(result); CLR_V; // Not sure this is correct... flagC |= (result & 0x100) >> 8; // Overwrite carry if it was 0, otherwise, ignore @@ -641,7 +641,7 @@ Decrement |DEC | | |6A 7 2|7A 6 3| |M=M-1 | T static void Op6A(void) // DEC ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_DEC_HANDLER(m); WRITE_BACK(m); @@ -649,7 +649,7 @@ static void Op6A(void) // DEC ZP, X static void Op7A(void) // DEC ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_DEC_HANDLER(m); WRITE_BACK(m); @@ -681,49 +681,49 @@ Exclusive OR |EORA |88 2 2|98 3 2|A8 5 2|B8 4 3| |A=A(+)M | T static void Op88(void) // EORA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_EOR_HANDLER(m, regs.a); } static void Op98(void) // EORA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_EOR_HANDLER(m, regs.a); } static void OpA8(void) // EORA ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_EOR_HANDLER(m, regs.a); } static void OpB8(void) // EORA ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_EOR_HANDLER(m, regs.a); } static void OpC8(void) // EORB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_EOR_HANDLER(m, regs.b); } static void OpD8(void) // EORB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_EOR_HANDLER(m, regs.b); } static void OpE8(void) // EORB ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_EOR_HANDLER(m, regs.b); } static void OpF8(void) // EORB ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_EOR_HANDLER(m, regs.b); } @@ -744,7 +744,7 @@ Increment |INC | | |6C 7 2|7C 6 3| |M=M+1 | T static void Op6C(void) // INC ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_INC_HANDLER(m); WRITE_BACK(m); @@ -752,7 +752,7 @@ static void Op6C(void) // INC ZP, X static void Op7C(void) // INC ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_INC_HANDLER(m); WRITE_BACK(m); @@ -784,49 +784,49 @@ Load Accumulator |LDAA |86 2 2|96 3 2|A6 5 2|B6 4 3| |A=M | T static void Op86(void) // LDAA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_LDA_HANDLER(m, regs.a); } static void Op96(void) // LDAA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_LDA_HANDLER(m, regs.a); } static void OpA6(void) // LDAA ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_LDA_HANDLER(m, regs.a); } static void OpB6(void) // LDAA ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_LDA_HANDLER(m, regs.a); } static void OpC6(void) // LDAB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_LDA_HANDLER(m, regs.b); } static void OpD6(void) // LDAB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_LDA_HANDLER(m, regs.b); } static void OpE6(void) // LDAB ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_LDA_HANDLER(m, regs.b); } static void OpF6(void) // LDAB ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_LDA_HANDLER(m, regs.b); } @@ -846,49 +846,49 @@ OR, Inclusive |ORAA |8A 2 2|9A 3 2|AA 5 2|BA 4 3| |A=A+M | T static void Op8A(void) // ORAA # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_ORA_HANDLER(m, regs.a); } static void Op9A(void) // ORAA ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_ORA_HANDLER(m, regs.a); } static void OpAA(void) // ORAA ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_ORA_HANDLER(m, regs.a); } static void OpBA(void) // ORAA ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_ORA_HANDLER(m, regs.a); } static void OpCA(void) // ORAB # { - uint8 m = READ_IMM; + uint8_t m = READ_IMM; OP_ORA_HANDLER(m, regs.b); } static void OpDA(void) // ORAB ZP { - uint8 m = READ_ZP; + uint8_t m = READ_ZP; OP_ORA_HANDLER(m, regs.b); } static void OpEA(void) // ORAB ZP, X { - uint8 m = READ_ZP_X; + uint8_t m = READ_ZP_X; OP_ORA_HANDLER(m, regs.b); } static void OpFA(void) // ORAB ABS { - uint8 m = READ_ABS; + uint8_t m = READ_ABS; OP_ORA_HANDLER(m, regs.b); } @@ -932,7 +932,7 @@ Rotate Left |ROL | | |69 7 2|79 6 3| |Memory *1| T // ROL opcodes #define OP_ROL_HANDLER(m) \ - uint8 newCarry = (m & 0x80) >> 7; \ + uint8_t newCarry = (m & 0x80) >> 7; \ m = (m << 1) | flagC; \ SET_ZN(m); \ flagC = newCarry; \ @@ -940,7 +940,7 @@ Rotate Left |ROL | | |69 7 2|79 6 3| |Memory *1| T static void Op69(void) // ROL ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_ROL_HANDLER(m); WRITE_BACK(m); @@ -948,7 +948,7 @@ static void Op69(void) // ROL ZP, X static void Op79(void) // ROL ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_ROL_HANDLER(m); WRITE_BACK(m); @@ -975,7 +975,7 @@ Rotate Right |ROR | | |66 7 2|76 6 3| |Memory *2| T // ROR opcodes #define OP_ROR_HANDLER(m) \ - uint8 newCarry = m & 0x01; \ + uint8_t newCarry = m & 0x01; \ m = (m >> 1) | (flagC << 7); \ SET_ZN(m); \ flagC = newCarry; \ @@ -983,7 +983,7 @@ Rotate Right |ROR | | |66 7 2|76 6 3| |Memory *2| T static void Op66(void) // ROR ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_ROR_HANDLER(m); WRITE_BACK(m); @@ -991,7 +991,7 @@ static void Op66(void) // ROR ZP, X static void Op76(void) // ROR ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_ROR_HANDLER(m); WRITE_BACK(m); @@ -1018,7 +1018,7 @@ Arithmetic Shift Left |ASL | | |68 7 2|78 6 3| |Memory *3| T // ASL opcodes #define OP_ASL_HANDLER(m) \ - uint8 newCarry = (m & 0x80) >> 7; \ + uint8_t newCarry = (m & 0x80) >> 7; \ m <<= 1; \ SET_ZN(m); \ flagC = newCarry; \ @@ -1026,7 +1026,7 @@ Arithmetic Shift Left |ASL | | |68 7 2|78 6 3| |Memory *3| T static void Op68(void) // ASL ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_ASL_HANDLER(m); WRITE_BACK(m); @@ -1034,7 +1034,7 @@ static void Op68(void) // ASL ZP, X static void Op78(void) // ASL ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_ASL_HANDLER(m); WRITE_BACK(m); @@ -1061,7 +1061,7 @@ Arithmetic Shift Right |ASR | | |67 7 2|77 6 3| |Memory *4| T // ASR opcodes #define OP_ASR_HANDLER(m) \ - uint8 newCarry = m & 0x01; \ + uint8_t newCarry = m & 0x01; \ m = (m >> 1) | (m & 0x80); \ SET_ZN(m); \ flagC = newCarry; \ @@ -1069,7 +1069,7 @@ Arithmetic Shift Right |ASR | | |67 7 2|77 6 3| |Memory *4| T static void Op67(void) // ASR ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_ASR_HANDLER(m); WRITE_BACK(m); @@ -1077,7 +1077,7 @@ static void Op67(void) // ASR ZP, X static void Op77(void) // ASR ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_ASR_HANDLER(m); WRITE_BACK(m); @@ -1104,7 +1104,7 @@ Logic Shift Right |LSR | | |64 7 2|74 6 3| |Memory *5| T // LSR opcodes #define OP_LSR_HANDLER(m) \ - uint8 newCarry = m & 0x01; \ + uint8_t newCarry = m & 0x01; \ m >>= 1; \ SET_ZN(m); \ flagC = newCarry; \ @@ -1112,7 +1112,7 @@ Logic Shift Right |LSR | | |64 7 2|74 6 3| |Memory *5| T static void Op64(void) // LSR ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_LSR_HANDLER(m); WRITE_BACK(m); @@ -1120,7 +1120,7 @@ static void Op64(void) // LSR ZP, X static void Op74(void) // LSR ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_LSR_HANDLER(m); WRITE_BACK(m); @@ -1184,57 +1184,57 @@ Subtract Accumulators |SBA | | | | |10 2 1|A=A-B | T // SUB opcodes #define OP_SUB_HANDLER(m, acc) \ - uint16 sum = (uint16)acc - (m); \ + uint16_t sum = (uint16_t)acc - (m); \ flagC = sum >> 15; \ SET_V(m, acc, sum); \ - acc = (uint8)sum; \ + acc = (uint8_t)sum; \ SET_ZN(acc) static void Op80(void) // SUBA # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_SUB_HANDLER(m, regs.a); } static void Op90(void) // SUBA ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_SUB_HANDLER(m, regs.a); } static void OpA0(void) // SUBA ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_SUB_HANDLER(m, regs.a); } static void OpB0(void) // SUBA ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_SUB_HANDLER(m, regs.a); } static void OpC0(void) // SUBB # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_SUB_HANDLER(m, regs.b); } static void OpD0(void) // SUBB ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_SUB_HANDLER(m, regs.b); } static void OpE0(void) // SUBB ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_SUB_HANDLER(m, regs.b); } static void OpF0(void) // SUBB ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_SUB_HANDLER(m, regs.b); } @@ -1253,57 +1253,57 @@ Subtract with Carry |SBCA |82 2 2|92 3 2|A2 5 2|B2 4 3| |A=A-M-C | T // SBC opcodes #define OP_SBC_HANDLER(m, acc) \ - uint16 sum = (uint16)acc - (m) - (uint16)flagC; \ + uint16_t sum = (uint16_t)acc - (m) - (uint16_t)flagC; \ flagC = sum >> 15; \ SET_V(m, acc, sum); \ - acc = (uint8)sum; \ + acc = (uint8_t)sum; \ SET_ZN(acc) static void Op82(void) // SBCA # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_SBC_HANDLER(m, regs.a); } static void Op92(void) // SBCA ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_SBC_HANDLER(m, regs.a); } static void OpA2(void) // SBCA ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_SBC_HANDLER(m, regs.a); } static void OpB2(void) // SBCA ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_SBC_HANDLER(m, regs.a); } static void OpC2(void) // SBCB # { - uint16 m = READ_IMM; + uint16_t m = READ_IMM; OP_SBC_HANDLER(m, regs.b); } static void OpD2(void) // SBCB ZP { - uint16 m = READ_ZP; + uint16_t m = READ_ZP; OP_SBC_HANDLER(m, regs.b); } static void OpE2(void) // SBCB ZP, X { - uint16 m = READ_ZP_X; + uint16_t m = READ_ZP_X; OP_SBC_HANDLER(m, regs.b); } static void OpF2(void) // SBCB ABS { - uint16 m = READ_ABS; + uint16_t m = READ_ABS; OP_SBC_HANDLER(m, regs.b); } @@ -1344,7 +1344,7 @@ Test, Zero/Minus |TST | | |6D 7 2|7D 6 3| |M-00 | T static void Op6D(void) // TST ZP, X { - uint8 m; + uint8_t m; READ_ZP_X_WB(m); OP_TST_HANDLER(m); WRITE_BACK(m); @@ -1352,7 +1352,7 @@ static void Op6D(void) // TST ZP, X static void Op7D(void) // TST ABS { - uint8 m; + uint8_t m; READ_ABS_WB(m); OP_TST_HANDLER(m); WRITE_BACK(m); @@ -1381,30 +1381,30 @@ Compare sets flags as if a subtraction had been carried out. If the value in the */ #define OP_CPX_HANDLER(m) \ - uint32 result = regs.x - (m); \ + uint32_t result = regs.x - (m); \ SET_ZNVC_CMP16(m, regs.x, result) static void Op8C(void) // CPX # { - uint16 m = READ_IMM16; + uint16_t m = READ_IMM16; OP_CPX_HANDLER(m); } static void Op9C(void) // CPX ZP { - uint16 m = READ_ZP16; + uint16_t m = READ_ZP16; OP_CPX_HANDLER(m); } static void OpAC(void) // CPX ZP, X { - uint16 m = READ_ZP_X16; + uint16_t m = READ_ZP_X16; OP_CPX_HANDLER(m); } static void OpBC(void) // CPX ABS { - uint16 m = READ_ABS16; + uint16_t m = READ_ABS16; OP_CPX_HANDLER(m); } @@ -1519,37 +1519,37 @@ Store Stack Pointer |STS | |9F 5 2|AF 7 2|BF 6 3| |Formula 5 | 9 static void OpDF(void) // STX ZP { - uint16 m = EA_ZP; + uint16_t m = EA_ZP; OP_ST_HANDLER(m, regs.x); } static void OpEF(void) // STX ZP, X { - uint16 m = EA_ZP_X; + uint16_t m = EA_ZP_X; OP_ST_HANDLER(m, regs.x); } static void OpFF(void) // STX ABS { - uint16 m = EA_ABS; + uint16_t m = EA_ABS; OP_ST_HANDLER(m, regs.x); } static void Op9F(void) // STS ZP { - uint16 m = EA_ZP; + uint16_t m = EA_ZP; OP_ST_HANDLER(m, regs.s); } static void OpAF(void) // STS ZP, X { - uint16 m = EA_ZP_X; + uint16_t m = EA_ZP_X; OP_ST_HANDLER(m, regs.s); } static void OpBF(void) // STS ABS { - uint16 m = EA_ABS; + uint16_t m = EA_ABS; OP_ST_HANDLER(m, regs.s); } @@ -1592,7 +1592,7 @@ Plus |BPL | |2A 4 2| | | |N=0 | static void Op20(void) // BRA { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; regs.pc += m; } @@ -1601,7 +1601,7 @@ static void Op24(void) // BCC // NOTE: We can optimize this by following the maxim: "Don't branch!" by converting the boolean // result into a multiplication. The only way to know if this is a win is to do some profiling // both with and without the optimization. - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION //Note sure if the ! operator will do what we want, so we use ^ 1 @@ -1614,7 +1614,7 @@ static void Op24(void) // BCC static void Op25(void) // BCS { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagC); @@ -1626,7 +1626,7 @@ static void Op25(void) // BCS static void Op27(void) // BEQ { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagZ); @@ -1638,7 +1638,7 @@ static void Op27(void) // BEQ static void Op2C(void) // BGE { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * ((flagN ^ flagV) ^ 0x01); @@ -1650,7 +1650,7 @@ static void Op2C(void) // BGE static void Op2E(void) // BGT { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * ((flagZ | (flagN ^ flagV)) ^ 0x01); @@ -1662,7 +1662,7 @@ static void Op2E(void) // BGT static void Op22(void) // BHI { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * ((flagZ | flagC) ^ 0x01); @@ -1674,7 +1674,7 @@ static void Op22(void) // BHI static void Op2F(void) // BLE { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagZ | (flagN ^ flagV)); @@ -1686,7 +1686,7 @@ static void Op2F(void) // BLE static void Op23(void) // BLS { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagZ | flagC); @@ -1698,7 +1698,7 @@ static void Op23(void) // BLS static void Op2D(void) // BLT { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagN ^ flagV); @@ -1710,7 +1710,7 @@ static void Op2D(void) // BLT static void Op2B(void) // BMI { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagN); @@ -1722,7 +1722,7 @@ static void Op2B(void) // BMI static void Op26(void) // BNE { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagZ ^ 0x01); @@ -1734,7 +1734,7 @@ static void Op26(void) // BNE static void Op28(void) // BVC { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagV ^ 0x01); @@ -1746,7 +1746,7 @@ static void Op28(void) // BVC static void Op29(void) // BVS { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagV); @@ -1758,7 +1758,7 @@ static void Op29(void) // BVS static void Op2A(void) // BPL { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; #ifdef TEST_DONT_BRANCH_OPTIMIZATION regs.pc += m * (flagN ^ 0x01); @@ -1778,7 +1778,7 @@ Jump to Subroutine |JSR | | |AD 8 2|BD 9 3| | | static void Op8D(void) // BSR { - int16 m = (int16)(int8)READ_IMM; + int16_t m = (int16_t)(int8_t)READ_IMM; PUSH16(regs.pc); regs.pc += m; } @@ -1795,14 +1795,14 @@ static void Op7E(void) // JMP ABS static void OpAD(void) // JSR ZP, X { - uint16 m = EA_ZP_X; + uint16_t m = EA_ZP_X; PUSH16(regs.pc); regs.pc = m; } static void OpBD(void) // JSR ABS { - uint16 m = EA_ABS; + uint16_t m = EA_ABS; PUSH16(regs.pc); regs.pc = m; } @@ -2006,11 +2006,11 @@ void (* exec_op[256])() = { // // Internal "memcpy" (so we don't have to link with any external libraries!) // -static void myMemcpy(void * dst, void * src, uint32 size) +static void myMemcpy(void * dst, void * src, uint32_t size) { - uint8 * d = (uint8 *)dst, * s = (uint8 *)src; + uint8_t * d = (uint8_t *)dst, * s = (uint8_t *)src; - for(uint32 i=0; i