X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fjaguar.cpp;h=e75ac0ad32aaf0ff02685b8561fad963d6a82fca;hb=4beff2f35f649bb0befa58c8a89fdd702b3c9b4f;hp=0a54ea4ba1579d5d47f78b44d2e57f4bf128c030;hpb=d239de704f276a75d927900e3d413a44cc87116c;p=virtualjaguar diff --git a/src/jaguar.cpp b/src/jaguar.cpp index 0a54ea4..e75ac0a 100644 --- a/src/jaguar.cpp +++ b/src/jaguar.cpp @@ -7,21 +7,31 @@ // Note: Endian wrongness probably stems from the MAME origins of this emu and // the braindead way in which MAME handles memory. :-) // +// JLH = James L. Hammons +// +// WHO WHEN WHAT +// --- ---------- ----------------------------------------------------------- +// JLH 11/25/2009 Major rewrite of memory subsystem and handlers +// #include "jaguar.h" #include #include "SDL_opengl.h" +#include "blitter.h" #include "cdrom.h" +#include "dac.h" #include "dsp.h" +#include "eeprom.h" #include "event.h" #include "gpu.h" -#include "gui.h" +//#include "gui.h" #include "jerry.h" #include "joystick.h" #include "log.h" #include "m68k.h" -#include "memory.h" +//#include "memory.h" +#include "mmu.h" #include "settings.h" #include "tom.h" #include "video.h" @@ -44,26 +54,16 @@ void M68K_show_context(void); // External variables -//extern bool hardwareTypeNTSC; // Set to false for PAL #ifdef CPU_DEBUG_MEMORY extern bool startMemLog; // Set by "e" key extern int effect_start; extern int effect_start2, effect_start3, effect_start4, effect_start5, effect_start6; #endif -// Memory debugging identifiers - -const char * whoName[9] = - { "Unknown", "Jaguar", "DSP", "GPU", "TOM", "JERRY", "M68K", "Blitter", "OP" }; - uint32 jaguar_active_memory_dumps = 0; -uint32 jaguarMainRomCRC32, jaguarRomSize, jaguarRunAddress; +uint32 jaguarMainROMCRC32, jaguarROMSize, jaguarRunAddress; -uint8 * jaguarMainRam = NULL; -uint8 * jaguarMainRom = NULL; -uint8 * jaguarBootRom = NULL; -uint8 * jaguarCDBootROM = NULL; bool BIOSLoaded = false; bool CDBIOSLoaded = false; @@ -81,7 +81,8 @@ uint32 pcQPtr = 0; // void GPUDumpDisassembly(void); void GPUDumpRegisters(void); - static bool start = false; +static bool start = false; + void M68KInstructionHook(void) { uint32 m68kPC = m68k_get_reg(NULL, M68K_REG_PC); @@ -346,6 +347,431 @@ CD_switch:: -> $306C #endif } +#if 0 +Now here be dragons... +Here is how memory ranges are defined in the CoJag driver. +Note that we only have to be concerned with 3 entities read/writing anything: +The main CPU, the GPU, and the DSP. Everything else is unnecessary. So we can keep our main memory +checking in jaguar.cpp, gpu.cpp and dsp.cpp. There should be NO checking in TOM, JERRY, etc. other than +things that are entirely internal to those modules. This way we should be able to get a handle on all +this crap which is currently scattered over Hell's Half Acre(tm). + +Also: We need to distinguish whether or not we need .b, .w, and .dw versions of everything, or if there +is a good way to collapse that shit (look below for inspiration). Current method works, but is error prone. + +/************************************* + * + * Main CPU memory handlers + * + *************************************/ + +static ADDRESS_MAP_START( m68020_map, ADDRESS_SPACE_PROGRAM, 32 ) + AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_BASE(&jaguar_shared_ram) AM_SHARE(1) + AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_BASE(&rom_base) + AM_RANGE(0xa00000, 0xa1ffff) AM_RAM + AM_RANGE(0xa20000, 0xa21fff) AM_READWRITE(eeprom_data_r, eeprom_data_w) AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size) + AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w) + AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w) + AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w) + AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(2) + AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w) + AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w) + AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2) + AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w) + AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_RAM AM_BASE(&jaguar_gpu_ram) AM_SHARE(3) + AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) + AM_RANGE(0xf16000, 0xf1600b) AM_READ(cojag_gun_input_r) // GPI02 + AM_RANGE(0xf17000, 0xf17003) AM_READ(status_r) // GPI03 +// AM_RANGE(0xf17800, 0xf17803) AM_WRITE(latch_w) // GPI04 + AM_RANGE(0xf17c00, 0xf17c03) AM_READ(jamma_r) // GPI05 + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) + AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w) + AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_BASE(&jaguar_dsp_ram) AM_SHARE(4) +ADDRESS_MAP_END + +/************************************* + * + * GPU memory handlers + * + *************************************/ + +static ADDRESS_MAP_START( gpu_map, ADDRESS_SPACE_PROGRAM, 32 ) + AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1) + AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8) + AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9) + AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w) + AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w) + AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE(2) + AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w) + AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w) + AM_RANGE(0xf03000, 0xf03fff) AM_RAM AM_SHARE(3) + AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) +ADDRESS_MAP_END + +/************************************* + * + * DSP memory handlers + * + *************************************/ + +static ADDRESS_MAP_START( dsp_map, ADDRESS_SPACE_PROGRAM, 32 ) + AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1) + AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8) + AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9) + AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) + AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) + AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w) + AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_SHARE(4) + AM_RANGE(0xf1d000, 0xf1dfff) AM_READ(jaguar_wave_rom_r) AM_BASE(&jaguar_wave_rom) +ADDRESS_MAP_END +*/ +#endif + +//#define EXPERIMENTAL_MEMORY_HANDLING +// Experimental memory mappage... +// Dunno if this is a good approach or not, but it seems to make better +// sense to have all this crap in one spot intstead of scattered all over +// the place the way it is now. +#ifdef EXPERIMENTAL_MEMORY_HANDLING +// Needed defines... +#define NEW_TIMER_SYSTEM + +/* +uint8 jaguarMainRAM[0x400000]; // 68K CPU RAM +uint8 jaguarMainROM[0x600000]; // 68K CPU ROM +uint8 jaguarBootROM[0x040000]; // 68K CPU BIOS ROM--uses only half of this! +uint8 jaguarCDBootROM[0x040000]; // 68K CPU CD BIOS ROM +bool BIOSLoaded = false; +bool CDBIOSLoaded = false; + +uint8 cdRAM[0x100]; +uint8 tomRAM[0x4000]; +uint8 jerryRAM[0x10000]; +static uint16 eeprom_ram[64]; + +// NOTE: CD BIOS ROM is read from cartridge space @ $802000 (it's a cartridge, after all) +*/ + +enum MemType { MM_NOP = 0, MM_RAM, MM_ROM, MM_IO }; + +// M68K Memory map/handlers +uint32 { + { 0x000000, 0x3FFFFF, MM_RAM, jaguarMainRAM }, + { 0x800000, 0xDFFEFF, MM_ROM, jaguarMainROM }, +// Note that this is really memory mapped I/O region... +// { 0xDFFF00, 0xDFFFFF, MM_RAM, cdRAM }, + { 0xDFFF00, 0xDFFF03, MM_IO, cdBUTCH }, // base of Butch == interrupt control register, R/W + { 0xDFFF04, 0xDFFF07, MM_IO, cdDSCNTRL }, // DSA control register, R/W + { 0xDFFF0A, 0xDFFF0B, MM_IO, cdDS_DATA }, // DSA TX/RX data, R/W + { 0xDFFF10, 0xDFFF13, MM_IO, cdI2CNTRL }, // i2s bus control register, R/W + { 0xDFFF14, 0xDFFF17, MM_IO, cdSBCNTRL }, // CD subcode control register, R/W + { 0xDFFF18, 0xDFFF1B, MM_IO, cdSUBDATA }, // Subcode data register A + { 0xDFFF1C, 0xDFFF1F, MM_IO, cdSUBDATB }, // Subcode data register B + { 0xDFFF20, 0xDFFF23, MM_IO, cdSB_TIME }, // Subcode time and compare enable (D24) + { 0xDFFF24, 0xDFFF27, MM_IO, cdFIFO_DATA }, // i2s FIFO data + { 0xDFFF28, 0xDFFF2B, MM_IO, cdI2SDAT2 }, // i2s FIFO data (old) + { 0xDFFF2C, 0xDFFF2F, MM_IO, cdUNKNOWN }, // Seems to be some sort of I2S interface + + { 0xE00000, 0xE3FFFF, MM_ROM, jaguarBootROM }, + +// { 0xF00000, 0xF0FFFF, MM_IO, TOM_REGS_RW }, + { 0xF00050, 0xF00051, MM_IO, tomTimerPrescaler }, + { 0xF00052, 0xF00053, MM_IO, tomTimerDivider }, + { 0xF00400, 0xF005FF, MM_RAM, tomRAM }, // CLUT A&B: How to link these? Write to one writes to the other... + { 0xF00600, 0xF007FF, MM_RAM, tomRAM }, // Actually, this is a good approach--just make the reads the same as well + //What about LBUF writes??? + { 0xF02100, 0xF0211F, MM_IO, GPUWriteByte }, // GPU CONTROL + { 0xF02200, 0xF0229F, MM_IO, BlitterWriteByte }, // BLITTER + { 0xF03000, 0xF03FFF, MM_RAM, GPUWriteByte }, // GPU RAM + + { 0xF10000, 0xF1FFFF, MM_IO, JERRY_REGS_RW }, + +/* + EEPROM: + { 0xF14001, 0xF14001, MM_IO_RO, eepromFOO } + { 0xF14801, 0xF14801, MM_IO_WO, eepromBAR } + { 0xF15001, 0xF15001, MM_IO_RW, eepromBAZ } + + JOYSTICK: + { 0xF14000, 0xF14003, MM_IO, joystickFoo } + 0 = pad0/1 button values (4 bits each), RO(?) + 1 = pad0/1 index value (4 bits each), WO + 2 = unused, RO + 3 = NTSC/PAL, certain button states, RO + +JOYSTICK $F14000 Read/Write + 15.....8 7......0 +Read fedcba98 7654321q f-1 Signals J15 to J1 + q Cartridge EEPROM output data +Write exxxxxxm 76543210 e 1 = enable J7-J0 outputs + 0 = disable J7-J0 outputs + x don't care + m Audio mute + 0 = Audio muted (reset state) + 1 = Audio enabled + 7-4 J7-J4 outputs (port 2) + 3-0 J3-J0 outputs (port 1) +JOYBUTS $F14002 Read Only + 15.....8 7......0 +Read xxxxxxxx rrdv3210 x don't care + r Reserved + d Reserved + v 1 = NTSC Video hardware + 0 = PAL Video hardware + 3-2 Button inputs B3 & B2 (port 2) + 1-0 Button inputs B1 & B0 (port 1) + +J4 J5 J6 J7 Port 2 B2 B3 J12 J13 J14 J15 +J3 J2 J1 J0 Port 1 B0 B1 J8 J9 J10 J11 + 0 0 0 0 + 0 0 0 1 + 0 0 1 0 + 0 0 1 1 + 0 1 0 0 + 0 1 0 1 + 0 1 1 0 + 0 1 1 1 Row 3 C3 Option # 9 6 3 + 1 0 0 0 + 1 0 0 1 + 1 0 1 0 + 1 0 1 1 Row 2 C2 C 0 8 5 2 + 1 1 0 0 + 1 1 0 1 Row 1 C1 B * 7 4 1 + 1 1 1 0 Row 0 Pause A Up Down Left Right + 1 1 1 1 + +0 bit read in any position means that button is pressed. +C3 = C2 = 1 means std. Jag. cntrlr. or nothing attached. +*/ +}; + +void WriteByte(uint32 address, uint8 byte, uint32 who/*=UNKNOWN*/) +{ + // Not sure, but I think the system only has 24 address bits... + address &= 0x00FFFFFF; + + // RAM ($000000 - $3FFFFF) 4M + if (address <= 0x3FFFFF) + jaguarMainRAM[address] = byte; + // hole ($400000 - $7FFFFF) 4M + else if (address <= 0x7FFFFF) + ; // Do nothing + // GAME ROM ($800000 - $DFFEFF) 6M - 256 bytes + else if (address <= 0xDFFEFF) + ; // Do nothing + // CDROM ($DFFF00 - $DFFFFF) 256 bytes + else if (address <= 0xDFFFFF) + { + cdRAM[address & 0xFF] = byte; +#ifdef CDROM_LOG + if ((address & 0xFF) < 12 * 4) + WriteLog("[%s] ", BReg[(address & 0xFF) / 4]); + WriteLog("CDROM: %s writing byte $%02X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC)); +#endif + } + // BIOS ROM ($E00000 - $E3FFFF) 256K + else if (address <= 0xE3FFFF) + ; // Do nothing + // hole ($E40000 - $EFFFFF) 768K + else if (address <= 0xEFFFFF) + ; // Do nothing + // TOM ($F00000 - $F0FFFF) 64K + else if (address <= 0xF0FFFF) +// ; // Do nothing + { + if (address == 0xF00050) + { + tomTimerPrescaler = (tomTimerPrescaler & 0x00FF) | ((uint16)byte << 8); + TOMResetPIT(); + return; + } + else if (address == 0xF00051) + { + tomTimerPrescaler = (tomTimerPrescaler & 0xFF00) | byte; + TOMResetPIT(); + return; + } + else if (address == 0xF00052) + { + tomTimerDivider = (tomTimerDivider & 0x00FF) | ((uint16)byte << 8); + TOMResetPIT(); + return; + } + else if (address == 0xF00053) + { + tomTimerDivider = (tomTimerDivider & 0xFF00) | byte; + TOMResetPIT(); + return; + } + else if (address >= 0xF00400 && address <= 0xF007FF) // CLUT (A & B) + { + // Writing to one CLUT writes to the other + address &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF) + tomRAM[address] = tomRAM[address + 0x200] = byte; + return; + } + //What about LBUF writes??? + else if ((address >= 0xF02100) && (address <= 0xF0211F)) // GPU CONTROL + { + GPUWriteByte(address, byte, who); + return; + } + else if ((address >= 0xF02200) && (address <= 0xF0229F)) // BLITTER + { + BlitterWriteByte(address, byte, who); + return; + } + else if ((address >= 0xF03000) && (address <= 0xF03FFF)) // GPU RAM + { + GPUWriteByte(address, byte, who); + return; + } + + tomRAM[address & 0x3FFF] = byte; + } + // JERRY ($F10000 - $F1FFFF) 64K + else if (address <= 0xF1FFFF) +// ; // Do nothing + { +#ifdef JERRY_DEBUG + WriteLog("jerry: writing byte %.2x at 0x%.6x\n", byte, address); +#endif + if ((address >= DSP_CONTROL_RAM_BASE) && (address < DSP_CONTROL_RAM_BASE+0x20)) + { + DSPWriteByte(address, byte, who); + return; + } + else if ((address >= DSP_WORK_RAM_BASE) && (address < DSP_WORK_RAM_BASE+0x2000)) + { + DSPWriteByte(address, byte, who); + return; + } + // SCLK ($F1A150--8 bits wide) +//NOTE: This should be taken care of in DAC... + else if ((address >= 0xF1A152) && (address <= 0xF1A153)) + { +// WriteLog("JERRY: Writing %02X to SCLK...\n", data); + if ((address & 0x03) == 2) + JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)byte << 8); + else + JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)byte; + + JERRYI2SInterruptTimer = -1; +#ifndef NEW_TIMER_SYSTEM + jerry_i2s_exec(0); +#else + RemoveCallback(JERRYI2SCallback); + JERRYI2SCallback(); +#endif +// return; + } + // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...) + else if (address >= 0xF1A148 && address <= 0xF1A157) + { + DACWriteByte(address, byte, who); + return; + } + else if (address >= 0xF10000 && address <= 0xF10007) + { +#ifndef NEW_TIMER_SYSTEM + switch (address & 0x07) + { + case 0: + JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (byte << 8); + JERRYResetPIT1(); + break; + case 1: + JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | byte; + JERRYResetPIT1(); + break; + case 2: + JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (byte << 8); + JERRYResetPIT1(); + break; + case 3: + JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | byte; + JERRYResetPIT1(); + break; + case 4: + JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (byte << 8); + JERRYResetPIT2(); + break; + case 5: + JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | byte; + JERRYResetPIT2(); + break; + case 6: + JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (byte << 8); + JERRYResetPIT2(); + break; + case 7: + JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | byte; + JERRYResetPIT2(); + } +#else +WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", address); +#endif + return; + } +/* else if ((offset >= 0xF10010) && (offset <= 0xF10015)) + { + clock_byte_write(offset, byte); + return; + }//*/ + // JERRY -> 68K interrupt enables/latches (need to be handled!) + else if (address >= 0xF10020 && address <= 0xF10023) + { +WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", byte, address); + } +/* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01)) + { + anajoy_byte_write(offset, byte); + return; + }*/ + else if ((address >= 0xF14000) && (address <= 0xF14003)) + { + JoystickWriteByte(address, byte); + EepromWriteByte(address, byte); + return; + } + else if ((address >= 0xF14004) && (address <= 0xF1A0FF)) + { + EepromWriteByte(address, byte); + return; + } +//Need to protect write attempts to Wavetable ROM (F1D000-FFF) + else if (address >= 0xF1D000 && address <= 0xF1DFFF) + return; + + jerryRAM[address & 0xFFFF] = byte; + } + // hole ($F20000 - $FFFFFF) 1M - 128K + else + ; // Do nothing +} + +void WriteWord(uint32 adddress, uint16 word) +{ +} + +void WriteDWord(uint32 adddress, uint32 dword) +{ +} + +uint8 ReadByte(uint32 adddress) +{ +} + +uint16 ReadWord(uint32 adddress) +{ +} + +uint32 ReadDWord(uint32 adddress) +{ +} +#endif + // // Musashi 68000 read/write/IRQ functions // @@ -365,6 +791,8 @@ int irq_ack_handler(int level) return vector; } +#define USE_NEW_MMU + unsigned int m68k_read_memory_8(unsigned int address) { #ifdef CPU_DEBUG_MEMORY @@ -379,15 +807,16 @@ unsigned int m68k_read_memory_8(unsigned int address) /* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076 || address == 0x1AF05E) WriteLog("[RM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, jaguar_mainRam[address]);//*/ +#ifndef USE_NEW_MMU unsigned int retVal = 0; if ((address >= 0x000000) && (address <= 0x3FFFFF)) - retVal = jaguarMainRam[address]; + retVal = jaguarMainRAM[address]; // else if ((address >= 0x800000) && (address <= 0xDFFFFF)) else if ((address >= 0x800000) && (address <= 0xDFFEFF)) - retVal = jaguarMainRom[address - 0x800000]; + retVal = jaguarMainROM[address - 0x800000]; else if ((address >= 0xE00000) && (address <= 0xE3FFFF)) - retVal = jaguarBootRom[address - 0xE00000]; + retVal = jaguarBootROM[address - 0xE00000]; else if ((address >= 0xDFFF00) && (address <= 0xDFFFFF)) retVal = CDROMReadByte(address); else if ((address >= 0xF00000) && (address <= 0xF0FFFF)) @@ -402,6 +831,9 @@ unsigned int m68k_read_memory_8(unsigned int address) //if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16) // WriteLog("M68K: Read byte $%02X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC)); return retVal; +#else + return MMURead8(address, M68K); +#endif } void gpu_dump_disassembly(void); @@ -469,16 +901,17 @@ unsigned int m68k_read_memory_16(unsigned int address) /* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076 || address == 0x1AF05E) WriteLog("[RM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, GET16(jaguar_mainRam, address));//*/ +#ifndef USE_NEW_MMU unsigned int retVal = 0; if ((address >= 0x000000) && (address <= 0x3FFFFE)) // retVal = (jaguar_mainRam[address] << 8) | jaguar_mainRam[address+1]; - retVal = GET16(jaguarMainRam, address); + retVal = GET16(jaguarMainRAM, address); // else if ((address >= 0x800000) && (address <= 0xDFFFFE)) else if ((address >= 0x800000) && (address <= 0xDFFEFE)) - retVal = (jaguarMainRom[address - 0x800000] << 8) | jaguarMainRom[address - 0x800000 + 1]; + retVal = (jaguarMainROM[address - 0x800000] << 8) | jaguarMainROM[address - 0x800000 + 1]; else if ((address >= 0xE00000) && (address <= 0xE3FFFE)) - retVal = (jaguarBootRom[address - 0xE00000] << 8) | jaguarBootRom[address - 0xE00000 + 1]; + retVal = (jaguarBootROM[address - 0xE00000] << 8) | jaguarBootROM[address - 0xE00000 + 1]; else if ((address >= 0xDFFF00) && (address <= 0xDFFFFE)) retVal = CDROMReadWord(address, M68K); else if ((address >= 0xF00000) && (address <= 0xF0FFFE)) @@ -497,6 +930,9 @@ unsigned int m68k_read_memory_16(unsigned int address) //if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16) // WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC)); return retVal; +#else + return MMURead16(address, M68K); +#endif } unsigned int m68k_read_memory_32(unsigned int address) @@ -506,7 +942,11 @@ unsigned int m68k_read_memory_32(unsigned int address) WriteLog("[RM32 PC=%08X] Addr: %08X, val: %08X\n", m68k_get_reg(NULL, M68K_REG_PC), address, (m68k_read_memory_16(address) << 16) | m68k_read_memory_16(address + 2));//*/ //WriteLog("--> [RM32]\n"); +#ifndef USE_NEW_MMU return (m68k_read_memory_16(address) << 16) | m68k_read_memory_16(address + 2); +#else + return MMURead32(address, M68K); +#endif } void m68k_write_memory_8(unsigned int address, unsigned int value) @@ -530,8 +970,9 @@ void m68k_write_memory_8(unsigned int address, unsigned int value) if (address >= 0x18FA70 && address < (0x18FA70 + 8000)) WriteLog("M68K: Byte %02X written at %08X by 68K\n", value, address);//*/ +#ifndef USE_NEW_MMU if ((address >= 0x000000) && (address <= 0x3FFFFF)) - jaguarMainRam[address] = value; + jaguarMainRAM[address] = value; else if ((address >= 0xDFFF00) && (address <= 0xDFFFFF)) CDROMWriteByte(address, value, M68K); else if ((address >= 0xF00000) && (address <= 0xF0FFFF)) @@ -540,6 +981,9 @@ void m68k_write_memory_8(unsigned int address, unsigned int value) JERRYWriteByte(address, value, M68K); else jaguar_unknown_writebyte(address, value, M68K); +#else + MMUWrite8(address, value, M68K); +#endif } void m68k_write_memory_16(unsigned int address, unsigned int value) @@ -587,11 +1031,12 @@ if (address == 0xF02110) || address == 0x1AF05E) WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/ +#ifndef USE_NEW_MMU if ((address >= 0x000000) && (address <= 0x3FFFFE)) { /* jaguar_mainRam[address] = value >> 8; jaguar_mainRam[address + 1] = value & 0xFF;*/ - SET16(jaguarMainRam, address, value); + SET16(jaguarMainRAM, address, value); } else if ((address >= 0xDFFF00) && (address <= 0xDFFFFE)) CDROMWriteWord(address, value, M68K); @@ -606,8 +1051,11 @@ if (address == 0xF02110) WriteLog("\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n", m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1), m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1)); -#endif } +#endif +#else + MMUWrite16(address, value, M68K); +#endif } void m68k_write_memory_32(unsigned int address, unsigned int value) @@ -625,8 +1073,12 @@ if (address == 0xF03214 && value == 0x88E30047) /* if (address == 0x51136 || address == 0xFB074) WriteLog("[WM32 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/ +#ifndef USE_NEW_MMU m68k_write_memory_16(address, value >> 16); m68k_write_memory_16(address + 2, value & 0xFFFF); +#else + MMUWrite32(address, value, M68K); +#endif } @@ -638,7 +1090,7 @@ uint32 JaguarGetHandler(uint32 i) bool JaguarInterruptHandlerIsValid(uint32 i) // Debug use only... { uint32 handler = JaguarGetHandler(i); - return (handler && (handler != 0xFFFFFFFF) ? 1 : 0); + return (handler && (handler != 0xFFFFFFFF) ? true : false); } void M68K_show_context(void) @@ -798,13 +1250,13 @@ uint8 JaguarReadByte(uint32 offset, uint32 who/*=UNKNOWN*/) offset &= 0xFFFFFF; if (offset < 0x400000) - data = jaguarMainRam[offset & 0x3FFFFF]; + data = jaguarMainRAM[offset & 0x3FFFFF]; else if ((offset >= 0x800000) && (offset < 0xC00000)) - data = jaguarMainRom[offset - 0x800000]; + data = jaguarMainROM[offset - 0x800000]; else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFF)) data = CDROMReadByte(offset, who); else if ((offset >= 0xE00000) && (offset < 0xE40000)) - data = jaguarBootRom[offset & 0x3FFFF]; + data = jaguarBootROM[offset & 0x3FFFF]; else if ((offset >= 0xF00000) && (offset < 0xF10000)) data = TOMReadByte(offset, who); else if ((offset >= 0xF10000) && (offset < 0xF20000)) @@ -820,18 +1272,18 @@ uint16 JaguarReadWord(uint32 offset, uint32 who/*=UNKNOWN*/) offset &= 0xFFFFFF; if (offset <= 0x3FFFFE) { - return (jaguarMainRam[(offset+0) & 0x3FFFFF] << 8) | jaguarMainRam[(offset+1) & 0x3FFFFF]; + return (jaguarMainRAM[(offset+0) & 0x3FFFFF] << 8) | jaguarMainRAM[(offset+1) & 0x3FFFFF]; } else if ((offset >= 0x800000) && (offset <= 0xBFFFFE)) { offset -= 0x800000; - return (jaguarMainRom[offset+0] << 8) | jaguarMainRom[offset+1]; + return (jaguarMainROM[offset+0] << 8) | jaguarMainROM[offset+1]; } // else if ((offset >= 0xDFFF00) && (offset < 0xDFFF00)) else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFE)) return CDROMReadWord(offset, who); else if ((offset >= 0xE00000) && (offset <= 0xE3FFFE)) - return (jaguarBootRom[(offset+0) & 0x3FFFF] << 8) | jaguarBootRom[(offset+1) & 0x3FFFF]; + return (jaguarBootROM[(offset+0) & 0x3FFFF] << 8) | jaguarBootROM[(offset+1) & 0x3FFFF]; else if ((offset >= 0xF00000) && (offset <= 0xF0FFFE)) return TOMReadWord(offset, who); else if ((offset >= 0xF10000) && (offset <= 0xF1FFFE)) @@ -850,7 +1302,7 @@ void JaguarWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/) offset &= 0xFFFFFF; if (offset < 0x400000) { - jaguarMainRam[offset & 0x3FFFFF] = data; + jaguarMainRAM[offset & 0x3FFFFF] = data; return; } else if ((offset >= 0xDFFF00) && (offset <= 0xDFFFFF)) @@ -978,8 +1430,8 @@ if (who == GPU && (gpu_pc == 0xF03604 || gpu_pc == 0xF03638)) if (offset == 0x11D31A + 0x48000 || offset == 0x11D31A) WriteLog("JWW: %s writing star %04X at %08X...\n", whoName[who], data, offset);//*/ - jaguarMainRam[(offset+0) & 0x3FFFFF] = data >> 8; - jaguarMainRam[(offset+1) & 0x3FFFFF] = data & 0xFF; + jaguarMainRAM[(offset+0) & 0x3FFFFF] = data >> 8; + jaguarMainRAM[(offset+1) & 0x3FFFFF] = data & 0xFF; return; } else if (offset >= 0xDFFF00 && offset <= 0xDFFFFE) @@ -1036,17 +1488,13 @@ void JaguarInit(void) memset(writeMemMin, 0xFF, 0x400000); memset(writeMemMax, 0x00, 0x400000); #endif - memory_malloc_secure((void **)&jaguarMainRam, 0x400000, "Jaguar 68K CPU RAM"); - memory_malloc_secure((void **)&jaguarMainRom, 0x600000, "Jaguar 68K CPU ROM"); - memory_malloc_secure((void **)&jaguarBootRom, 0x040000, "Jaguar 68K CPU BIOS ROM"); // Only uses half of this! - memory_malloc_secure((void **)&jaguarCDBootROM, 0x040000, "Jaguar 68K CPU CD BIOS ROM"); - memset(jaguarMainRam, 0x00, 0x400000); + memset(jaguarMainRAM, 0x00, 0x400000); // memset(jaguar_mainRom, 0xFF, 0x200000); // & set it to all Fs... // memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s... //NOTE: This *doesn't* fix FlipOut... //Or does it? Hmm... //Seems to want $01010101... Dunno why. Investigate! - memset(jaguarMainRom, 0x01, 0x600000); // & set it to all 01s... + memset(jaguarMainROM, 0x01, 0x600000); // & set it to all 01s... // memset(jaguar_mainRom, 0xFF, 0x600000); // & set it to all Fs... m68k_set_cpu_type(M68K_CPU_TYPE_68000); @@ -1065,9 +1513,9 @@ void JaguarReset(void) { //NOTE: This causes a (virtual) crash if this is set in the config but not found... !!! FIX !!! if (vjs.useJaguarBIOS) - memcpy(jaguarMainRam, jaguarBootRom, 8); + memcpy(jaguarMainRAM, jaguarBootROM, 8); else - SET32(jaguarMainRam, 4, jaguarRunAddress); + SET32(jaguarMainRAM, 4, jaguarRunAddress); // WriteLog("jaguar_reset():\n"); TOMReset(); @@ -1171,11 +1619,6 @@ void JaguarDone(void) DSPDone(); TOMDone(); JERRYDone(); - - memory_free(jaguarMainRom); - memory_free(jaguarMainRam); - memory_free(jaguarBootRom); - memory_free(jaguarCDBootROM); } // @@ -1197,14 +1640,13 @@ void JaguarExecute(uint32 * backbuffer, bool render) // uint16 vde = TOMReadWord(0xF00048); uint16 refreshRate = (vjs.hardwareTypeNTSC ? 60 : 50); + uint32 m68kClockRate = (vjs.hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL); //Not sure the above is correct, since the number of lines and timings given in the JTRM //seem to indicate the refresh rate is *half* the above... // uint16 refreshRate = (vjs.hardwareTypeNTSC ? 30 : 25); // Should these be hardwired or read from VP? Yes, from VP! - uint32 M68KCyclesPerScanline - = (vjs.hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL) / (vp * refreshRate); - uint32 RISCCyclesPerScanline - = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL) / (vp * refreshRate); + uint32 M68KCyclesPerScanline = m68kClockRate / (vp * refreshRate); + uint32 RISCCyclesPerScanline = m68kClockRate / (vp * refreshRate); TOMResetBackbuffer(backbuffer); /*extern int effect_start; @@ -1272,13 +1714,13 @@ void DumpMainMemory(void) if (fp == NULL) return; - fwrite(jaguarMainRam, 1, 0x400000, fp); + fwrite(jaguarMainRAM, 1, 0x400000, fp); fclose(fp); } uint8 * GetRamPtr(void) { - return jaguarMainRam; + return jaguarMainRAM; } //