X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fgpu.cpp;h=02fa112a37281ca310b7925de28b3b550b3458bb;hb=9af4fb023287b26dce01a36c65c9e30f56481051;hp=1d7afa79a3bfb46f0e75d553d98ab7d96dbf8e5b;hpb=4906545f5d77d6d7a006fa0d765dc0ae522e477f;p=virtualjaguar

diff --git a/src/gpu.cpp b/src/gpu.cpp
index 1d7afa7..02fa112 100644
--- a/src/gpu.cpp
+++ b/src/gpu.cpp
@@ -32,7 +32,7 @@
 #include "jagdasm.h"
 #include "jaguar.h"
 #include "log.h"
-#include "m68k.h"
+#include "m68000/m68kinterface.h"
 //#include "memory.h"
 #include "tom.h"
 
@@ -501,7 +501,11 @@ uint16 GPUReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
 uint32 GPUReadLong(uint32 offset, uint32 who/*=UNKNOWN*/)
 {
 	if (offset >= 0xF02000 && offset <= 0xF020FF)
-		WriteLog("GPU: ReadLong--Attempt to read from GPU register file by %s!\n", whoName[who]);
+	{
+		WriteLog("GPU: ReadLong--Attempt to read from GPU register file (%X) by %s!\n", offset, whoName[who]);
+		uint32 reg = (offset & 0xFC) >> 2;
+		return (reg < 32 ? gpu_reg_bank_0[reg] : gpu_reg_bank_1[reg - 32]); 
+	}
 
 //	if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
 	if ((offset >= GPU_WORK_RAM_BASE) && (offset <= GPU_WORK_RAM_BASE + 0x0FFC))
@@ -647,12 +651,15 @@ void GPUWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
 		{
 //WriteLog("[GPU W16:%08X,%04X]", offset, data);
 			uint32 old_data = GPUReadLong(offset & 0xFFFFFFC, who);
+
 			if (offset & 0x02)
 				old_data = (old_data & 0xFFFF0000) | (data & 0xFFFF);
 			else
 				old_data = (old_data & 0x0000FFFF) | ((data & 0xFFFF) << 16);
+
 			GPUWriteLong(offset & 0xFFFFFFC, old_data, who);
 		}
+
 		return;
 	}
 	else if ((offset == GPU_WORK_RAM_BASE + 0x0FFF) || (GPU_CONTROL_RAM_BASE + 0x1F))
@@ -700,7 +707,9 @@ void GPUWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
 		case 0x00:
 		{
 			bool IMASKCleared = (gpu_flags & IMASK) && !(data & IMASK);
-			gpu_flags = data;
+			// NOTE: According to the JTRM, writing a 1 to IMASK has no effect; only the
+			//       IRQ logic can set it. So we mask it out here to prevent problems...
+			gpu_flags = data & (~IMASK);
 			gpu_flag_z = gpu_flags & ZERO_FLAG;
 			gpu_flag_c = (gpu_flags & CARRY_FLAG) >> 1;
 			gpu_flag_n = (gpu_flags & NEGA_FLAG) >> 2;