X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fdsp.cpp;h=74839cc4b7eee9b6708d02c8e56a5573ca724ad2;hb=f30bf746981a99079e766b0d4e9de5391a4175ff;hp=c0fd60387925b1e6821fc7005bb7a6f985967e2a;hpb=2f21d8ee63902b160acbaf4c26caaaa0e23ca62f;p=virtualjaguar diff --git a/src/dsp.cpp b/src/dsp.cpp index c0fd603..74839cc 100644 --- a/src/dsp.cpp +++ b/src/dsp.cpp @@ -3,20 +3,22 @@ // // Originally by David Raingeard // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS) -// Extensive cleanups/rewrites by James L. Hammons +// Extensive cleanups/rewrites by James Hammons // (C) 2010 Underground Software // -// JLH = James L. Hammons +// JLH = James Hammons // // Who When What // --- ---------- ------------------------------------------------------------- // JLH 01/16/2010 Created this log ;-) +// JLH 11/26/2011 Added fixes for LOAD/STORE alignment issues // #include "dsp.h" #include // Used only for SDL_GetTicks... #include +#include "dac.h" #include "gpu.h" #include "jagdasm.h" #include "jaguar.h" @@ -25,6 +27,11 @@ #include "m68k.h" //#include "memory.h" + +// Seems alignment in loads & stores was off... +#define DSP_CORRECT_ALIGNMENT +//#define DSP_CORRECT_ALIGNMENT_STORE + //#define DSP_DEBUG //#define DSP_DEBUG_IRQ //#define DSP_DEBUG_PL2 @@ -34,6 +41,7 @@ // Disassembly definitions +#if 0 #define DSP_DIS_ABS #define DSP_DIS_ADD #define DSP_DIS_ADDC @@ -89,7 +97,7 @@ //*/ bool doDSPDis = false; //bool doDSPDis = true; - +#endif /* No dis yet: @@ -658,7 +666,7 @@ void DSPWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/) /* if (dsp_in_exec == 0) { m68k_end_timeslice(); - gpu_releaseTimeslice(); + dsp_releaseTimeslice(); }*/ return; } @@ -708,7 +716,7 @@ void DSPWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/) { // WriteLog("dsp: writing %.4x at 0x%.8x\n",data,offset+DSP_WORK_RAM_BASE); m68k_end_timeslice(); - gpu_releaseTimeslice(); + dsp_releaseTimeslice(); }*/ //CC only! #ifdef DSP_DEBUG_CC @@ -789,6 +797,28 @@ SET32(ram2, offset, data); DSPUpdateRegisterBanks(); dsp_control &= ~((dsp_flags & CINT04FLAGS) >> 3); dsp_control &= ~((dsp_flags & CINT5FLAG) >> 1); + +// NB: This is just a wild hairy-assed guess as to what the playback frequency is. +// It can be timed to anything really, anything that writes to L/RTXD at a regular +// interval. Most things seem to use either the I2S interrupt or the TIMER 0 +// interrupt, so that's what we check for here. Just know that this approach +// can be easily fooled! +// Note also that if both interrupts are enabled, the I2S freq will win. :-P + if (data & INT_ENA1) // I2S interrupt + { + int freq = GetCalculatedFrequency(); +//This happens too often to be useful... +// WriteLog("DSP: Setting audio freqency to %u Hz...\n", freq); + DACSetNewFrequency(freq); + } + else if (data & INT_ENA2) // TIMER 0 interrupt + { + int freq = JERRYGetPIT1Frequency(); +//This happens too often to be useful... +// WriteLog("DSP: Setting audio freqency to %u Hz...\n", freq); + DACSetNewFrequency(freq); + } + /* if (IMASKCleared) // If IMASK was cleared, #ifdef DSP_DEBUG_IRQ { @@ -877,7 +907,7 @@ WriteLog("Write to DSP CTRL by %s: %08X\n", whoName[who], data); WriteLog("DSP: CPU -> DSP interrupt\n"); #endif m68k_end_timeslice(); - GPUReleaseTimeslice(); + DSPReleaseTimeslice(); DSPSetIRQLine(DSPIRQ_CPU, ASSERT_LINE); data &= ~DSPINT0; } @@ -917,14 +947,14 @@ else WriteLog(" --> Stopped by %s! (DSP PC: %08X)", whoName[who], dsp_pc); WriteLog("\n"); #endif // DSP_DEBUG -//This isn't exactly right either--we don't know if it was the M68K or the GPU writing here... +//This isn't exactly right either--we don't know if it was the M68K or the DSP writing here... // !!! FIX !!! [DONE] if (DSP_RUNNING) { if (who == M68K) m68k_end_timeslice(); - else if (who == GPU) - GPUReleaseTimeslice(); + else if (who == DSP) + DSPReleaseTimeslice(); if (!wasRunning) FlushDSPPipeline(); @@ -1326,7 +1356,10 @@ void DSPDone(void) // get the interrupt mask int mask = ((dsp_flags >> 11) & 0x20) | ((dsp_flags >> 4) & 0x1F); - WriteLog("DSP: pending=%08X enabled=%08X\n", bits, mask); + WriteLog("DSP: pending=$%X enabled=$%X (%s%s%s%s%s%s)\n", bits, mask, + (mask & 0x01 ? "CPU " : ""), (mask & 0x02 ? "I2S " : ""), + (mask & 0x04 ? "Timer0 " : ""), (mask & 0x08 ? "Timer1 " : ""), + (mask & 0x10 ? "Ext0 " : ""), (mask & 0x20 ? "Ext1" : "")); WriteLog("\nRegisters bank 0\n"); for(int j=0; j<8; j++) { @@ -1949,7 +1982,11 @@ static void dsp_opcode_store_r14_indexed(void) if (doDSPDis) WriteLog("%06X: STORE R%02u, (R14+$%02X) [NCZ:%u%u%u, R%02u=%08X, R14+$%02X=%08X]\n", dsp_pc-2, IMM_2, dsp_convert_zero[IMM_1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, dsp_convert_zero[IMM_1] << 2, dsp_reg[14]+(dsp_convert_zero[IMM_1] << 2)); #endif +#ifdef DSP_CORRECT_ALIGNMENT_STORE + DSPWriteLong((dsp_reg[14] & 0xFFFFFFFC) + (dsp_convert_zero[IMM_1] << 2), RN, DSP); +#else DSPWriteLong(dsp_reg[14] + (dsp_convert_zero[IMM_1] << 2), RN, DSP); +#endif } static void dsp_opcode_store_r15_indexed(void) @@ -1958,7 +1995,11 @@ static void dsp_opcode_store_r15_indexed(void) if (doDSPDis) WriteLog("%06X: STORE R%02u, (R15+$%02X) [NCZ:%u%u%u, R%02u=%08X, R15+$%02X=%08X]\n", dsp_pc-2, IMM_2, dsp_convert_zero[IMM_1] << 2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, dsp_convert_zero[IMM_1] << 2, dsp_reg[15]+(dsp_convert_zero[IMM_1] << 2)); #endif +#ifdef DSP_CORRECT_ALIGNMENT_STORE + DSPWriteLong((dsp_reg[15] & 0xFFFFFFFC) + (dsp_convert_zero[IMM_1] << 2), RN, DSP); +#else DSPWriteLong(dsp_reg[15] + (dsp_convert_zero[IMM_1] << 2), RN, DSP); +#endif } static void dsp_opcode_load_r14_ri(void) @@ -1967,7 +2008,11 @@ static void dsp_opcode_load_r14_ri(void) if (doDSPDis) WriteLog("%06X: LOAD (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM+dsp_reg[14], IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + RN = DSPReadLong((dsp_reg[14] + RM) & 0xFFFFFFFC, DSP); +#else RN = DSPReadLong(dsp_reg[14] + RM, DSP); +#endif #ifdef DSP_DIS_LOAD14R if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -1980,7 +2025,11 @@ static void dsp_opcode_load_r15_ri(void) if (doDSPDis) WriteLog("%06X: LOAD (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM+dsp_reg[15], IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + RN = DSPReadLong((dsp_reg[15] + RM) & 0xFFFFFFFC, DSP); +#else RN = DSPReadLong(dsp_reg[15] + RM, DSP); +#endif #ifdef DSP_DIS_LOAD15R if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -2023,10 +2072,17 @@ static void dsp_opcode_storew(void) if (doDSPDis) WriteLog("%06X: STOREW R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_pc-2, IMM_2, IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, IMM_1, RM); #endif +#ifdef DSP_CORRECT_ALIGNMENT_STORE + if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF)) + DSPWriteLong(RM & 0xFFFFFFFE, RN & 0xFFFF, DSP); + else + JaguarWriteWord(RM & 0xFFFFFFFE, RN, DSP); +#else if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF)) DSPWriteLong(RM, RN & 0xFFFF, DSP); else JaguarWriteWord(RM, RN, DSP); +#endif } static void dsp_opcode_store(void) @@ -2035,7 +2091,11 @@ static void dsp_opcode_store(void) if (doDSPDis) WriteLog("%06X: STORE R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", dsp_pc-2, IMM_2, IMM_1, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN, IMM_1, RM); #endif +#ifdef DSP_CORRECT_ALIGNMENT_STORE + DSPWriteLong(RM & 0xFFFFFFFC, RN, DSP); +#else DSPWriteLong(RM, RN, DSP); +#endif } static void dsp_opcode_loadb(void) @@ -2060,10 +2120,17 @@ static void dsp_opcode_loadw(void) if (doDSPDis) WriteLog("%06X: LOADW (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF)) + RN = DSPReadLong(RM & 0xFFFFFFFE, DSP) & 0xFFFF; + else + RN = JaguarReadWord(RM & 0xFFFFFFFE, DSP); +#else if (RM >= DSP_WORK_RAM_BASE && RM <= (DSP_WORK_RAM_BASE + 0x1FFF)) RN = DSPReadLong(RM, DSP) & 0xFFFF; else RN = JaguarReadWord(RM, DSP); +#endif #ifdef DSP_DIS_LOADW if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -2076,7 +2143,11 @@ static void dsp_opcode_load(void) if (doDSPDis) WriteLog("%06X: LOAD (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", dsp_pc-2, IMM_1, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_1, RM, IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + RN = DSPReadLong(RM & 0xFFFFFFFC, DSP); +#else RN = DSPReadLong(RM, DSP); +#endif #ifdef DSP_DIS_LOAD if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -2089,7 +2160,11 @@ static void dsp_opcode_load_r14_indexed(void) if (doDSPDis) WriteLog("%06X: LOAD (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1] << 2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[IMM_1] << 2, dsp_reg[14]+(dsp_convert_zero[IMM_1] << 2), IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + RN = DSPReadLong((dsp_reg[14] & 0xFFFFFFFC) + (dsp_convert_zero[IMM_1] << 2), DSP); +#else RN = DSPReadLong(dsp_reg[14] + (dsp_convert_zero[IMM_1] << 2), DSP); +#endif #ifdef DSP_DIS_LOAD14I if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -2102,7 +2177,11 @@ static void dsp_opcode_load_r15_indexed(void) if (doDSPDis) WriteLog("%06X: LOAD (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", dsp_pc-2, dsp_convert_zero[IMM_1] << 2, IMM_2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[IMM_1] << 2, dsp_reg[15]+(dsp_convert_zero[IMM_1] << 2), IMM_2, RN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + RN = DSPReadLong((dsp_reg[15] & 0xFFFFFFFC) + (dsp_convert_zero[IMM_1] << 2), DSP); +#else RN = DSPReadLong(dsp_reg[15] + (dsp_convert_zero[IMM_1] << 2), DSP); +#endif #ifdef DSP_DIS_LOAD15I if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, IMM_2, RN); @@ -2332,7 +2411,7 @@ static void dsp_opcode_normi(void) static void dsp_opcode_mmult(void) { int count = dsp_matrix_control&0x0f; - uint32 addr = dsp_pointer_to_matrix; // in the gpu ram + uint32 addr = dsp_pointer_to_matrix; // in the dsp ram int64 accum = 0; uint32 res; @@ -3093,6 +3172,7 @@ if (dsp_pc == 0xF1B092) pcQueue1[pcQPtr1++] = dsp_pc; pcQPtr1 &= 0x3FF; +#ifdef DSP_DEBUG_PL2 if ((dsp_pc < 0xF1B000 || dsp_pc > 0xF1CFFF) && !doDSPDis) { WriteLog("DSP: PC has stepped out of bounds...\n\nBacktrace:\n\n"); @@ -3107,6 +3187,8 @@ if ((dsp_pc < 0xF1B000 || dsp_pc > 0xF1CFFF) && !doDSPDis) } WriteLog("\n"); }//*/ +#endif + if (IMASKCleared) // If IMASK was cleared, { #ifdef DSP_DEBUG_IRQ @@ -3210,9 +3292,10 @@ WriteLog("\tW -> %02u, %02u, %02u; r1=%08X, r2= %08X, res=%08X, wb=%u (%s)\n", p // Stage 2: Execute if (pipeline[plPtrExec].opcode != PIPELINE_STALL) { +#ifdef DSP_DEBUG_PL2 if (doDSPDis) WriteLog("\t[inst=%02u][R28=%08X, alt R28=%08X, REGPAGE=%s]\n", pipeline[plPtrExec].opcode, dsp_reg[28], dsp_alternate_reg[28], (dsp_flags & REGPAGE ? "set" : "not set")); -#ifdef DSP_DEBUG_PL2 + if (doDSPDis) { WriteLog("DSPExecP: About to execute opcode %s...\n", dsp_opcode_str[pipeline[plPtrExec].opcode]); @@ -3922,7 +4005,11 @@ static void DSP_load(void) if (doDSPDis) WriteLog("%06X: LOAD (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + PRES = DSPReadLong(PRM & 0xFFFFFFFC, DSP); +#else PRES = DSPReadLong(PRM, DSP); +#endif #ifdef DSP_DIS_LOAD if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -3951,10 +4038,17 @@ static void DSP_loadw(void) if (doDSPDis) WriteLog("%06X: LOADW (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM, PIMM2, PRN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF)) + PRES = DSPReadLong(PRM & 0xFFFFFFFE, DSP) & 0xFFFF; + else + PRES = JaguarReadWord(PRM & 0xFFFFFFFE, DSP); +#else if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF)) PRES = DSPReadLong(PRM, DSP) & 0xFFFF; else PRES = JaguarReadWord(PRM, DSP); +#endif #ifdef DSP_DIS_LOADW if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -3967,7 +4061,11 @@ static void DSP_load_r14_i(void) if (doDSPDis) WriteLog("%06X: LOAD (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1] << 2, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[PIMM1] << 2, dsp_reg[14]+(dsp_convert_zero[PIMM1] << 2), PIMM2, PRN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + PRES = DSPReadLong((dsp_reg[14] & 0xFFFFFFFC) + (dsp_convert_zero[PIMM1] << 2), DSP); +#else PRES = DSPReadLong(dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2), DSP); +#endif #ifdef DSP_DIS_LOAD14I if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -3980,7 +4078,11 @@ static void DSP_load_r14_r(void) if (doDSPDis) WriteLog("%06X: LOAD (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM+dsp_reg[14], PIMM2, PRES); #endif +#ifdef DSP_CORRECT_ALIGNMENT + PRES = DSPReadLong((dsp_reg[14] + PRM) & 0xFFFFFFFC, DSP); +#else PRES = DSPReadLong(dsp_reg[14] + PRM, DSP); +#endif #ifdef DSP_DIS_LOAD14R if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -3993,7 +4095,11 @@ static void DSP_load_r15_i(void) if (doDSPDis) WriteLog("%06X: LOAD (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", DSP_PPC, dsp_convert_zero[PIMM1] << 2, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, dsp_convert_zero[PIMM1] << 2, dsp_reg[15]+(dsp_convert_zero[PIMM1] << 2), PIMM2, PRN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + PRES = DSPReadLong((dsp_reg[15] &0xFFFFFFFC) + (dsp_convert_zero[PIMM1] << 2), DSP); +#else PRES = DSPReadLong(dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2), DSP); +#endif #ifdef DSP_DIS_LOAD15I if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -4006,7 +4112,11 @@ static void DSP_load_r15_r(void) if (doDSPDis) WriteLog("%06X: LOAD (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", DSP_PPC, PIMM1, PIMM2, dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM1, PRM+dsp_reg[15], PIMM2, PRN); #endif +#ifdef DSP_CORRECT_ALIGNMENT + PRES = DSPReadLong((dsp_reg[15] + PRM) & 0xFFFFFFFC, DSP); +#else PRES = DSPReadLong(dsp_reg[15] + PRM, DSP); +#endif #ifdef DSP_DIS_LOAD15R if (doDSPDis) WriteLog("[NCZ:%u%u%u, R%02u=%08X]\n", dsp_flag_n, dsp_flag_c, dsp_flag_z, PIMM2, PRES); @@ -4023,7 +4133,7 @@ static void DSP_mirror(void) static void DSP_mmult(void) { int count = dsp_matrix_control&0x0f; - uint32 addr = dsp_pointer_to_matrix; // in the gpu ram + uint32 addr = dsp_pointer_to_matrix; // in the dsp ram int64 accum = 0; uint32 res; @@ -4444,7 +4554,11 @@ static void DSP_store(void) #endif // DSPWriteLong(PRM, PRN, DSP); // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = PRM & 0xFFFFFFFC; +#else pipeline[plPtrExec].address = PRM; +#endif pipeline[plPtrExec].value = PRN; pipeline[plPtrExec].type = TYPE_DWORD; WRITEBACK_ADDR; @@ -4490,7 +4604,11 @@ static void DSP_storew(void) // JaguarWriteWord(PRM, PRN, DSP); // // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = PRM & 0xFFFFFFFE; +#else pipeline[plPtrExec].address = PRM; +#endif if (PRM >= DSP_WORK_RAM_BASE && PRM <= (DSP_WORK_RAM_BASE + 0x1FFF)) { @@ -4513,7 +4631,11 @@ static void DSP_store_r14_i(void) #endif // DSPWriteLong(dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2), PRN, DSP); // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = (dsp_reg[14] & 0xFFFFFFFC) + (dsp_convert_zero[PIMM1] << 2); +#else pipeline[plPtrExec].address = dsp_reg[14] + (dsp_convert_zero[PIMM1] << 2); +#endif pipeline[plPtrExec].value = PRN; pipeline[plPtrExec].type = TYPE_DWORD; WRITEBACK_ADDR; @@ -4523,7 +4645,11 @@ static void DSP_store_r14_r(void) { // DSPWriteLong(dsp_reg[14] + PRM, PRN, DSP); // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = (dsp_reg[14] + PRM) & 0xFFFFFFFC; +#else pipeline[plPtrExec].address = dsp_reg[14] + PRM; +#endif pipeline[plPtrExec].value = PRN; pipeline[plPtrExec].type = TYPE_DWORD; WRITEBACK_ADDR; @@ -4537,7 +4663,11 @@ static void DSP_store_r15_i(void) #endif // DSPWriteLong(dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2), PRN, DSP); // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = (dsp_reg[15] & 0xFFFFFFFC) + (dsp_convert_zero[PIMM1] << 2); +#else pipeline[plPtrExec].address = dsp_reg[15] + (dsp_convert_zero[PIMM1] << 2); +#endif pipeline[plPtrExec].value = PRN; pipeline[plPtrExec].type = TYPE_DWORD; WRITEBACK_ADDR; @@ -4547,7 +4677,11 @@ static void DSP_store_r15_r(void) { // DSPWriteLong(dsp_reg[15] + PRM, PRN, DSP); // NO_WRITEBACK; +#ifdef DSP_CORRECT_ALIGNMENT_STORE + pipeline[plPtrExec].address = (dsp_reg[15] + PRM) & 0xFFFFFFFC; +#else pipeline[plPtrExec].address = dsp_reg[15] + PRM; +#endif pipeline[plPtrExec].value = PRN; pipeline[plPtrExec].type = TYPE_DWORD; WRITEBACK_ADDR;