X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fcdrom.cpp;h=a984c203b1331565ac3dd328cc2c6858c141f990;hb=b4975cbd28c54b5a8f5d7a119375fe05b46f19a1;hp=9e2d44a78744d187aedb5be928f4b433ab66d94e;hpb=683f283e1328164c176618088c34408ea6c03cf7;p=virtualjaguar diff --git a/src/cdrom.cpp b/src/cdrom.cpp index 9e2d44a..a984c20 100644 --- a/src/cdrom.cpp +++ b/src/cdrom.cpp @@ -3,14 +3,26 @@ // // Originally by David Raingeard // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS) -// Extensive rewrites/cleanups/fixes by James L. Hammons +// Extensive rewrites/cleanups/fixes by James Hammons +// (C) 2010 Underground Software +// +// JLH = James Hammons +// +// Who When What +// --- ---------- ------------------------------------------------------------- +// JLH 01/16/2010 Created this log ;-) // -#include "jaguar.h" // For GET32/SET32 macros -#include "m68k.h" -#include "cdintf.h" // System agnostic CD interface functions #include "cdrom.h" +#include // For memset, etc. +//#include "jaguar.h" // For GET32/SET32 macros +//#include "m68k.h" //??? +//#include "memory.h" +#include "cdintf.h" // System agnostic CD interface functions +#include "log.h" +#include "dac.h" + //#define CDROM_LOG // For CDROM logging, obviously /* @@ -25,7 +37,7 @@ SB_TIME equ BUTCH+$20 ; Subcode time and compare enable (D24) FIFO_DATA equ BUTCH+$24 ; i2s FIFO data I2SDAT1 equ BUTCH+$24 ; i2s FIFO data I2SDAT2 equ BUTCH+$28 ; i2s FIFO data -2C = ? + equ BUTCH+$2C ; CD EEPROM interface ; ; Butch's hardware registers @@ -42,7 +54,7 @@ I2SDAT2 equ BUTCH+$28 ; i2s FIFO data ; bit5 - CD module command receive buffer full ; bit6 - CIRC failure interrupt ; -; bit7-31 reserved, set to 0 +; bit7-31 reserved, set to 0 ; ; When read (Long): ; @@ -100,26 +112,53 @@ $70nn - Set oversampling mode Commands send through serial bus: -$100 - ? Acknowledge ? -$130 - ? (Seems to always prefix the $14n commands) -$140 - Returns ACK (1) (Write to NVRAM?) +$100 - ? Acknowledge ? (Erase/Write disable) +$130 - ? (Seems to always prefix the $14n commands) (Erase/Write enable) +$140 - Returns ACK (1) (Write to NVRAM?) (Write selected register) $141 - Returns ACK (1) $142 - Returns ACK (1) $143 - Returns ACK (1) $144 - Returns ACK (1) $145 - Returns ACK (1) -$180 - Returns 16-bit value (NVRAM?) +$180 - Returns 16-bit value (NVRAM?) (read from EEPROM) $181 - Returns 16-bit value $182 - Returns 16-bit value $183 - Returns 16-bit value $184 - Returns 16-bit value $185 - Returns 16-bit value + +; The BUTCH interface for the CD-ROM module is a long-word register, +; where only the least signifigant 4 bits are used +; +eeprom equ $DFFF2c ;interface to CD-eeprom +; +; bit3 - busy if 0 after write cmd, or Data In after read cmd +; bit2 - Data Out +; bit1 - clock +; bit0 - Chip Select (CS) +; +; +; Commands specific to the National Semiconductor NM93C14 +; +; +; 9-bit commands.. +; 876543210 +eREAD equ %110000000 ;read from EEPROM +eEWEN equ %100110000 ;Erase/write Enable +eERASE equ %111000000 ;Erase selected register +eWRITE equ %101000000 ;Write selected register +eERAL equ %100100000 ;Erase all registers +eWRAL equ %100010000 ;Writes all registers +eEWDS equ %100000000 ;Erase/Write disable (default) + +So... are there $40 words of memory? 128 bytes? + */ // Private function prototypes -static void CDROMBusWrite(uint16); -static uint16 CDROMBusRead(void); +static void CDROMBusWrite(uint16_t); +static uint16_t CDROMBusRead(void); #define BUTCH 0x00 // base of Butch == interrupt control register, R/W #define DSCNTRL BUTCH + 0x04 // DSA control register, R/W @@ -133,17 +172,17 @@ static uint16 CDROMBusRead(void); #define I2SDAT2 BUTCH + 0x28 // i2s FIFO data (old) #define UNKNOWN BUTCH + 0x2C // Seems to be some sort of I2S interface -char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB", +const char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB", "SB_TIME", "FIFO_DATA", "I2SDAT2", "UNKNOWN" }; -extern char * whoName[9]; +//extern const char * whoName[9]; -static uint8 cdRam[0x100]; -static uint16 cdCmd = 0, cdPtr = 0; +static uint8_t cdRam[0x100]; +static uint16_t cdCmd = 0, cdPtr = 0; static bool haveCDGoodness; -static uint32 min, sec, frm, block; -static uint8 cdBuf[2352 + 96]; -static uint32 cdBufPtr = 2352; +static uint32_t min, sec, frm, block; +static uint8_t cdBuf[2352 + 96]; +static uint32_t cdBufPtr = 2352; //Also need to set up (save/restore) the CD's NVRAM @@ -153,8 +192,8 @@ void CDROMInit(void) haveCDGoodness = CDIntfInit(); //GetRawTOC(); -/*uint8 buf[2448]; -uint32 sec = 18667 - 150; +/*uint8_t buf[2448]; +uint32_t sec = 18667 - 150; memset(buf, 0, 2448); if (!CDIntfReadBlock(sec, buf)) { @@ -187,7 +226,7 @@ for(int i=0; i<6; i++) WriteLog("\nP subchannel data: "); for(int i=0; i<96; i+=8) { - uint8 b = 0; + uint8_t b = 0; for(int j=0; j<8; j++) b |= ((buf[2352 + i + j] & 0x80) >> 7) << (7 - j); @@ -196,7 +235,7 @@ for(int i=0; i<96; i+=8) WriteLog("\nQ subchannel data: "); for(int i=0; i<96; i+=8) { - uint8 b = 0; + uint8_t b = 0; for(int j=0; j<8; j++) b |= ((buf[2352 + i + j] & 0x40) >> 6) << (7 - j); @@ -223,16 +262,16 @@ void CDROMDone(void) // interrupts are handled as they're generated--instead of the current // scheme where they're handled on scanline boundaries. // -void BUTCHExec(uint32 cycles) +void BUTCHExec(uint32_t cycles) { #if 1 // We're chickening out for now... return; #else - extern uint8 * jerry_ram_8; // Hmm. +// extern uint8_t * jerry_ram_8; // Hmm. // For now, we just do the FIFO interrupt. Timing is also likely to be WRONG as well. - uint32 cdState = GET32(cdRam, BUTCH); + uint32_t cdState = GET32(cdRam, BUTCH); if (!(cdState & 0x01)) // No BUTCH interrupts enabled return; @@ -254,7 +293,7 @@ return; // CD-ROM memory access functions // -uint8 CDROMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/) +uint8_t CDROMReadByte(uint32_t offset, uint32_t who/*=UNKNOWN*/) { #ifdef CDROM_LOG if ((offset & 0xFF) < 12 * 4) @@ -264,17 +303,17 @@ uint8 CDROMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/) return cdRam[offset & 0xFF]; } -static uint8 trackNum = 1, minTrack, maxTrack; -//static uint8 minutes[16] = { 0, 0, 2, 5, 7, 10, 12, 15, 17, 20, 22, 25, 27, 30, 32, 35 }; -//static uint8 seconds[16] = { 0, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0 }; -//static uint8 frames[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -//static uint16 sd = 0; -uint16 CDROMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/) +static uint8_t trackNum = 1, minTrack, maxTrack; +//static uint8_t minutes[16] = { 0, 0, 2, 5, 7, 10, 12, 15, 17, 20, 22, 25, 27, 30, 32, 35 }; +//static uint8_t seconds[16] = { 0, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0 }; +//static uint8_t frames[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; +//static uint16_t sd = 0; +uint16_t CDROMReadWord(uint32_t offset, uint32_t who/*=UNKNOWN*/) { offset &= 0xFF; - uint16 data = 0x0000; - + uint16_t data = 0x0000; + if (offset == BUTCH) data = 0x0000; else if (offset == BUTCH + 2) @@ -549,7 +588,7 @@ if (offset == 0x2E) return data; } -void CDROMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/) +void CDROMWriteByte(uint32_t offset, uint8_t data, uint32_t who/*=UNKNOWN*/) { offset &= 0xFF; cdRam[offset] = data; @@ -561,7 +600,7 @@ void CDROMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/) #endif } -void CDROMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/) +void CDROMWriteWord(uint32_t offset, uint16_t data, uint32_t who/*=UNKNOWN*/) { offset &= 0xFF; SET16(cdRam, offset, data); @@ -622,7 +661,7 @@ void CDROMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/) else if ((data & 0xFF00) == 0x7000) // Set oversampling rate { // 1 = none, 2 = 2x, 3 = 4x, 4 = 8x - uint32 rates[5] = { 0, 1, 2, 4, 8 }; + uint32_t rates[5] = { 0, 1, 2, 4, 8 }; WriteLog("CDROM: Setting oversample rate to %uX\n", rates[(data & 0xFF)]); } else @@ -646,14 +685,14 @@ void CDROMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/) enum ButchState { ST_INIT, ST_RISING, ST_FALLING }; static ButchState currentState = ST_INIT; -static uint16 counter = 0; +static uint16_t counter = 0; static bool cmdTx = false; -static uint16 busCmd; -static uint16 rxData, txData; -static uint16 rxDataBit; +static uint16_t busCmd; +static uint16_t rxData, txData; +static uint16_t rxDataBit; static bool firstTime = false; -static void CDROMBusWrite(uint16 data) +static void CDROMBusWrite(uint16_t data) { //This is kinda lame. What we should do is check for a 0->1 transition on either bits 0 or 1... //!!! FIX !!! @@ -738,7 +777,7 @@ static void CDROMBusWrite(uint16 data) } } -static uint16 CDROMBusRead(void) +static uint16_t CDROMBusRead(void) { // It seems the counter == 0 simply waits for a single bit acknowledge-- !!! FIX !!! // Or does it? Hmm. It still "pumps" 16 bits through above, so how is this special? @@ -768,8 +807,8 @@ static uint16 CDROMBusRead(void) // This simulates a read from BUTCH over the SSI to JERRY. Uses real reading! // //temp, until I can fix my CD image... Argh! -static uint8 cdBuf2[2532 + 96], cdBuf3[2532 + 96]; -uint16 GetWordFromButchSSI(uint32 offset, uint32 who/*= UNKNOWN*/) +static uint8_t cdBuf2[2532 + 96], cdBuf3[2532 + 96]; +uint16_t GetWordFromButchSSI(uint32_t offset, uint32_t who/*= UNKNOWN*/) { bool go = ((offset & 0x0F) == 0x0A || (offset & 0x0F) == 0x0E ? true : false); @@ -829,8 +868,9 @@ if (cdBufPtr % 32 == 30) bool ButchIsReadyToSend(void) { +#ifdef LOG_CDROM_VERBOSE WriteLog("Butch is%s ready to send...\n", cdRam[I2CNTRL + 3] & 0x02 ? "" : " not"); - +#endif return (cdRam[I2CNTRL + 3] & 0x02 ? true : false); } @@ -934,116 +974,116 @@ CDINTF: Disc summary CDROM: Read sector 18517 (18667 - 150)... -0000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0018: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0048: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0078: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 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4E 00 00 00 51 E7 48 +0870: 00 FE 39 30 F1 00 02 40 40 02 10 00 00 67 1C 00 79 42 01 00 8C D3 3C 34 +0888: 37 03 3C 30 81 05 3C 3C 0A 01 3C 38 F1 00 00 60 1A 00 FC 33 01 00 01 00 +08A0: 8C D3 3C 34 4B 03 3C 30 65 05 3C 3C 42 01 3C 38 1F 01 C0 33 01 00 88 D3 +08B8: C4 33 01 00 8A D3 00 32 41 E2 41 94 7C D4 04 00 7C 92 01 00 41 00 00 04 +08D0: C1 33 01 00 82 D3 C1 33 F0 00 3C 00 C2 33 01 00 80 D3 C2 33 F0 00 38 00 +08E8: C2 33 F0 00 3A 00 06 3A 44 9A C5 33 01 00 84 D3 44 DC C6 33 01 00 86 D3 +0900: F9 33 01 00 84 D3 F0 00 46 00 FC 33 FF FF F0 00 48 00 FC 23 00 00 00 00 +0918: F0 00 2A 00 FC 33 00 00 F0 00 58 00 DF 4C 7F 00 75 4E 00 00 00 00 00 00 Raw P-W subchannel data: -00: 80 80 C0 80 80 80 80 C0 80 80 80 80 80 80 C0 80 -10: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 -20: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 -30: 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 80 80 -40: 80 80 80 80 C0 80 80 80 80 C0 C0 80 80 C0 C0 80 -50: C0 80 80 C0 C0 C0 80 80 C0 80 80 80 C0 80 80 80 +00: 80 80 C0 80 80 80 80 C0 80 80 80 80 80 80 C0 80 +10: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 +20: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 +30: 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 80 80 +40: 80 80 80 80 C0 80 80 80 80 C0 C0 80 80 C0 C0 80 +50: C0 80 80 C0 C0 C0 80 80 C0 80 80 80 C0 80 80 80 -P subchannel data: FF FF FF FF FF FF FF FF FF FF FF FF -Q subchannel data: 21 02 00 00 00 01 00 04 08 66 9C 88 +P subchannel data: FF FF FF FF FF FF FF FF FF FF FF FF +Q subchannel data: 21 02 00 00 00 01 00 04 08 66 9C 88 Run address: $5000, Length: $18380 */ @@ -1121,13 +1161,13 @@ read: .play: move.l d0,d1 ; mess with copy in d1 lsr.l #8,d1 ; shift the byte over - lsr.w #8,d1 + lsr.w #8,d1 or.w #$1000,d1 ; format it for goto move.w d1,DS_DATA ; DSA tx bsr.b DSA_tx move.l d0,d1 ; mess with copy in d1 - lsr.w #8,d1 + lsr.w #8,d1 or.w #$1100,d1 ; format it for goto move.w d1,DS_DATA ; DSA tx bsr.b DSA_tx @@ -1137,7 +1177,7 @@ read: or.w #$1200,d1 ; format it for goto move.w d1,DS_DATA ; DSA tx bsr.b DSA_tx - + rts @@ -1182,7 +1222,7 @@ HERE: ; Now we clear the DSARX interrupt in Butch subq #12,r24 ; does what the above says - load (r24),r26 ;Clears DSA pending interrupt + load (r24),r26 ;Clears DSA pending interrupt addq #6,r24 loadw (r24),r27 ; Read DSA response btst #10,r27 ; Check for error @@ -1209,9 +1249,9 @@ noerror: load (Ptrloc),Dataptr ;get pointer ; Check to see if we should stop - addq #4,Ptrloc + addq #4,Ptrloc load (Ptrloc),TEMP - subq #4,Ptrloc + subq #4,Ptrloc cmp Dataptr,TEMP jr pl,notend ; nop @@ -1223,7 +1263,7 @@ notend: move CDdata,r25 addq #4,CDdata loptop: - load (CDdata),TEMP + load (CDdata),TEMP load (r25),r30 load (CDdata),r21 load (r25),r22 @@ -1253,7 +1293,7 @@ loptop: exit_isr: movei #J_INT,r24 ; Acknowledge in Jerry moveq #1,TEMP - bset #8,TEMP + bset #8,TEMP storew TEMP,(r24) .if FLAG @@ -1308,7 +1348,7 @@ exit_isr: addq #2,r28 ;Fix it up - addq #4,r31 + addq #4,r31 jump (r28) ;Return store r29,(r30) ;Restore broken flags