X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=src%2Fcdrom.cpp;h=1eb8445e3c51678c1961c3e621d47595246ad1b1;hb=731669ecc1eb876e42104a8a4ba49ac00572c020;hp=d36a15978e5a8a552cfa344e774a71ec3bdab07f;hpb=322117192376770ec14130bd8f9d404ba9cb7040;p=virtualjaguar

diff --git a/src/cdrom.cpp b/src/cdrom.cpp
index d36a159..1eb8445 100644
--- a/src/cdrom.cpp
+++ b/src/cdrom.cpp
@@ -6,12 +6,16 @@
 // Extensive rewrites/cleanups/fixes by James L. Hammons
 //
 
+#include "cdrom.h"
+
+#include <string.h>									// For memset, etc.
 #include "jaguar.h"									// For GET32/SET32 macros
 #include "m68k.h"
 #include "cdintf.h"									// System agnostic CD interface functions
-#include "cdrom.h"
+#include "log.h"
+#include "dac.h"
 
-#define CDROM_LOG									// For CDROM logging, obviously
+//#define CDROM_LOG									// For CDROM logging, obviously
 
 /*
 BUTCH     equ  $DFFF00		; base of Butch=interrupt control register, R/W
@@ -121,7 +125,7 @@ $185 - Returns 16-bit value
 static void CDROMBusWrite(uint16);
 static uint16 CDROMBusRead(void);
 
-#define BUTCH		0x00				// base of Butch=interrupt control register, R/W
+#define BUTCH		0x00				// base of Butch == interrupt control register, R/W
 #define DSCNTRL 	BUTCH + 0x04		// DSA control register, R/W
 #define DS_DATA		BUTCH + 0x0A		// DSA TX/RX data, R/W
 #define I2CNTRL		BUTCH + 0x10		// i2s bus control register, R/W
@@ -133,9 +137,9 @@ static uint16 CDROMBusRead(void);
 #define I2SDAT2		BUTCH + 0x28		// i2s FIFO data (old)
 #define UNKNOWN		BUTCH + 0x2C		// Seems to be some sort of I2S interface
 
-char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB",
+const char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB",
 	"SB_TIME", "FIFO_DATA", "I2SDAT2", "UNKNOWN" };
-extern char * whoName[9];
+extern const char * whoName[9];
 
 
 static uint8 cdRam[0x100];
@@ -147,7 +151,7 @@ static uint32 cdBufPtr = 2352;
 //Also need to set up (save/restore) the CD's NVRAM
 
 
-extern bool GetRawTOC(void);
+//extern bool GetRawTOC(void);
 void CDROMInit(void)
 {
 	haveCDGoodness = CDIntfInit();
@@ -225,7 +229,10 @@ void CDROMDone(void)
 //
 void BUTCHExec(uint32 cycles)
 {
+#if 1
+// We're chickening out for now...
 return;
+#else
 	extern uint8 * jerry_ram_8;					// Hmm.
 
 	// For now, we just do the FIFO interrupt. Timing is also likely to be WRONG as well.
@@ -243,6 +250,7 @@ return;
 //I'm *sure* this is wrong--prolly need to generate DSP IRQs as well!
 	if (jerry_ram_8[0x23] & 0x3F)				// Only generate an IRQ if enabled!
 		GPUSetIRQLine(GPUIRQ_DSP, ASSERT_LINE);
+#endif
 }
 
 
@@ -825,6 +833,8 @@ if (cdBufPtr % 32 == 30)
 
 bool ButchIsReadyToSend(void)
 {
+WriteLog("Butch is%s ready to send...\n", cdRam[I2CNTRL + 3] & 0x02 ? "" : " not");
+
 	return (cdRam[I2CNTRL + 3] & 0x02 ? true : false);
 }