X-Git-Url: http://shamusworld.gotdns.org/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=src%2Fv6809.cpp;h=894476f1f37459295a20cb30275b644e06099327;hb=87647f03b4d7cf53948ed8f9f25ad30da5e596bf;hp=4de9d29757cc3a8353c4b0bb1f82fc2fd8da26e2;hpb=43a80363f784b8dc10e438024149da0d993c7eca;p=thunder

diff --git a/src/v6809.cpp b/src/v6809.cpp
index 4de9d29..894476f 100755
--- a/src/v6809.cpp
+++ b/src/v6809.cpp
@@ -16,20 +16,20 @@
 // Private global variables
 
 static V6809REGS regs;
-static WORD addr;										// Temporary variables common to all funcs...
-static BYTE tmp;
+static uint16 addr;										// Temporary variables common to all funcs...
+static uint8 tmp;
 
 // Private function prototypes
 
-static int SignedB(BYTE);								// Return signed byte from unsigned
-static int SignedW(WORD);								// Return signed word from unsigned
-static WORD FetchW(void);
-static WORD RdMemW(WORD addr);
-static void WrMemW(WORD addr, WORD w);
-static WORD ReadEXG(BYTE);								// Read TFR/EXG post byte
-static void WriteEXG(BYTE, WORD);						// Set TFR/EXG data
-static WORD DecodeReg(BYTE);							// Decode register data
-static WORD DecodeIDX(BYTE);							// Decode IDX data
+static int SignedB(uint8);								// Return signed byte from unsigned
+static int SignedW(uint16);								// Return signed word from unsigned
+static uint16 FetchW(void);
+static uint16 RdMemW(uint16 addr);
+static void WrMemW(uint16 addr, uint16 w);
+static uint16 ReadEXG(uint8);								// Read TFR/EXG post byte
+static void WriteEXG(uint8, uint16);						// Set TFR/EXG data
+static uint16 DecodeReg(uint8);							// Decode register data
+static uint16 DecodeIDX(uint8);							// Decode IDX data
 
 // This is here because of the stupid forward declaration rule that C++ forces (the C++ compiler
 // isn't smart enough to know that the identifiers in the arrays are declared later, it doesn't
@@ -136,32 +136,32 @@ static void (* exec_op2[256])() = {
 // Fetch a word out of 6809 memory (little endian format)
 // This is a leftover from when fetches were separated from garden variety reads...
 //
-static WORD FetchW()
+static uint16 FetchW()
 {
-	WORD w = RdMemW(regs.pc);
+	uint16 w = RdMemW(regs.pc);
 	regs.pc += 2;
 	return w;
 }
 //
 // Fetch word function
 //
-/*WORD FetchW(void)
+/*uint16 FetchW(void)
 {
-	return (WORD)(regs.RdMem(regs.pc++) << 8) | regs.RdMem(regs.pc++);
+	return (uint16)(regs.RdMem(regs.pc++) << 8) | regs.RdMem(regs.pc++);
 }*/
 
 //
 // Read word from memory function
 //
-WORD RdMemW(WORD addr)
+uint16 RdMemW(uint16 addr)
 {
-	return (WORD)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
+	return (uint16)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
 }
 
 //
 // Write word to memory function
 //
-void WrMemW(WORD addr, WORD w)
+void WrMemW(uint16 addr, uint16 w)
 {
 	regs.WrMem(addr + 0, w >> 8);
 	regs.WrMem(addr + 1, w & 0xFF);
@@ -170,7 +170,7 @@ void WrMemW(WORD addr, WORD w)
 //
 // return signed byte from unsigned
 //
-int SignedB(BYTE b)
+int SignedB(uint8 b)
 {
 	return (b & 0x80 ? b - 256 : b);
 }
@@ -178,7 +178,7 @@ int SignedB(BYTE b)
 //
 // return signed word from unsigned
 //
-int SignedW(WORD w)
+int SignedW(uint16 w)
 {
 	return (w & 0x8000 ? w - 65536 : w);
 }
@@ -186,9 +186,9 @@ int SignedW(WORD w)
 //
 // Function to read TFR/EXG post byte
 //
-WORD ReadEXG(BYTE code)
+uint16 ReadEXG(uint8 code)
 {
-	WORD retval;
+	uint16 retval;
 
 	switch (code)
 	{
@@ -232,7 +232,7 @@ WORD ReadEXG(BYTE code)
 //
 // Function to set TFR/EXG data
 //
-void WriteEXG(BYTE code, WORD data)
+void WriteEXG(uint8 code, uint16 data)
 {
 	switch (code)
 	{
@@ -262,9 +262,9 @@ void WriteEXG(BYTE code, WORD data)
 //
 // Function to decode register data
 //
-WORD DecodeReg(BYTE reg)
+uint16 DecodeReg(uint8 reg)
 {
-	WORD retval;
+	uint16 retval;
 
 	switch (reg)
 	{
@@ -284,10 +284,10 @@ WORD DecodeReg(BYTE reg)
 //
 // Function to decode IDX data
 //
-WORD DecodeIDX(BYTE code)
+uint16 DecodeIDX(uint8 code)
 {
-	WORD addr, woff;
-	BYTE reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
+	uint16 addr, woff;
+	uint8 reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
 
 	if (!(code & 0x80))									// Hi bit unset? Then decode 4 bit offset
 		addr = DecodeReg(reg) + (idxind ? lo_nyb - 16 : lo_nyb);
@@ -460,7 +460,7 @@ static void Op04(void)  // LSR DP
 }
 static void Op06(void)  // ROR DP
 {
-  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  BYTE tmp2 = regs.RdMem(addr);
+  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8 tmp2 = regs.RdMem(addr);
   tmp = (tmp2>>1) + (regs.cc&0x01)*128;
   regs.WrMem(addr, tmp);
   (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -492,7 +492,7 @@ static void Op08(void)  // LSL DP
 }
 static void Op09(void)  // ROL DP
 {
-  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  BYTE tmp2 = regs.RdMem(addr);
+  addr = (regs.dp<<8) | regs.RdMem(regs.pc++);  uint8 tmp2 = regs.RdMem(addr);
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -525,8 +525,8 @@ static void Op0D(void)  // TST DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
   regs.cc &= 0xFD;                              // CLV
-  (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-  (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+  (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+  (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
   regs.clock += 6;
 }
 static void Op0E(void)  // JMP DP
@@ -557,7 +557,7 @@ static void Op12(void)											// NOP
 }
 
 static void Op13(void)  // SYNC
-{ 
+{
   regs.clock += 2;
 }
 static void Op16(void)  // LBRA
@@ -583,7 +583,7 @@ static void Op19(void)  // DAA
     regs.a += 0x60;  regs.cc |= 0x01;              // Then adjust & set carry
   }
   regs.cc &= 0xF1;                             // CL NZV
-  if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag 
+  if (regs.a == 0)  regs.cc |= 0x04;               // Adjust Zero flag
   if (regs.a&0x80)  regs.cc |= 0x08;               // Adjust Negative flag
   regs.clock += 2;
 }
@@ -848,7 +848,7 @@ static void Op3F(void)  // SWI
 {
 }
 static void Op40(void)  // NEGA
-{ 
+{
   regs.a = 256 - regs.a;
   (regs.a > 0x7F  ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust carry
   (regs.a == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -897,7 +897,7 @@ static void Op48(void)  // LSLA  [Keep checking from here...]
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   regs.clock += 2;
 }
-static void Op49(void)  // ROLA  
+static void Op49(void)  // ROLA
 {
   tmp = regs.a;  regs.a = (tmp<<1) + (regs.cc&0x01);
   (tmp&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -935,7 +935,7 @@ static void Op4F(void)  // CLRA
   regs.clock += 2;
 }
 static void Op50(void)  // NEGB
-      { 
+      {
         regs.b = 256 - regs.b;
 //        ((regs.b^tmp)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Adjust H carry
         (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1005,7 +1005,7 @@ static void Op5A(void)  // DECB
 static void Op5C(void)  // INCB
       {
         regs.b++;
-        (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // Adjust oVerflow flag 
+        (regs.b == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // Adjust oVerflow flag
         (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);    // Adjust Zero flag
         (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);    // Adjust Negative flag
         regs.clock += 2;
@@ -1024,9 +1024,9 @@ static void Op5F(void)  // CLRB
         regs.clock += 2;
       }
 static void Op60(void)  // NEG IDX
-      { 
+      {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
-        tmp = regs.RdMem(addr);  BYTE res = 256 - tmp;
+        tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
         regs.WrMem(addr, res);
 //        ((res^tmp)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Adjust H carry
         (res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1058,7 +1058,7 @@ static void Op64(void)  // LSR IDX
 static void Op66(void)  // ROR IDX
       {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
-        tmp = regs.RdMem(addr);  BYTE tmp2 = tmp;
+        tmp = regs.RdMem(addr);  uint8 tmp2 = tmp;
         tmp = (tmp >> 1) + (regs.cc&0x01)*128;
         regs.WrMem(addr, tmp);
         (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -1091,7 +1091,7 @@ static void Op68(void)  // LSL IDX
       }
 static void Op69(void)  // ROL IDX
 {
-  BYTE tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
+  uint8 tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -1101,7 +1101,7 @@ static void Op69(void)  // ROL IDX
 }
 static void Op6A(void)  // DEC IDX
       {
-  BYTE tmp;  WORD addr;
+  uint8 tmp;  uint16 addr;
         addr = DecodeIDX(regs.RdMem(regs.pc++));
         tmp = regs.RdMem(addr) - 1;
         regs.WrMem(addr, tmp);
@@ -1111,7 +1111,7 @@ static void Op6A(void)  // DEC IDX
         regs.clock += 6;
       }
 static void Op6C(void)  // INC IDX
-      {       
+      {
         addr = DecodeIDX(regs.RdMem(regs.pc++));
         tmp = regs.RdMem(addr) + 1;
         regs.WrMem(addr, tmp);
@@ -1123,8 +1123,8 @@ static void Op6C(void)  // INC IDX
 static void Op6D(void)  // TST IDX
       {
         tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-        (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-        (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+        (tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+        (tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
         regs.clock += 6;
       }
 static void Op6E(void)  // JMP IDX
@@ -1140,9 +1140,9 @@ static void Op6F(void)  // CLR IDX
   regs.clock += 6;
 }
 static void Op70(void)  // NEG ABS
-      { 
+      {
         addr = FetchW();
-        tmp = regs.RdMem(addr);  BYTE res = 256 - tmp;
+        tmp = regs.RdMem(addr);  uint8 res = 256 - tmp;
         regs.WrMem(addr, res);
         (res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
         (res == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
@@ -1172,9 +1172,9 @@ static void Op74(void)  // LSR ABS
       }
 static void Op76(void)  // ROR ABS
       {
-  BYTE tmp;  WORD addr;
+  uint8 tmp;  uint16 addr;
         addr = FetchW();
-        tmp = regs.RdMem(addr);  BYTE tmp2 = tmp;
+        tmp = regs.RdMem(addr);  uint8 tmp2 = tmp;
         tmp = (tmp >> 1) + (regs.cc&0x01)*128;
         regs.WrMem(addr, tmp);
         (tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
@@ -1184,7 +1184,7 @@ static void Op76(void)  // ROR ABS
       }
 static void Op77(void)  // ASR ABS
       {
-  BYTE tmp;  WORD addr;
+  uint8 tmp;  uint16 addr;
         addr = FetchW();
         tmp = regs.RdMem(addr);
         (tmp&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Shift bit into carry
@@ -1197,7 +1197,7 @@ static void Op77(void)  // ASR ABS
       }
 static void Op78(void)  // LSL ABS
       {
-  BYTE tmp;  WORD addr;
+  uint8 tmp;  uint16 addr;
         addr = FetchW();
         tmp = regs.RdMem(addr);
         (tmp&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Shift hi bit into carry
@@ -1209,7 +1209,7 @@ static void Op78(void)  // LSL ABS
       }
 static void Op79(void)  // ROL ABS
 {
-  BYTE tmp2 = regs.RdMem(FetchW());
+  uint8 tmp2 = regs.RdMem(FetchW());
   tmp = (tmp2<<1) + (regs.cc&0x01);
   regs.WrMem(addr, tmp);
   (tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
@@ -1219,7 +1219,7 @@ static void Op79(void)  // ROL ABS
 }
 static void Op7A(void)  // DEC ABS
       {
-  BYTE tmp;  WORD addr;
+  uint8 tmp;  uint16 addr;
         addr = FetchW();
         tmp = regs.RdMem(addr) - 1;
         regs.WrMem(addr, tmp);
@@ -1229,8 +1229,8 @@ static void Op7A(void)  // DEC ABS
         regs.clock += 7;
       }
 static void Op7C(void)  // INC ABS
-      {       
-  BYTE tmp;  WORD addr;
+      {
+  uint8 tmp;  uint16 addr;
         addr = FetchW();
         tmp = regs.RdMem(addr) + 1;
         regs.WrMem(addr, tmp);
@@ -1242,10 +1242,10 @@ static void Op7C(void)  // INC ABS
 
 static void Op7D(void)  // TST ABS
 {
-	BYTE tmp = regs.RdMem(FetchW());
+	uint8 tmp = regs.RdMem(FetchW());
 
-	(tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag 
-	(tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag 
+	(tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);   // Adjust Zero flag
+	(tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);   // Adjust Negative flag
 
 	regs.clock += 7;
 }
@@ -1262,8 +1262,8 @@ static void Op7F(void)  // CLR ABS
         regs.clock += 7;
       }
 static void Op80(void)  // SUBA #
-{ 
-  BYTE tmp = regs.RdMem(regs.pc++);  BYTE as = regs.a; 
+{
+  uint8 tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
   regs.a -= tmp;
   (as < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1274,7 +1274,7 @@ static void Op80(void)  // SUBA #
 static void Op81(void)  // CMPA #
 {
   tmp = regs.RdMem(regs.pc++);
-  BYTE db = regs.a - tmp;
+  uint8 db = regs.a - tmp;
   (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((regs.a^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -1283,7 +1283,7 @@ static void Op81(void)  // CMPA #
 }
 static void Op82(void)  // SBCA #
 {
-  tmp = regs.RdMem(regs.pc++);  BYTE as = regs.a; 
+  tmp = regs.RdMem(regs.pc++);  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1293,7 +1293,7 @@ static void Op82(void)  // SBCA #
 }
 static void Op83(void)  // SUBD #
 {
-  addr = FetchW();  WORD dr = (regs.a<<8)|regs.b, ds = dr;
+  addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
   dr -= addr;
   (ds < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^addr^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1337,10 +1337,10 @@ static void Op88(void)  // EORA #
 static void Op89(void)  // ADCA #
 {
   tmp = regs.RdMem(regs.pc++);
-  addr = (WORD)regs.a + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative
@@ -1355,11 +1355,11 @@ static void Op8A(void)  // ORA #
         regs.clock += 2;
       }
 static void Op8B(void)  // ADDA #
-{       
+{
   tmp = regs.RdMem(regs.pc++);  addr = regs.a + tmp;
   (addr > 0xFF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1368,7 +1368,7 @@ static void Op8B(void)  // ADDA #
 static void Op8C(void)  // CMPX #
 {
         addr = FetchW();
-        WORD dw = regs.x - addr;
+        uint16 dw = regs.x - addr;
         (regs.x < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
         ((regs.x^addr^dw^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
         (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -1391,8 +1391,8 @@ static void Op8E(void)  // LDX #
         regs.clock += 3;
       }
 static void Op90(void)  // SUBA DP
-      { 
-        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  BYTE as = regs.a; 
+      {
+        tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1403,7 +1403,7 @@ static void Op90(void)  // SUBA DP
 static void Op91(void)  // CMPA DP
       {
         tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-        BYTE db = regs.a - tmp;
+        uint8 db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1412,7 +1412,7 @@ static void Op91(void)  // CMPA DP
       }
 static void Op92(void)  // SBCA DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  BYTE as = regs.a; 
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1422,8 +1422,8 @@ static void Op92(void)  // SBCA DP
 }
 static void Op93(void)  // SUBD DP
 {
-  addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  WORD dr = (regs.a<<8)|regs.b, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1475,10 +1475,10 @@ static void Op98(void)  // EORA DP
 static void Op99(void)  // ADCA DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (WORD)regs.a + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative
@@ -1493,12 +1493,12 @@ static void Op9A(void)  // ORA DP
         regs.clock += 4;
       }
 static void Op9B(void)  // ADDA DP
-{       
+{
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (WORD)regs.a + (WORD)tmp;
+  addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1507,8 +1507,8 @@ static void Op9B(void)  // ADDA DP
 static void Op9C(void)  // CMPX DP
       {
         addr = (regs.dp<<8)|regs.RdMem(regs.pc++);
-        WORD adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-        WORD dw = regs.x - adr2;
+        uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+        uint16 dw = regs.x - adr2;
         (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.x < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1541,8 +1541,8 @@ static void Op9F(void)  // STX DP
         regs.clock += 5;
       }
 static void OpA0(void)  // SUBA IDX
-      { 
-        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  BYTE as = regs.a; 
+      {
+        tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1553,7 +1553,7 @@ static void OpA0(void)  // SUBA IDX
 static void OpA1(void)  // CMPA IDX
       {
         tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-        BYTE db = regs.a - tmp;
+        uint8 db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1562,7 +1562,7 @@ static void OpA1(void)  // CMPA IDX
       }
 static void OpA2(void)  // SBCA IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  BYTE as = regs.a; 
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1572,8 +1572,8 @@ static void OpA2(void)  // SBCA IDX
 }
 static void OpA3(void)  // SUBD IDX
 {
-  addr = DecodeIDX(regs.RdMem(regs.pc++));  WORD dr = (regs.a<<8)|regs.b, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = DecodeIDX(regs.RdMem(regs.pc++));  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1625,10 +1625,10 @@ static void OpA8(void)  // EORA IDX
 static void OpA9(void)  // ADCA IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (WORD)regs.a + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1643,12 +1643,12 @@ static void OpAA(void)  // ORA IDX
   regs.clock += 4;
 }
 static void OpAB(void)  // ADDA IDX
-{       
+{
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (WORD)regs.a + (WORD)tmp;
+  addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.a = addr & 0xFF;                       // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1657,8 +1657,8 @@ static void OpAB(void)  // ADDA IDX
 static void OpAC(void)  // CMPX IDX
 {
   addr = DecodeIDX(regs.RdMem(regs.pc++));
-  WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-  WORD dw = regs.x - addr2;
+  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  uint16 dw = regs.x - addr2;
   (dw == 0    ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (dw&0x8000  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1691,8 +1691,8 @@ static void OpAF(void)  // STX IDX
   regs.clock += 5;
 }
 static void OpB0(void)  // SUBA ABS
-      { 
-        tmp = regs.RdMem(FetchW());  BYTE as = regs.a; 
+      {
+        tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
         regs.a -= tmp;
         (regs.a == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.a&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1703,7 +1703,7 @@ static void OpB0(void)  // SUBA ABS
 static void OpB1(void)  // CMPA ABS
       {
         tmp = regs.RdMem(FetchW());
-        BYTE db = regs.a - tmp;
+        uint8 db = regs.a - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1712,7 +1712,7 @@ static void OpB1(void)  // CMPA ABS
       }
 static void OpB2(void)  // SBCA ABS
 {
-  tmp = regs.RdMem(FetchW());  BYTE as = regs.a; 
+  tmp = regs.RdMem(FetchW());  uint8 as = regs.a;
   regs.a = regs.a - tmp - (regs.cc&0x01);
   (as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1722,8 +1722,8 @@ static void OpB2(void)  // SBCA ABS
 }
 static void OpB3(void)  // SUBD ABS
 {
-  addr = FetchW();  WORD dr = (regs.a<<8)|regs.b, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b, ds = dr;
+  uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
   dr -= adr2;
   (ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
@@ -1775,10 +1775,10 @@ static void OpB8(void)  // EORA ABS
 static void OpB9(void)  // ADCA ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (WORD)regs.a + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.a = addr;                              // Set accumulator
   (regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1793,9 +1793,9 @@ static void OpBA(void)  // ORA ABS
   regs.clock += 5;
 }
 static void OpBB(void)  // ADDA ABS
-{       
+{
   tmp = regs.RdMem(FetchW());
-  addr = (WORD)regs.a + (WORD)tmp;
+  addr = (uint16)regs.a + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
   ((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
@@ -1806,8 +1806,8 @@ static void OpBB(void)  // ADDA ABS
 }
 static void OpBC(void)  // CMPX ABS
 {
-  addr = FetchW();  WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-  WORD dw = regs.x - addr2;
+  addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+  uint16 dw = regs.x - addr2;
   (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1818,7 +1818,7 @@ static void OpBD(void)  // JSR ABS
 {
   addr = FetchW();
   regs.WrMem(--regs.s, regs.pc&0xFF);  regs.WrMem(--regs.s, regs.pc>>8);
-  regs.pc = addr;                          // Go to absolute address (Not indir) 
+  regs.pc = addr;                          // Go to absolute address (Not indir)
   regs.clock += 8;
 }
 
@@ -1849,8 +1849,8 @@ static void OpBF(void)									// STX ABS
 }
 
 static void OpC0(void)  // SUBB #
-      { 
-        tmp = regs.RdMem(regs.pc++);  BYTE bs = regs.b; 
+      {
+        tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1861,7 +1861,7 @@ static void OpC0(void)  // SUBB #
 static void OpC1(void)  // CMPB #
       {
         tmp = regs.RdMem(regs.pc++);
-        BYTE db = regs.b - tmp;
+        uint8 db = regs.b - tmp;
         (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
         ((regs.b^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
@@ -1870,7 +1870,7 @@ static void OpC1(void)  // CMPB #
       }
 static void OpC2(void)  // SBCB #
 {
-  tmp = regs.RdMem(regs.pc++);  BYTE bs = regs.b; 
+  tmp = regs.RdMem(regs.pc++);  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -1925,10 +1925,10 @@ static void OpC8(void)  // EORB #
 static void OpC9(void)  // ADCB #
 {
   tmp = regs.RdMem(regs.pc++);
-  addr = (WORD)regs.b + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1943,11 +1943,11 @@ static void OpCA(void)  // ORB #
         regs.clock += 2;
       }
 static void OpCB(void)  // ADDB #
-{       
+{
   tmp = regs.RdMem(regs.pc++);  addr = regs.b + tmp;
   (addr > 0xFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -1970,8 +1970,8 @@ static void OpCE(void)  // LDU #
   regs.clock += 3;
 }
 static void OpD0(void)  // SUBB DP
-{ 
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  BYTE bs = regs.b; 
+{
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -1982,7 +1982,7 @@ static void OpD0(void)  // SUBB DP
 static void OpD1(void)  // CMPB DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  BYTE db = regs.b - tmp;
+  uint8 db = regs.b - tmp;
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -1991,7 +1991,7 @@ static void OpD1(void)  // CMPB DP
 }
 static void OpD2(void)  // SBCB DP
 {
-  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  BYTE bs = regs.b; 
+  tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2002,7 +2002,7 @@ static void OpD2(void)  // SBCB DP
 static void OpD3(void)  // ADDD DP
 {
   addr = (regs.dp<<8)|regs.RdMem(regs.pc++);  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2055,10 +2055,10 @@ static void OpD8(void)  // EORB DP
 static void OpD9(void)  // ADCB DP
 {
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (WORD)regs.b + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2073,12 +2073,12 @@ static void OpDA(void)  // ORB DP
         regs.clock += 4;
       }
 static void OpDB(void)  // ADDB DP
-{       
+{
   tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
-  addr = (WORD)regs.b + (WORD)tmp;
+  addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2121,8 +2121,8 @@ static void OpDF(void)  // STU DP
   regs.clock += 5;
 }
 static void OpE0(void)  // SUBB IDX
-{ 
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  BYTE bs = regs.b; 
+{
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
   regs.b -= tmp;
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2133,7 +2133,7 @@ static void OpE0(void)  // SUBB IDX
 static void OpE1(void)  // CMPB IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  BYTE db = regs.b - tmp;
+  uint8 db = regs.b - tmp;
   (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
   (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2142,7 +2142,7 @@ static void OpE1(void)  // CMPB IDX
 }
 static void OpE2(void)  // SBCB IDX
 {
-  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  BYTE bs = regs.b; 
+  tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   ((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
@@ -2153,7 +2153,7 @@ static void OpE2(void)  // SBCB IDX
 static void OpE3(void)  // ADDD IDX
 {
   addr = DecodeIDX(regs.RdMem(regs.pc++));  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2206,10 +2206,10 @@ static void OpE8(void)  // EORB IDX
 static void OpE9(void)  // ADCB IDX
 {
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (WORD)regs.b + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2224,12 +2224,12 @@ static void OpEA(void)  // ORB IDX
         regs.clock += 4;
       }
 static void OpEB(void)  // ADDB IDX
-{       
+{
   tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
-  addr = (WORD)regs.b + (WORD)tmp;
+  addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
   regs.b = addr;                              // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2272,8 +2272,8 @@ static void OpEF(void)  // STU IDX
   regs.clock += 5;
 }
 static void OpF0(void)  // SUBB ABS
-      { 
-        tmp = regs.RdMem(FetchW());  BYTE bs = regs.b; 
+      {
+        tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
         regs.b -= tmp;
         (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2283,7 +2283,7 @@ static void OpF0(void)  // SUBB ABS
 static void OpF1(void)  // CMPB ABS
       {
         tmp = regs.RdMem(FetchW());
-        BYTE db = regs.b - tmp;
+        uint8 db = regs.b - tmp;
         (db == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (db&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         (regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2292,7 +2292,7 @@ static void OpF1(void)  // CMPB ABS
       }
 static void OpF2(void)  // SBCB ABS
 {
-  tmp = regs.RdMem(FetchW());  BYTE bs = regs.b; 
+  tmp = regs.RdMem(FetchW());  uint8 bs = regs.b;
   regs.b = regs.b - tmp - (regs.cc&0x01);
   (regs.b == 0  ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
   (regs.b&0x80  ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
@@ -2303,7 +2303,7 @@ static void OpF2(void)  // SBCB ABS
 static void OpF3(void)  // ADDD ABS
 {
   addr = FetchW();  long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
-  WORD adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+  uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
   dr += adr2;
   (dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
   dr &= 0xFFFF;
@@ -2356,10 +2356,10 @@ static void OpF8(void)  // EORB ABS
 static void OpF9(void)  // ADCB ABS
 {
   tmp = regs.RdMem(FetchW());
-  addr = (WORD)regs.b + (WORD)tmp + (WORD)(regs.cc&0x01);
+  addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2372,14 +2372,14 @@ static void OpFA(void)  // ORB ABS
         (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
         (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
         regs.clock += 5;
-      }       
+      }
 static void OpFB(void)  // ADDB ABS
-{       
+{
   tmp = regs.RdMem(FetchW());
-  addr = (WORD)regs.b + (WORD)tmp;
+  addr = (uint16)regs.b + (uint16)tmp;
   (addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Set Carry flag
   ((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF);  // Set Half carry
-  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo 
+  ((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
   regs.b = addr & 0xFF;                       // Set accumulator
   (regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Set Zero flag
   (regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Set Negative flag
@@ -2521,18 +2521,18 @@ static void Op103F(void)  // SWI2 (Not yet implemented)
 }
 static void Op1083(void)  // CMPD #
     {
-      addr = FetchW();  WORD dr = (regs.a<<8)|regs.b;
-      WORD dw = dr - addr;
+      addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b;
+      uint16 dw = dr - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
-      ((dr^addr^dw^((WORD)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
+      ((dr^addr^dw^((uint16)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
       regs.clock += 5;
     }
 static void Op108C(void)  // CMPY #
     {
       addr = FetchW();
-      WORD dw = regs.y - addr;
+      uint16 dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2549,9 +2549,9 @@ static void Op108E(void)  // LDY #
     }
 static void Op1093(void)  // CMPD DP
     {
-      WORD adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
+      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      WORD dw = dr - addr;
+      uint16 dw = dr - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2560,9 +2560,9 @@ static void Op1093(void)  // CMPD DP
     }
 static void Op109C(void)  // CMPY DP
     {
-      WORD adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      WORD dw = regs.y - addr;
+      uint16 dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2591,9 +2591,9 @@ static void Op109F(void)  // STY DP
     }
 static void Op10A3(void)  // CMPD IDX
 {
-  WORD adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
+  uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
   addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-  WORD dw = dr - addr;
+  uint16 dw = dr - addr;
   regs.cc &= 0xF0;                              // CLC CLV CLZ CLN
   if (dr < addr)  regs.cc |= 0x01;              // Set Carry flag
   if ((dr^addr^dw^(regs.cc<<15))&0x8000)  regs.cc |= 0x02; // Set oVerflow
@@ -2603,9 +2603,9 @@ static void Op10A3(void)  // CMPD IDX
 }
 static void Op10AC(void)  // CMPY IDX
     {
-      WORD adr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      WORD dw = regs.y - addr;
+      uint16 dw = regs.y - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2632,9 +2632,9 @@ static void Op10AF(void)  // STY IDX
     }
 static void Op10B3(void)  // CMPD ABS
     {
-      addr = FetchW();  WORD dr = (regs.a<<8)|regs.b;
-      WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      WORD dw = dr - addr2;
+      addr = FetchW();  uint16 dr = (regs.a<<8)|regs.b;
+      uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16 dw = dr - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (dr < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2643,8 +2643,8 @@ static void Op10B3(void)  // CMPD ABS
     }
 static void Op10BC(void)  // CMPY ABS
     {
-      addr = FetchW();  WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      WORD dw = regs.y - addr2;
+      addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16 dw = regs.y - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.y < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2684,7 +2684,7 @@ static void Op10DE(void)  // LDS DP
       regs.cc &= 0xFD;                              // CLV
       (regs.s == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (regs.s&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
-      regs.clock += 6;                     
+      regs.clock += 6;
     }
 static void Op10DF(void)  // STS DP
     {
@@ -2743,7 +2743,7 @@ static void Op113F(void)  // SWI3
 static void Op1183(void)  // CMPU #
     {
       addr = FetchW();
-      WORD dw = regs.u - addr;
+      uint16 dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2753,7 +2753,7 @@ static void Op1183(void)  // CMPU #
 static void Op118C(void)  // CMPS #
     {
       addr = FetchW();
-      WORD dw = regs.s - addr;
+      uint16 dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2762,9 +2762,9 @@ static void Op118C(void)  // CMPS #
     }
 static void Op1193(void)  // CMPU DP
     {
-      WORD adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      WORD dw = regs.u - addr;
+      uint16 dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2773,9 +2773,9 @@ static void Op1193(void)  // CMPU DP
     }
 static void Op119C(void)  // CMPS DP
     {
-      WORD adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+      uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
       addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
-      WORD dw = regs.s - addr;
+      uint16 dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2784,9 +2784,9 @@ static void Op119C(void)  // CMPS DP
     }
 static void Op11A3(void)  // CMPU IDX
     {
-      WORD addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
-      WORD dw = regs.u - addr;
+      uint16 dw = regs.u - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2795,9 +2795,9 @@ static void Op11A3(void)  // CMPU IDX
     }
 static void Op11AC(void)  // CMPS IDX
     {
-      WORD addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+      uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
       addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
-      WORD dw = regs.s - addr;
+      uint16 dw = regs.s - addr;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2806,8 +2806,8 @@ static void Op11AC(void)  // CMPS IDX
     }
 static void Op11B3(void)  // CMPU ABS
     {
-      addr = FetchW();  WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-      WORD dw = regs.u - addr2;
+      addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+      uint16 dw = regs.u - addr2;
       (dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
       (dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
       (regs.u < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2817,8 +2817,8 @@ static void Op11B3(void)  // CMPU ABS
 
 static void Op11BC(void)  // CMPS ABS
 {
-	addr = FetchW();  WORD addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
-	WORD dw = regs.s - addr2;
+	addr = FetchW();  uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+	uint16 dw = regs.s - addr2;
 	(dw == 0   ? regs.cc |= 0x04 : regs.cc &= 0xFB);  // Adjust Zero flag
 	(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7);  // Adjust Negative flag
 	(regs.s < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE);  // Adjust Carry flag
@@ -2827,8 +2827,8 @@ static void Op11BC(void)  // CMPS ABS
 }
 
 //temp, for testing...
-/*static BYTE backTrace[256];
-static WORD btPC[256];
+/*static uint8 backTrace[256];
+static uint16 btPC[256];
 static int btPtr = 0;//*/
 static void Op__(void)									// Illegal opcode
 {
@@ -2847,23 +2847,23 @@ for(int i=0; i<256; i++)
 //
 // Internal "memcpy" (so we don't have to link with any external libraries!)
 //
-static void myMemcpy(void * dst, void * src, DWORD size)
+static void myMemcpy(void * dst, void * src, uint32 size)
 {
-	BYTE * d = (BYTE *)dst, * s = (BYTE *)src;
+	uint8 * d = (uint8 *)dst, * s = (uint8 *)src;
 
-	for(DWORD i=0; i<size; i++)
+	for(uint32 i=0; i<size; i++)
 		d[i] = s[i];
 }
 
 //
 // Function to execute 6809 instructions
 //
-void Execute6809(V6809REGS * context, DWORD cycles)
+void Execute6809(V6809REGS * context, uint32 cycles)
 {
 	myMemcpy(&regs, context, sizeof(V6809REGS));
 
 	// Execute here...
-DWORD clockSave = regs.clock;
+uint32 clockSave = regs.clock;
 regs.clock = 0;
 	while (regs.clock < cycles)
 	{
@@ -2880,7 +2880,7 @@ btPtr = (btPtr++) & 0xFF;//*/
 
 		// Handle any pending interrupts
 
-		DWORD flags = context->cpuFlags;
+		uint32 flags = context->cpuFlags;
 
 		if (flags & V6809_ASSERT_LINE_RESET)			// *** RESET handler ***
 		{