//
// Virtual 6809 v1.3
//
-// by James L. Hammons
-// (c) 1997, 2006 Underground Software
+// by James Hammons
+// (c) 1997, 2014 Underground Software
//
-// JLH = James L. Hammons <jlhamm@acm.org>
+// JLH = James Hammons <jlhamm@acm.org>
//
// WHO WHEN WHAT
-// --- ---------- ------------------------------------------------------------
+// --- ---------- -----------------------------------------------------------
// JLH 06/15/2006 Added changelog ;-)
// JLH 06/15/2006 Scrubbed all BYTE, WORD & DWORD references from the code
// JLH 11/11/2006 Removed all SignedX() references
#include "v6809.h"
-//#define __DEBUG__
+#define __DEBUG__
#ifdef __DEBUG__
#include "dis6809.h" // Temporary...
#include "log.h" // Temporary...
#define SET_N(r) (regs.cc = ((r) & 0x80 ? regs.cc | FLAG_N : regs.cc & ~FLAG_N))
//Not sure that this code is computing the carry correctly... Investigate! [Seems to be]
-#define SET_C_ADD(a,b) (regs.cc = ((uint8)(b) > (uint8)(~(a)) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
-//#define SET_C_SUB(a,b) (regs.cc = ((uint8)(b) >= (uint8)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
-#define SET_C_CMP(a,b) (regs.cc = ((uint8)(b) >= (uint8)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+#define SET_C_ADD(a,b) (regs.cc = ((uint8_t)(b) > (uint8_t)(~(a)) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+//#define SET_C_SUB(a,b) (regs.cc = ((uint8_t)(b) >= (uint8_t)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
+#define SET_C_CMP(a,b) (regs.cc = ((uint8_t)(b) >= (uint8_t)(a) ? regs.cc | FLAG_C : regs.cc & ~FLAG_C))
#define SET_ZN(r) SET_N(r); SET_Z(r)
#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
//#define SET_ZNC_SUB(a,b,r) SET_N(r); SET_Z(r); SET_C_SUB(a,b)
#define READ_IND_ZP_Y regs.RdMem(EA_IND_ZP_Y)
#define READ_IND_ZP regs.RdMem(EA_IND_ZP)
-#define READ_IMM_WB(v) uint16 addr = EA_IMM; v = regs.RdMem(addr)
-#define READ_ZP_WB(v) uint16 addr = EA_ZP; v = regs.RdMem(addr)
-#define READ_ZP_X_WB(v) uint16 addr = EA_ZP_X; v = regs.RdMem(addr)
-#define READ_ABS_WB(v) uint16 addr = EA_ABS; v = regs.RdMem(addr); regs.pc += 2
-#define READ_ABS_X_WB(v) uint16 addr = EA_ABS_X; v = regs.RdMem(addr); regs.pc += 2
-#define READ_ABS_Y_WB(v) uint16 addr = EA_ABS_Y; v = regs.RdMem(addr); regs.pc += 2
-#define READ_IND_ZP_X_WB(v) uint16 addr = EA_IND_ZP_X; v = regs.RdMem(addr)
-#define READ_IND_ZP_Y_WB(v) uint16 addr = EA_IND_ZP_Y; v = regs.RdMem(addr)
-#define READ_IND_ZP_WB(v) uint16 addr = EA_IND_ZP; v = regs.RdMem(addr)
+#define READ_IMM_WB(v) uint16_t addr = EA_IMM; v = regs.RdMem(addr)
+#define READ_ZP_WB(v) uint16_t addr = EA_ZP; v = regs.RdMem(addr)
+#define READ_ZP_X_WB(v) uint16_t addr = EA_ZP_X; v = regs.RdMem(addr)
+#define READ_ABS_WB(v) uint16_t addr = EA_ABS; v = regs.RdMem(addr); regs.pc += 2
+#define READ_ABS_X_WB(v) uint16_t addr = EA_ABS_X; v = regs.RdMem(addr); regs.pc += 2
+#define READ_ABS_Y_WB(v) uint16_t addr = EA_ABS_Y; v = regs.RdMem(addr); regs.pc += 2
+#define READ_IND_ZP_X_WB(v) uint16_t addr = EA_IND_ZP_X; v = regs.RdMem(addr)
+#define READ_IND_ZP_Y_WB(v) uint16_t addr = EA_IND_ZP_Y; v = regs.RdMem(addr)
+#define READ_IND_ZP_WB(v) uint16_t addr = EA_IND_ZP; v = regs.RdMem(addr)
#define WRITE_BACK(d) regs.WrMem(addr, (d))
static V6809REGS regs;
//Let's see if we can nuke this shit.
-static uint16 addr; // Temporary variables common to all funcs...
-static uint8 tmp;
+static uint16_t addr; // Temporary variables common to all funcs...
+static uint8_t tmp;
// Private function prototypes
-static uint16 FetchW(void);
-static uint16 RdMemW(uint16 addr);
-static void WrMemW(uint16 addr, uint16 w);
-static uint16 ReadEXG(uint8); // Read TFR/EXG post byte
-static void WriteEXG(uint8, uint16); // Set TFR/EXG data
-static uint16 DecodeReg(uint8); // Decode register data
-static uint16 DecodeIDX(uint8); // Decode IDX data
+static uint16_t FetchW(void);
+static uint16_t RdMemW(uint16_t addr);
+static void WrMemW(uint16_t addr, uint16_t w);
+static uint16_t ReadEXG(uint8_t); // Read TFR/EXG post byte
+static void WriteEXG(uint8_t, uint16_t); // Set TFR/EXG data
+static uint16_t DecodeReg(uint8_t); // Decode register data
+static uint16_t DecodeIDX(uint8_t); // Decode IDX data
//static void (* exec_op1[256])();
//static void (* exec_op2[256])();
// Fetch a word out of 6809 memory (little endian format)
// This is a leftover from when fetches were separated from garden variety reads...
//
-static uint16 FetchW()
+static uint16_t FetchW()
{
- uint16 w = RdMemW(regs.pc);
+ uint16_t w = RdMemW(regs.pc);
regs.pc += 2;
return w;
}
//
// Read word from memory function
//
-uint16 RdMemW(uint16 addr)
+uint16_t RdMemW(uint16_t addr)
{
- return (uint16)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
+ return (uint16_t)(regs.RdMem(addr) << 8) | regs.RdMem(addr + 1);
}
//
// Write word to memory function
//
-void WrMemW(uint16 addr, uint16 w)
+void WrMemW(uint16_t addr, uint16_t w)
{
regs.WrMem(addr + 0, w >> 8);
regs.WrMem(addr + 1, w & 0xFF);
//
// Function to read TFR/EXG post byte
//
-uint16 ReadEXG(uint8 code)
+uint16_t ReadEXG(uint8_t code)
{
- uint16 retval;
+ uint16_t retval;
switch (code)
{
//
// Function to set TFR/EXG data
//
-void WriteEXG(uint8 code, uint16 data)
+void WriteEXG(uint8_t code, uint16_t data)
{
switch (code)
{
//
// Function to decode register data
//
-uint16 DecodeReg(uint8 reg)
+uint16_t DecodeReg(uint8_t reg)
{
- uint16 retval;
+ uint16_t retval;
switch (reg)
{
//
// Function to decode IDX data
//
-uint16 DecodeIDX(uint8 code)
+uint16_t DecodeIDX(uint8_t code)
{
- uint16 addr, woff;
- uint8 reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
+ uint16_t addr, woff;
+ uint8_t reg = (code & 0x60) >> 5, idxind = (code & 0x10) >> 4, lo_nyb = code & 0x0F;
if (!(code & 0x80)) // Hi bit unset? Then decode 4 bit offset
addr = DecodeReg(reg) + (idxind ? lo_nyb - 16 : lo_nyb);
addr = RdMemW(woff);
break;
case 5:
- woff = DecodeReg(reg) + (int16)(int8)regs.b;
+ woff = DecodeReg(reg) + (int16_t)(int8_t)regs.b;
addr = RdMemW(woff);
break;
case 6:
- woff = DecodeReg(reg) + (int16)(int8)regs.a;
+ woff = DecodeReg(reg) + (int16_t)(int8_t)regs.a;
addr = RdMemW(woff);
break;
case 8:
- woff = DecodeReg(reg) + (int16)(int8)regs.RdMem(regs.pc++);
+ woff = DecodeReg(reg) + (int16_t)(int8_t)regs.RdMem(regs.pc++);
addr = RdMemW(woff);
break;
case 9:
addr = RdMemW(woff);
break;
case 12:
- woff = regs.pc + (int16)(int8)regs.RdMem(regs.pc++);
+ woff = regs.pc + (int16_t)(int8_t)regs.RdMem(regs.pc++);
addr = RdMemW(woff);
break;
case 13:
}
addr = DecodeReg(reg); break; }
case 4: { addr = DecodeReg(reg); break; }
- case 5: { addr = DecodeReg(reg) + (int16)(int8)regs.b; break; }
- case 6: { addr = DecodeReg(reg) + (int16)(int8)regs.a; break; }
- case 8: { addr = DecodeReg(reg) + (int16)(int8)regs.RdMem(regs.pc++); break; }
+ case 5: { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.b; break; }
+ case 6: { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.a; break; }
+ case 8: { addr = DecodeReg(reg) + (int16_t)(int8_t)regs.RdMem(regs.pc++); break; }
case 9: { addr = DecodeReg(reg) + FetchW(); break; }
case 11: { addr = DecodeReg(reg) + ((regs.a << 8) | regs.b); break; }
- case 12: { addr = regs.pc + (int16)(int8)regs.RdMem(regs.pc++); break; }
+ case 12: { addr = regs.pc + (int16_t)(int8_t)regs.RdMem(regs.pc++); break; }
case 13: { addr = regs.pc + FetchW(); break; }
}
}
}
static void Op06(void) // ROR DP
{
- addr = (regs.dp<<8) | regs.RdMem(regs.pc++); uint8 tmp2 = regs.RdMem(addr);
+ addr = (regs.dp<<8) | regs.RdMem(regs.pc++); uint8_t tmp2 = regs.RdMem(addr);
tmp = (tmp2>>1) + (regs.cc&0x01)*128;
regs.WrMem(addr, tmp);
(tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
}
static void Op09(void) // ROL DP
{
- addr = (regs.dp<<8) | regs.RdMem(regs.pc++); uint8 tmp2 = regs.RdMem(addr);
+ addr = (regs.dp<<8) | regs.RdMem(regs.pc++); uint8_t tmp2 = regs.RdMem(addr);
tmp = (tmp2<<1) + (regs.cc&0x01);
regs.WrMem(addr, tmp);
(tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
static void Op17(void) // LBSR
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
regs.WrMem(--regs.s, regs.pc & 0xFF);
regs.WrMem(--regs.s, regs.pc >> 8);
// regs.pc += SignedW(addr);
static void Op19(void) // DAA
{
- if ((regs.cc&0x20) || ((regs.a&0x0F) > 0x09)) // H set or lo nyb too big?
- {
- regs.a += 0x06; regs.cc |= 0x20; // Then adjust & set half carry
- }
- if ((regs.cc&0x01) || (regs.a > 0x9F)) // C set or hi nyb too big?
- {
- regs.a += 0x60; regs.cc |= 0x01; // Then adjust & set carry
- }
- regs.cc &= 0xF1; // CL NZV
- if (regs.a == 0) regs.cc |= 0x04; // Adjust Zero flag
- if (regs.a&0x80) regs.cc |= 0x08; // Adjust Negative flag
- regs.clock += 2;
+#if 0
+ uint8_t result = regs.a;
+
+ if ((regs.cc&0x20) || ((regs.a&0x0F) > 0x09)) // H set or lo nyb too big?
+ {
+// regs.a += 0x06;
+ result += 0x06;
+ regs.cc |= 0x20; // Then adjust & set half carry
+ }
+
+ if ((regs.cc&0x01) || (regs.a > 0x9F)) // C set or hi nyb too big?
+ {
+// regs.a += 0x60;
+ result += 0x60;
+ regs.cc |= 0x01; // Then adjust & set carry
+ }
+
+ regs.a = result;
+
+ regs.cc &= 0xF1; // CL NZV
+ if (regs.a == 0) regs.cc |= 0x04; // Adjust Zero flag
+ if (regs.a&0x80) regs.cc |= 0x08; // Adjust Negative flag
+#else
+ uint16_t result = (uint16_t)regs.a;
+
+ if ((regs.a & 0x0F) > 0x09 || (regs.cc & FLAG_H))
+ result += 0x06;
+
+ if ((regs.a & 0xF0) > 0x90 || (regs.cc & FLAG_C) || ((regs.a & 0xF0) > 0x80 && (regs.a & 0x0F) > 0x09))
+ result += 0x60;
+
+ regs.a = (uint8_t)result;
+// SET_ZN(result);
+// CLR_V; // Not sure this is correct...
+ regs.cc &= 0xF1; // CL NZV
+ if (regs.a == 0) regs.cc |= 0x04; // Adjust Zero flag
+ if (regs.a&0x80) regs.cc |= 0x08; // Adjust Negative flag
+// flagC |= (result & 0x100) >> 8; // Overwrite carry if it was 0, otherwise, ignore
+ regs.cc |= (result & 0x100) > 8;
+#endif
+ regs.clock += 2;
}
static void Op1A(void) // ORCC #
static void Op20(void) // BRA
{
// regs.pc += SignedB(regs.RdMem(regs.pc++)); // Branch always
- regs.pc += (int16)(int8)regs.RdMem(regs.pc) + 1; // Branch always
+ regs.pc += (int16_t)(int8_t)regs.RdMem(regs.pc) + 1; // Branch always
regs.clock += 3;
}
static void Op22(void) // BHI
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(regs.cc & 0x05))
regs.pc += word;
static void Op23(void) // BLS
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (regs.cc & 0x05)
regs.pc += word;
static void Op24(void) // BCC (BHS)
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(regs.cc & 0x01))
regs.pc += word;
static void Op25(void) // BCS (BLO)
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (regs.cc & 0x01)
regs.pc += word;
static void Op26(void) // BNE
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(regs.cc & 0x04))
regs.pc += word;
static void Op27(void) // BEQ
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (regs.cc & 0x04)
regs.pc += word;
static void Op28(void) // BVC
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(regs.cc & 0x02))
regs.pc += word;
static void Op29(void) // BVS
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (regs.cc & 0x02)
regs.pc += word;
static void Op2A(void) // BPL
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(regs.cc & 0x08))
regs.pc += word;
static void Op2B(void) // BMI
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (regs.cc & 0x08)
regs.pc += word;
static void Op2C(void) // BGE
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!(((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
regs.pc += word;
static void Op2D(void) // BLT
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))
regs.pc += word;
static void Op2E(void) // BGT
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if (!((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))))
regs.pc += word;
static void Op2F(void) // BLE
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
if ((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
regs.pc += word;
static void Op60(void) // NEG IDX
{
addr = DecodeIDX(regs.RdMem(regs.pc++));
- tmp = regs.RdMem(addr); uint8 res = 256 - tmp;
+ tmp = regs.RdMem(addr); uint8_t res = 256 - tmp;
regs.WrMem(addr, res);
// ((res^tmp)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Adjust H carry
(res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op66(void) // ROR IDX
{
addr = DecodeIDX(regs.RdMem(regs.pc++));
- tmp = regs.RdMem(addr); uint8 tmp2 = tmp;
+ tmp = regs.RdMem(addr); uint8_t tmp2 = tmp;
tmp = (tmp >> 1) + (regs.cc&0x01)*128;
regs.WrMem(addr, tmp);
(tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
}
static void Op69(void) // ROL IDX
{
- uint8 tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
+ uint8_t tmp2 = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
tmp = (tmp2<<1) + (regs.cc&0x01);
regs.WrMem(addr, tmp);
(tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
}
static void Op6A(void) // DEC IDX
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = DecodeIDX(regs.RdMem(regs.pc++));
tmp = regs.RdMem(addr) - 1;
regs.WrMem(addr, tmp);
static void Op70(void) // NEG ABS
{
addr = FetchW();
- tmp = regs.RdMem(addr); uint8 res = 256 - tmp;
+ tmp = regs.RdMem(addr); uint8_t res = 256 - tmp;
regs.WrMem(addr, res);
(res == 0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
(res == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
}
static void Op76(void) // ROR ABS
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = FetchW();
- tmp = regs.RdMem(addr); uint8 tmp2 = tmp;
+ tmp = regs.RdMem(addr); uint8_t tmp2 = tmp;
tmp = (tmp >> 1) + (regs.cc&0x01)*128;
regs.WrMem(addr, tmp);
(tmp2&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
}
static void Op77(void) // ASR ABS
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = FetchW();
tmp = regs.RdMem(addr);
(tmp&0x01 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift bit into carry
}
static void Op78(void) // LSL ABS
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = FetchW();
tmp = regs.RdMem(addr);
(tmp&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
}
static void Op79(void) // ROL ABS
{
- uint8 tmp2 = regs.RdMem(FetchW());
+ uint8_t tmp2 = regs.RdMem(FetchW());
tmp = (tmp2<<1) + (regs.cc&0x01);
regs.WrMem(addr, tmp);
(tmp2&0x80 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Shift hi bit into carry
}
static void Op7A(void) // DEC ABS
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = FetchW();
tmp = regs.RdMem(addr) - 1;
regs.WrMem(addr, tmp);
}
static void Op7C(void) // INC ABS
{
- uint8 tmp; uint16 addr;
+ uint8_t tmp; uint16_t addr;
addr = FetchW();
tmp = regs.RdMem(addr) + 1;
regs.WrMem(addr, tmp);
static void Op7D(void) // TST ABS
{
- uint8 tmp = regs.RdMem(FetchW());
+ uint8_t tmp = regs.RdMem(FetchW());
(tmp == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(tmp&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
}
static void Op80(void) // SUBA #
{
- uint8 tmp = regs.RdMem(regs.pc++); uint8 as = regs.a;
+ uint8_t tmp = regs.RdMem(regs.pc++); uint8_t as = regs.a;
regs.a -= tmp;
(as < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op81(void) // CMPA #
{
tmp = regs.RdMem(regs.pc++);
- uint8 db = regs.a - tmp;
+ uint8_t db = regs.a - tmp;
(regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((regs.a^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
}
static void Op82(void) // SBCA #
{
- tmp = regs.RdMem(regs.pc++); uint8 as = regs.a;
+ tmp = regs.RdMem(regs.pc++); uint8_t as = regs.a;
regs.a = regs.a - tmp - (regs.cc&0x01);
(as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void Op83(void) // SUBD #
{
- addr = FetchW(); uint16 dr = (regs.a<<8)|regs.b, ds = dr;
+ addr = FetchW(); uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
dr -= addr;
(ds < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((ds^addr^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op89(void) // ADCA #
{
tmp = regs.RdMem(regs.pc++);
- addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op8C(void) // CMPX #
{
addr = FetchW();
- uint16 dw = regs.x - addr;
+ uint16_t dw = regs.x - addr;
(regs.x < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((regs.x^addr^dw^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
static void Op8D(void) // Bregs.s
{
- uint16 word = (int16)(int8)regs.RdMem(regs.pc++);
+ uint16_t word = (int16_t)(int8_t)regs.RdMem(regs.pc++);
regs.WrMem(--regs.s, regs.pc & 0xFF);
regs.WrMem(--regs.s, regs.pc >> 8);
regs.pc += word;
}
static void Op90(void) // SUBA DP
{
- tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8 as = regs.a;
+ tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8_t as = regs.a;
regs.a -= tmp;
(regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void Op91(void) // CMPA DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- uint8 db = regs.a - tmp;
+ uint8_t db = regs.a - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op92(void) // SBCA DP
{
- tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8 as = regs.a;
+ tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8_t as = regs.a;
regs.a = regs.a - tmp - (regs.cc&0x01);
(as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void Op93(void) // SUBD DP
{
- addr = (regs.dp<<8)|regs.RdMem(regs.pc++); uint16 dr = (regs.a<<8)|regs.b, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ addr = (regs.dp<<8)|regs.RdMem(regs.pc++); uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+ uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
dr -= adr2;
(ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op99(void) // ADCA DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void Op9B(void) // ADDA DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- addr = (uint16)regs.a + (uint16)tmp;
+ addr = (uint16_t)regs.a + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
static void Op9C(void) // CMPX DP
{
addr = (regs.dp<<8)|regs.RdMem(regs.pc++);
- uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.x - adr2;
+ uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.x - adr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.x < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpA0(void) // SUBA IDX
{
- tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8 as = regs.a;
+ tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8_t as = regs.a;
regs.a -= tmp;
(regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpA1(void) // CMPA IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- uint8 db = regs.a - tmp;
+ uint8_t db = regs.a - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpA2(void) // SBCA IDX
{
- tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8 as = regs.a;
+ tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8_t as = regs.a;
regs.a = regs.a - tmp - (regs.cc&0x01);
(as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void OpA3(void) // SUBD IDX
{
- addr = DecodeIDX(regs.RdMem(regs.pc++)); uint16 dr = (regs.a<<8)|regs.b, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ addr = DecodeIDX(regs.RdMem(regs.pc++)); uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+ uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
dr -= adr2;
(ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpA9(void) // ADCA IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
static void OpAB(void) // ADDA IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- addr = (uint16)regs.a + (uint16)tmp;
+ addr = (uint16_t)regs.a + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
static void OpAC(void) // CMPX IDX
{
addr = DecodeIDX(regs.RdMem(regs.pc++));
- uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.x - addr2;
+ uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.x - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpB0(void) // SUBA ABS
{
- tmp = regs.RdMem(FetchW()); uint8 as = regs.a;
+ tmp = regs.RdMem(FetchW()); uint8_t as = regs.a;
regs.a -= tmp;
(regs.a == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.a&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpB1(void) // CMPA ABS
{
tmp = regs.RdMem(FetchW());
- uint8 db = regs.a - tmp;
+ uint8_t db = regs.a - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.a < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpB2(void) // SBCA ABS
{
- tmp = regs.RdMem(FetchW()); uint8 as = regs.a;
+ tmp = regs.RdMem(FetchW()); uint8_t as = regs.a;
regs.a = regs.a - tmp - (regs.cc&0x01);
(as < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((as^tmp^regs.a^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void OpB3(void) // SUBD ABS
{
- addr = FetchW(); uint16 dr = (regs.a<<8)|regs.b, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ addr = FetchW(); uint16_t dr = (regs.a<<8)|regs.b, ds = dr;
+ uint16_t adr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
dr -= adr2;
(ds < adr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((ds^adr2^dr^(regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
static void OpB9(void) // ADCA ABS
{
tmp = regs.RdMem(FetchW());
- addr = (uint16)regs.a + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.a + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpBB(void) // ADDA ABS
{
tmp = regs.RdMem(FetchW());
- addr = (uint16)regs.a + (uint16)tmp;
+ addr = (uint16_t)regs.a + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.a^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.a^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
}
static void OpBC(void) // CMPX ABS
{
- addr = FetchW(); uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.x - addr2;
+ addr = FetchW(); uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.x - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.x < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
static void OpC0(void) // SUBB #
{
- tmp = regs.RdMem(regs.pc++); uint8 bs = regs.b;
+ tmp = regs.RdMem(regs.pc++); uint8_t bs = regs.b;
regs.b -= tmp;
(regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpC1(void) // CMPB #
{
tmp = regs.RdMem(regs.pc++);
- uint8 db = regs.b - tmp;
+ uint8_t db = regs.b - tmp;
(regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((regs.b^tmp^db^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
}
static void OpC2(void) // SBCB #
{
- tmp = regs.RdMem(regs.pc++); uint8 bs = regs.b;
+ tmp = regs.RdMem(regs.pc++); uint8_t bs = regs.b;
regs.b = regs.b - tmp - (regs.cc&0x01);
(bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpC9(void) // ADCB #
{
tmp = regs.RdMem(regs.pc++);
- addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
}
static void OpD0(void) // SUBB DP
{
- tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8 bs = regs.b;
+ tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8_t bs = regs.b;
regs.b -= tmp;
(regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpD1(void) // CMPB DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- uint8 db = regs.b - tmp;
+ uint8_t db = regs.b - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpD2(void) // SBCB DP
{
- tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8 bs = regs.b;
+ tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++)); uint8_t bs = regs.b;
regs.b = regs.b - tmp - (regs.cc&0x01);
(bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpD3(void) // ADDD DP
{
addr = (regs.dp<<8)|regs.RdMem(regs.pc++); long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+ uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
dr += adr2;
(dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
dr &= 0xFFFF;
static void OpD9(void) // ADCB DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpDB(void) // ADDB DP
{
tmp = regs.RdMem((regs.dp<<8)|regs.RdMem(regs.pc++));
- addr = (uint16)regs.b + (uint16)tmp;
+ addr = (uint16_t)regs.b + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void OpE0(void) // SUBB IDX
{
- tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8 bs = regs.b;
+ tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8_t bs = regs.b;
regs.b -= tmp;
(regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpE1(void) // CMPB IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- uint8 db = regs.b - tmp;
+ uint8_t db = regs.b - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpE2(void) // SBCB IDX
{
- tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8 bs = regs.b;
+ tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++))); uint8_t bs = regs.b;
regs.b = regs.b - tmp - (regs.cc&0x01);
(bs < (tmp+(regs.cc&0x01)) ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
((bs^tmp^regs.b^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpE3(void) // ADDD IDX
{
addr = DecodeIDX(regs.RdMem(regs.pc++)); long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+ uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
dr += adr2;
(dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
dr &= 0xFFFF;
static void OpE9(void) // ADCB IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
static void OpEB(void) // ADDB IDX
{
tmp = regs.RdMem(DecodeIDX(regs.RdMem(regs.pc++)));
- addr = (uint16)regs.b + (uint16)tmp;
+ addr = (uint16_t)regs.b + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflow
}
static void OpF0(void) // SUBB ABS
{
- tmp = regs.RdMem(FetchW()); uint8 bs = regs.b;
+ tmp = regs.RdMem(FetchW()); uint8_t bs = regs.b;
regs.b -= tmp;
(regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpF1(void) // CMPB ABS
{
tmp = regs.RdMem(FetchW());
- uint8 db = regs.b - tmp;
+ uint8_t db = regs.b - tmp;
(db == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(db&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.b < tmp ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void OpF2(void) // SBCB ABS
{
- tmp = regs.RdMem(FetchW()); uint8 bs = regs.b;
+ tmp = regs.RdMem(FetchW()); uint8_t bs = regs.b;
regs.b = regs.b - tmp - (regs.cc&0x01);
(regs.b == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(regs.b&0x80 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
static void OpF3(void) // ADDD ABS
{
addr = FetchW(); long dr = ((regs.a<<8)|regs.b)&0xFFFF, ds = dr;
- uint16 adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
+ uint16_t adr2 = (regs.RdMem(addr)<<8)|regs.RdMem(addr+1);
dr += adr2;
(dr > 0xFFFF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
dr &= 0xFFFF;
static void OpF9(void) // ADCB ABS
{
tmp = regs.RdMem(FetchW());
- addr = (uint16)regs.b + (uint16)tmp + (uint16)(regs.cc&0x01);
+ addr = (uint16_t)regs.b + (uint16_t)tmp + (uint16_t)(regs.cc&0x01);
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
static void OpFB(void) // ADDB ABS
{
tmp = regs.RdMem(FetchW());
- addr = (uint16)regs.b + (uint16)tmp;
+ addr = (uint16_t)regs.b + (uint16_t)tmp;
(addr > 0x00FF ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Set Carry flag
((regs.b^tmp^addr)&0x10 ? regs.cc |= 0x20 : regs.cc &= 0xDF); // Set Half carry
((regs.b^tmp^addr^(regs.cc<<7))&0x80 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerflo
static void Op1022(void) // LBHI
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!((regs.cc & 0x01) | (regs.cc & 0x04)))
regs.pc += word;
static void Op1023(void) // LBLS
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if ((regs.cc & 0x01) | (regs.cc & 0x04))
regs.pc += word;
static void Op1024(void) // LBCC (LBHS)
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!(regs.cc & 0x01))
regs.pc += word;
static void Op1025(void) // LBCS (LBLO)
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (regs.cc & 0x01)
regs.pc += word;
static void Op1026(void) // LBNE
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!(regs.cc & 0x04))
regs.pc += word;
static void Op1027(void) // LBEQ
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (regs.cc & 0x04)
regs.pc += word;
static void Op1028(void) // LBVC
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!(regs.cc & 0x02))
regs.pc += word;
static void Op1029(void) // LBVS
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (regs.cc & 0x02)
regs.pc += word;
static void Op102A(void) // LBPL
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!(regs.cc & 0x08))
regs.pc += word;
static void Op102B(void) // LBMI
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (regs.cc & 0x08)
regs.pc += word;
static void Op102C(void) // LBGE
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!(((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
regs.pc += word;
static void Op102D(void) // LBLT
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))
regs.pc += word;
static void Op102E(void) // LBGT
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if (!((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02))))
regs.pc += word;
static void Op102F(void) // LBLE
{
- uint16 word = FetchW();
+ uint16_t word = FetchW();
if ((regs.cc & 0x04) | (((regs.cc & 0x08) >> 2) ^ (regs.cc & 0x02)))
regs.pc += word;
}
static void Op1083(void) // CMPD #
{
- addr = FetchW(); uint16 dr = (regs.a<<8)|regs.b;
- uint16 dw = dr - addr;
+ addr = FetchW(); uint16_t dr = (regs.a<<8)|regs.b;
+ uint16_t dw = dr - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
- ((dr^addr^dw^((uint16)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
+ ((dr^addr^dw^((uint16_t)regs.cc<<15))&0x8000 ? regs.cc |= 0x02 : regs.cc &= 0xFD); // oVerfl
regs.clock += 5;
}
static void Op108C(void) // CMPY #
{
addr = FetchW();
- uint16 dw = regs.y - addr;
+ uint16_t dw = regs.y - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op1093(void) // CMPD DP
{
- uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
+ uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++), dr = (regs.a<<8)|regs.b;
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = dr - addr;
+ uint16_t dw = dr - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(dr < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op109C(void) // CMPY DP
{
- uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+ uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = regs.y - addr;
+ uint16_t dw = regs.y - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op10A3(void) // CMPD IDX
{
- uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
+ uint16_t adr2 = DecodeIDX(regs.RdMem(regs.pc++)), dr = (regs.a<<8)|regs.b;
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = dr - addr;
+ uint16_t dw = dr - addr;
regs.cc &= 0xF0; // CLC CLV CLZ CLN
if (dr < addr) regs.cc |= 0x01; // Set Carry flag
if ((dr^addr^dw^(regs.cc<<15))&0x8000) regs.cc |= 0x02; // Set oVerflow
}
static void Op10AC(void) // CMPY IDX
{
- uint16 adr2 = DecodeIDX(regs.RdMem(regs.pc++));
+ uint16_t adr2 = DecodeIDX(regs.RdMem(regs.pc++));
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = regs.y - addr;
+ uint16_t dw = regs.y - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.y < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op10B3(void) // CMPD ABS
{
- addr = FetchW(); uint16 dr = (regs.a<<8)|regs.b;
- uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = dr - addr2;
+ addr = FetchW(); uint16_t dr = (regs.a<<8)|regs.b;
+ uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = dr - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(dr < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op10BC(void) // CMPY ABS
{
- addr = FetchW(); uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.y - addr2;
+ addr = FetchW(); uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.y - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.y < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
static void Op1183(void) // CMPU #
{
addr = FetchW();
- uint16 dw = regs.u - addr;
+ uint16_t dw = regs.u - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
static void Op118C(void) // CMPS #
{
addr = FetchW();
- uint16 dw = regs.s - addr;
+ uint16_t dw = regs.s - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op1193(void) // CMPU DP
{
- uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+ uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = regs.u - addr;
+ uint16_t dw = regs.u - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op119C(void) // CMPS DP
{
- uint16 adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
+ uint16_t adr2 = (regs.dp<<8)|regs.RdMem(regs.pc++);
addr = (regs.RdMem(adr2)<<8) | regs.RdMem(adr2+1);
- uint16 dw = regs.s - addr;
+ uint16_t dw = regs.s - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op11A3(void) // CMPU IDX
{
- uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+ uint16_t addr2 = DecodeIDX(regs.RdMem(regs.pc++));
addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
- uint16 dw = regs.u - addr;
+ uint16_t dw = regs.u - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.u < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op11AC(void) // CMPS IDX
{
- uint16 addr2 = DecodeIDX(regs.RdMem(regs.pc++));
+ uint16_t addr2 = DecodeIDX(regs.RdMem(regs.pc++));
addr = (regs.RdMem(addr2)<<8) | regs.RdMem(addr2+1);
- uint16 dw = regs.s - addr;
+ uint16_t dw = regs.s - addr;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.s < addr ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
}
static void Op11B3(void) // CMPU ABS
{
- addr = FetchW(); uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.u - addr2;
+ addr = FetchW(); uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.u - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.u < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
static void Op11BC(void) // CMPS ABS
{
- addr = FetchW(); uint16 addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
- uint16 dw = regs.s - addr2;
+ addr = FetchW(); uint16_t addr2 = (regs.RdMem(addr)<<8) | regs.RdMem(addr+1);
+ uint16_t dw = regs.s - addr2;
(dw == 0 ? regs.cc |= 0x04 : regs.cc &= 0xFB); // Adjust Zero flag
(dw&0x8000 ? regs.cc |= 0x08 : regs.cc &= 0xF7); // Adjust Negative flag
(regs.s < addr2 ? regs.cc |= 0x01 : regs.cc &= 0xFE); // Adjust Carry flag
//temp, for testing...
#ifdef __DEBUG__
-static uint8 backTrace[256];
-static uint16 btPC[256];
+static uint8_t backTrace[256];
+static uint16_t btPC[256];
static int btPtr = 0;//*/
#endif
static void Op__(void) // Illegal opcode
//
// Internal "memcpy" (so we don't have to link with any external libraries!)
//
-static void myMemcpy(void * dst, void * src, uint32 size)
+static void myMemcpy(void * dst, void * src, uint32_t size)
{
- uint8 * d = (uint8 *)dst, * s = (uint8 *)src;
+ uint8_t * d = (uint8_t *)dst, * s = (uint8_t *)src;
- for(uint32 i=0; i<size; i++)
+ for(uint32_t i=0; i<size; i++)
d[i] = s[i];
}
#ifdef DEBUG_ILLEGAL
#include "log.h"
#include "dis6809.h"
-uint8 btPtr = 0;
-uint8 backTrace[256];
+uint8_t btPtr = 0;
+uint8_t backTrace[256];
V6809REGS btRegs[256];
bool tripped = false;
#endif
-void Execute6809(V6809REGS * context, uint32 cycles)
+#ifdef __DEBUG__
+//Here so this can be externally linked
+bool disasm = false;
+//bool disasm = true;
+#endif
+void Execute6809(V6809REGS * context, uint32_t cycles)
{
// If this is not in place, the clockOverrun calculations can cause the V6809 to get
// stuck in an infinite loop.
// through we remove them from the cycles passed in in order to come out
// approximately even. Over the long run, this unevenness in execution times
// evens out.
- uint64 endCycles = regs.clock + (uint64)(cycles - regs.clockOverrun);
+ uint64_t endCycles = regs.clock + (uint64_t)(cycles - regs.clockOverrun);
while (regs.clock < endCycles)
{
WriteLog("V6809: Executed illegal instruction!!!!\n\nBacktrace:\n\n");
regs.cpuFlags &= ~V6809_STATE_ILLEGAL_INST;
- for(uint16 i=btPtr; i<btPtr+256; i++)
+ for(uint16_t i=btPtr; i<btPtr+256; i++)
{
Decode6809(btRegs[i & 0xFF].pc);
// Note that these values are *before* execution, so stale...
#endif
#ifdef __DEBUG__
//Decode6809(regs.pc);
-//static bool disasm = false;
-static bool disasm = true;
if (disasm) Decode6809(regs);
/*//if (regs.pc == 0x15BA) disasm = true;
//if (regs.pc == 0xFE76) disasm = true;
// Handle any pending interrupts
- uint32 flags = context->cpuFlags;
+// Hmm, this is bad and only works when flags are changed OUTSIDE of the running context...
+// uint32_t flags = context->cpuFlags;
+ uint32_t flags = regs.cpuFlags;
if (flags & V6809_ASSERT_LINE_RESET) // *** RESET handler ***
{
regs.clock += 19;
// Apparently, not done here!
// Need to put IRQ handling in somewhere... It shouldn't be cleared here!
- context->cpuFlags &= ~V6809_ASSERT_LINE_IRQ; // Reset the asserted line (IRQ)...
- regs.cpuFlags &= ~V6809_ASSERT_LINE_IRQ; // Reset the asserted line (IRQ)...
+// context->cpuFlags &= ~V6809_ASSERT_LINE_IRQ; // Reset the asserted line (IRQ)...
+// regs.cpuFlags &= ~V6809_ASSERT_LINE_IRQ; // Reset the asserted line (IRQ)...
}
}
#ifdef __DEBUG__
-if (disasm) WriteLog("\tA=%02X B=%02X CC=%02X DP=%02X X=%04X Y=%04X S=%04X U=%04X PC=%04X\n",
- regs.a, regs.b, regs.cc, regs.dp, regs.x, regs.y, regs.s, regs.u, regs.pc);//*/
+if (disasm) WriteLog("\tCC=%s%s%s%s%s%s%s%s A=%02X B=%02X DP=%02X X=%04X Y=%04X S=%04X U=%04X PC=%04X\n",
+ (regs.cc & FLAG_E ? "E" : "-"), (regs.cc & FLAG_F ? "F" : "-"), (regs.cc & FLAG_H ? "H" : "-"),
+ (regs.cc & FLAG_I ? "I" : "-"), (regs.cc & FLAG_N ? "N" : "-"), (regs.cc & FLAG_Z ? "Z" : "-"),
+ (regs.cc & FLAG_V ? "V" : "-"), (regs.cc & FLAG_C ? "C" : "-"),
+ regs.a, regs.b, regs.dp, regs.x, regs.y, regs.s, regs.u, regs.pc);//*/
/*WriteLog("\tA=%02X B=%02X CC=%02X DP=%02X X=%04X Y=%04X S=%04X U=%04X PC=%04X\n",
regs.a, regs.b, regs.cc, regs.dp, regs.x, regs.y, regs.s, regs.u, regs.pc);//*/
#endif
}
-
// Keep track of how much we overran so we can adjust on the next run...
- regs.clockOverrun = (uint32)(regs.clock - endCycles);
+ regs.clockOverrun = (uint32_t)(regs.clock - endCycles);
myMemcpy(context, ®s, sizeof(V6809REGS));
+
+#ifdef __DEBUG__
+ if (disasm)
+ WriteLog("\n*** CONTEXT SWITCH ***\n\n");
+#endif
}
//
// Get the clock of the currently executing CPU
//
-uint64 GetCurrentV6809Clock(void)
+uint64_t GetCurrentV6809Clock(void)
{
return regs.clock;
}
//
// Get the PC of the currently executing CPU
//
-uint16 GetCurrentV6809PC(void)
+uint16_t GetCurrentV6809PC(void)
{
return regs.pc;
}
// Set a line of the currently executing CPU
-void SetLine(uint32 line)
+void SetLineOfCurrentV6809(uint32_t line)
{
regs.cpuFlags |= line;
}
// Clear a line of the currently executing CPU
-void ClearLine(uint32 line)
+void ClearLineOfCurrentV6809(uint32_t line)
{
+#ifdef __DEBUG__
+if (disasm)
+ WriteLog("V6809: Clearing line %s...", (line == V6809_ASSERT_LINE_IRQ ? "IRQ" : "OTHER"));
+#endif
regs.cpuFlags &= ~line;
}