//
// Virtual 6808 Emulator v2.0
//
-// by James L. Hammons
+// by James Hammons
// (C) 2006 Underground Software
//
-// JLH = James L. Hammons <jlhamm@acm.org>
+// JLH = James Hammons <jlhamm@acm.org>
//
// WHO WHEN WHAT
-// --- ---------- ------------------------------------------------------------
+// --- ---------- -----------------------------------------------------------
// JLH 06/15/2006 Added changelog ;-)
// JLH 06/15/2006 Scrubbed all BYTE, WORD & DWORD references from the code
// JLH 11/13/2006 Converted core to V65C02 macro style :-)
// NOTE: V6808_STATE_WAI is not handled in the main loop correctly. !!! FIX !!!
// Some random thoughts: Could there be a performance gain by breaking
-// out the flags in regs.cc into separate uint8 variables (or bools)?
+// out the flags in regs.cc into separate uint8_t variables (or bools)?
// You'd have to convert on entering and exiting the emulation loop, but I
// think the perfomance hit would be negligible compared to the gain in not
// having to mask and shift flags all the time. Investigate after the
#define SET_N(r) (flagN = ((r) & 0x80) >> 7)
#define SET_V(a,b,r) (flagV = (((b) ^ (a) ^ (r) ^ ((r) >> 1)) & 0x80) >> 7)
-#define SET_C_CMP(a,b) (flagC = ((uint8)(b) < (uint8)(a) ? 1 : 0))
+#define SET_C_CMP(a,b) (flagC = ((uint8_t)(b) < (uint8_t)(a) ? 1 : 0))
#define SET_ZN(r) SET_N(r); SET_Z(r)
#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
#define SET_ZNVC_CMP(a,b,r) SET_N(r); SET_Z(r); SET_C_CMP(a,b); SET_V(a,b,r)
#define SET_N16(r) (flagN = ((r) & 0x8000) >> 15)
#define SET_V16(a,b,r) (flagV = (((b) ^ (a) ^ (r) ^ ((r) >> 1)) & 0x8000) >> 15)
-#define SET_C_CMP16(a,b) (flagC = ((uint16)(b) < (uint16)(a) ? 1 : 0))
+#define SET_C_CMP16(a,b) (flagC = ((uint16_t)(b) < (uint16_t)(a) ? 1 : 0))
#define SET_ZNVC_CMP16(a,b,r) SET_N16(r); SET_Z(r); SET_C_CMP16(a,b); SET_V16(a,b,r)
//Small problem with the EA_ macros: ABS macros don't increment the PC!!! !!! FIX !!! [DONE, kinda]
#define READ_ZP_X16 RdMemW(EA_ZP_X)
#define READ_ABS16 RdMemW(EA_ABS); regs.pc += 2
-#define READ_IMM_WB(v) uint16 addr = EA_IMM; v = regs.RdMem(addr)
-#define READ_ZP_WB(v) uint16 addr = EA_ZP; v = regs.RdMem(addr)
-#define READ_ZP_X_WB(v) uint16 addr = EA_ZP_X; v = regs.RdMem(addr)
-#define READ_ABS_WB(v) uint16 addr = EA_ABS; v = regs.RdMem(addr); regs.pc += 2
+#define READ_IMM_WB(v) uint16_t addr = EA_IMM; v = regs.RdMem(addr)
+#define READ_ZP_WB(v) uint16_t addr = EA_ZP; v = regs.RdMem(addr)
+#define READ_ZP_X_WB(v) uint16_t addr = EA_ZP_X; v = regs.RdMem(addr)
+#define READ_ABS_WB(v) uint16_t addr = EA_ABS; v = regs.RdMem(addr); regs.pc += 2
#define WRITE_BACK(d) regs.WrMem(addr, (d))
// Private global variables
static V6808REGS regs;
-static uint8 flagH, flagI, flagN, flagZ, flagV, flagC;
+static uint8_t flagH, flagI, flagN, flagZ, flagV, flagC;
-static uint8 CPUCycles[256] = {
+static uint8_t CPUCycles[256] = {
1, 2, 1, 1, 1, 1, 2, 2, 4, 4, 2, 2, 2, 2, 2, 2,
2, 2, 1, 1, 1, 1, 2, 2, 1, 2, 1, 2, 1, 1, 1, 1,
4, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
// Private function prototypes
-static uint16 RdMemW(uint16);
+static uint16_t RdMemW(uint16_t);
//
// Read a word out of 6808 memory (little endian format)
//
-static inline uint16 RdMemW(uint16 address)
+static inline uint16_t RdMemW(uint16_t address)
{
- return (uint16)(regs.RdMem(address) << 8) | regs.RdMem(address + 1);
+ return (uint16_t)(regs.RdMem(address) << 8) | regs.RdMem(address + 1);
}
//
// ADD opcodes
#define OP_ADD_HANDLER(m, acc) \
- uint16 sum = (uint16)(acc) + (m); \
+ uint16_t sum = (uint16_t)(acc) + (m); \
flagC = sum >> 8; \
flagH = (sum >> 4) & 0x01; \
SET_V(m, acc, sum); \
static void Op8B(void) // ADDA #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_ADD_HANDLER(m, regs.a);
}
static void Op9B(void) // ADDA ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_ADD_HANDLER(m, regs.a);
}
static void OpAB(void) // ADDA ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_ADD_HANDLER(m, regs.a);
}
static void OpBB(void) // ADDA ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_ADD_HANDLER(m, regs.a);
}
static void OpCB(void) // ADDB #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_ADD_HANDLER(m, regs.b);
}
static void OpDB(void) // ADDB ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_ADD_HANDLER(m, regs.b);
}
static void OpEB(void) // ADDB ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_ADD_HANDLER(m, regs.b);
}
static void OpFB(void) // ADDB ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_ADD_HANDLER(m, regs.b);
}
// ADC opcodes
#define OP_ADC_HANDLER(m, acc) \
- uint16 sum = (uint16)acc + (m) + (uint16)flagC; \
+ uint16_t sum = (uint16_t)acc + (m) + (uint16_t)flagC; \
flagC = sum >> 8; \
flagH = (sum >> 4) & 0x01; \
SET_V(m, acc, sum); \
static void Op89(void) // ADCA #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_ADC_HANDLER(m, regs.a);
}
static void Op99(void) // ADCA ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_ADC_HANDLER(m, regs.a);
}
static void OpA9(void) // ADCA ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_ADC_HANDLER(m, regs.a);
}
static void OpB9(void) // ADCA ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_ADC_HANDLER(m, regs.a);
}
static void OpC9(void) // ADCB #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_ADC_HANDLER(m, regs.b);
}
static void OpD9(void) // ADCB ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_ADC_HANDLER(m, regs.b);
}
static void OpE9(void) // ADCB ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_ADC_HANDLER(m, regs.b);
}
static void OpF9(void) // ADCB ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_ADC_HANDLER(m, regs.b);
}
static void Op84(void) // ANDA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_AND_HANDLER(m, regs.a);
}
static void Op94(void) // ANDA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_AND_HANDLER(m, regs.a);
}
static void OpA4(void) // ANDA ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_AND_HANDLER(m, regs.a);
}
static void OpB4(void) // ANDA ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_AND_HANDLER(m, regs.a);
}
static void OpC4(void) // ANDB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_AND_HANDLER(m, regs.b);
}
static void OpD4(void) // ANDB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_AND_HANDLER(m, regs.b);
}
static void OpE4(void) // ANDB ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_AND_HANDLER(m, regs.b);
}
static void OpF4(void) // ANDB ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_AND_HANDLER(m, regs.b);
}
// BIT opcodes
#define OP_BIT_HANDLER(m, acc) \
- int8 result = acc & (m); \
+ int8_t result = acc & (m); \
SET_ZN(result)
static void Op85(void) // BITA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_BIT_HANDLER(m, regs.a);
}
static void Op95(void) // BITA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_BIT_HANDLER(m, regs.a);
}
static void OpA5(void) // BITA ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_BIT_HANDLER(m, regs.a);
}
static void OpB5(void) // BITA ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_BIT_HANDLER(m, regs.a);
}
static void OpC5(void) // BITB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_BIT_HANDLER(m, regs.b);
}
static void OpD5(void) // BITB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_BIT_HANDLER(m, regs.b);
}
static void OpE5(void) // BITB ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_BIT_HANDLER(m, regs.b);
}
static void OpF5(void) // BITB ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_BIT_HANDLER(m, regs.b);
}
*/
#define OP_CMP_HANDLER(m, acc) \
- uint16 result = acc - (m); \
+ uint16_t result = acc - (m); \
SET_ZNVC_CMP(m, acc, result)
static void Op81(void) // CMPA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_CMP_HANDLER(m, regs.a);
}
static void Op91(void) // CMPA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_CMP_HANDLER(m, regs.a);
}
static void OpA1(void) // CMPA ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_CMP_HANDLER(m, regs.a);
}
static void OpB1(void) // CMPA ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_CMP_HANDLER(m, regs.a);
}
static void OpC1(void) // CMPB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_CMP_HANDLER(m, regs.b);
}
static void OpD1(void) // CMPB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_CMP_HANDLER(m, regs.b);
}
static void OpE1(void) // CMPB ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_CMP_HANDLER(m, regs.b);
}
static void OpF1(void) // CMPB ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_CMP_HANDLER(m, regs.b);
}
static void Op63(void) // COM ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_COM_HANDLER(m);
WRITE_BACK(m);
static void Op73(void) // COM ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_COM_HANDLER(m);
WRITE_BACK(m);
static void Op60(void) // NEG ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_NEG_HANDLER(m);
WRITE_BACK(m);
static void Op70(void) // NEG ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_NEG_HANDLER(m);
WRITE_BACK(m);
static void Op19(void) // DAA
{
- uint16 result = (uint16)regs.a;
+ uint16_t result = (uint16_t)regs.a;
if ((regs.a & 0x0F) > 0x09 || flagH)
result += 0x06;
if ((regs.a & 0xF0) > 0x90 || flagC || ((regs.a & 0xF0) > 0x80 && (regs.a & 0x0F) > 0x09))
result += 0x60;
- regs.a = (uint8)result;
+ regs.a = (uint8_t)result;
SET_ZN(result);
CLR_V; // Not sure this is correct...
flagC |= (result & 0x100) >> 8; // Overwrite carry if it was 0, otherwise, ignore
static void Op6A(void) // DEC ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_DEC_HANDLER(m);
WRITE_BACK(m);
static void Op7A(void) // DEC ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_DEC_HANDLER(m);
WRITE_BACK(m);
static void Op88(void) // EORA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_EOR_HANDLER(m, regs.a);
}
static void Op98(void) // EORA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_EOR_HANDLER(m, regs.a);
}
static void OpA8(void) // EORA ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_EOR_HANDLER(m, regs.a);
}
static void OpB8(void) // EORA ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_EOR_HANDLER(m, regs.a);
}
static void OpC8(void) // EORB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_EOR_HANDLER(m, regs.b);
}
static void OpD8(void) // EORB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_EOR_HANDLER(m, regs.b);
}
static void OpE8(void) // EORB ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_EOR_HANDLER(m, regs.b);
}
static void OpF8(void) // EORB ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_EOR_HANDLER(m, regs.b);
}
static void Op6C(void) // INC ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_INC_HANDLER(m);
WRITE_BACK(m);
static void Op7C(void) // INC ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_INC_HANDLER(m);
WRITE_BACK(m);
static void Op86(void) // LDAA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_LDA_HANDLER(m, regs.a);
}
static void Op96(void) // LDAA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_LDA_HANDLER(m, regs.a);
}
static void OpA6(void) // LDAA ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_LDA_HANDLER(m, regs.a);
}
static void OpB6(void) // LDAA ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_LDA_HANDLER(m, regs.a);
}
static void OpC6(void) // LDAB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_LDA_HANDLER(m, regs.b);
}
static void OpD6(void) // LDAB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_LDA_HANDLER(m, regs.b);
}
static void OpE6(void) // LDAB ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_LDA_HANDLER(m, regs.b);
}
static void OpF6(void) // LDAB ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_LDA_HANDLER(m, regs.b);
}
static void Op8A(void) // ORAA #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_ORA_HANDLER(m, regs.a);
}
static void Op9A(void) // ORAA ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_ORA_HANDLER(m, regs.a);
}
static void OpAA(void) // ORAA ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_ORA_HANDLER(m, regs.a);
}
static void OpBA(void) // ORAA ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_ORA_HANDLER(m, regs.a);
}
static void OpCA(void) // ORAB #
{
- uint8 m = READ_IMM;
+ uint8_t m = READ_IMM;
OP_ORA_HANDLER(m, regs.b);
}
static void OpDA(void) // ORAB ZP
{
- uint8 m = READ_ZP;
+ uint8_t m = READ_ZP;
OP_ORA_HANDLER(m, regs.b);
}
static void OpEA(void) // ORAB ZP, X
{
- uint8 m = READ_ZP_X;
+ uint8_t m = READ_ZP_X;
OP_ORA_HANDLER(m, regs.b);
}
static void OpFA(void) // ORAB ABS
{
- uint8 m = READ_ABS;
+ uint8_t m = READ_ABS;
OP_ORA_HANDLER(m, regs.b);
}
// ROL opcodes
#define OP_ROL_HANDLER(m) \
- uint8 newCarry = (m & 0x80) >> 7; \
+ uint8_t newCarry = (m & 0x80) >> 7; \
m = (m << 1) | flagC; \
SET_ZN(m); \
flagC = newCarry; \
static void Op69(void) // ROL ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_ROL_HANDLER(m);
WRITE_BACK(m);
static void Op79(void) // ROL ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_ROL_HANDLER(m);
WRITE_BACK(m);
// ROR opcodes
#define OP_ROR_HANDLER(m) \
- uint8 newCarry = m & 0x01; \
+ uint8_t newCarry = m & 0x01; \
m = (m >> 1) | (flagC << 7); \
SET_ZN(m); \
flagC = newCarry; \
static void Op66(void) // ROR ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_ROR_HANDLER(m);
WRITE_BACK(m);
static void Op76(void) // ROR ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_ROR_HANDLER(m);
WRITE_BACK(m);
// ASL opcodes
#define OP_ASL_HANDLER(m) \
- uint8 newCarry = (m & 0x80) >> 7; \
+ uint8_t newCarry = (m & 0x80) >> 7; \
m <<= 1; \
SET_ZN(m); \
flagC = newCarry; \
static void Op68(void) // ASL ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_ASL_HANDLER(m);
WRITE_BACK(m);
static void Op78(void) // ASL ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_ASL_HANDLER(m);
WRITE_BACK(m);
// ASR opcodes
#define OP_ASR_HANDLER(m) \
- uint8 newCarry = m & 0x01; \
+ uint8_t newCarry = m & 0x01; \
m = (m >> 1) | (m & 0x80); \
SET_ZN(m); \
flagC = newCarry; \
static void Op67(void) // ASR ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_ASR_HANDLER(m);
WRITE_BACK(m);
static void Op77(void) // ASR ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_ASR_HANDLER(m);
WRITE_BACK(m);
// LSR opcodes
#define OP_LSR_HANDLER(m) \
- uint8 newCarry = m & 0x01; \
+ uint8_t newCarry = m & 0x01; \
m >>= 1; \
SET_ZN(m); \
flagC = newCarry; \
static void Op64(void) // LSR ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_LSR_HANDLER(m);
WRITE_BACK(m);
static void Op74(void) // LSR ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_LSR_HANDLER(m);
WRITE_BACK(m);
// SUB opcodes
#define OP_SUB_HANDLER(m, acc) \
- uint16 sum = (uint16)acc - (m); \
+ uint16_t sum = (uint16_t)acc - (m); \
flagC = sum >> 15; \
SET_V(m, acc, sum); \
- acc = (uint8)sum; \
+ acc = (uint8_t)sum; \
SET_ZN(acc)
static void Op80(void) // SUBA #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_SUB_HANDLER(m, regs.a);
}
static void Op90(void) // SUBA ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_SUB_HANDLER(m, regs.a);
}
static void OpA0(void) // SUBA ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_SUB_HANDLER(m, regs.a);
}
static void OpB0(void) // SUBA ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_SUB_HANDLER(m, regs.a);
}
static void OpC0(void) // SUBB #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_SUB_HANDLER(m, regs.b);
}
static void OpD0(void) // SUBB ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_SUB_HANDLER(m, regs.b);
}
static void OpE0(void) // SUBB ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_SUB_HANDLER(m, regs.b);
}
static void OpF0(void) // SUBB ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_SUB_HANDLER(m, regs.b);
}
// SBC opcodes
#define OP_SBC_HANDLER(m, acc) \
- uint16 sum = (uint16)acc - (m) - (uint16)flagC; \
+ uint16_t sum = (uint16_t)acc - (m) - (uint16_t)flagC; \
flagC = sum >> 15; \
SET_V(m, acc, sum); \
- acc = (uint8)sum; \
+ acc = (uint8_t)sum; \
SET_ZN(acc)
static void Op82(void) // SBCA #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_SBC_HANDLER(m, regs.a);
}
static void Op92(void) // SBCA ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_SBC_HANDLER(m, regs.a);
}
static void OpA2(void) // SBCA ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_SBC_HANDLER(m, regs.a);
}
static void OpB2(void) // SBCA ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_SBC_HANDLER(m, regs.a);
}
static void OpC2(void) // SBCB #
{
- uint16 m = READ_IMM;
+ uint16_t m = READ_IMM;
OP_SBC_HANDLER(m, regs.b);
}
static void OpD2(void) // SBCB ZP
{
- uint16 m = READ_ZP;
+ uint16_t m = READ_ZP;
OP_SBC_HANDLER(m, regs.b);
}
static void OpE2(void) // SBCB ZP, X
{
- uint16 m = READ_ZP_X;
+ uint16_t m = READ_ZP_X;
OP_SBC_HANDLER(m, regs.b);
}
static void OpF2(void) // SBCB ABS
{
- uint16 m = READ_ABS;
+ uint16_t m = READ_ABS;
OP_SBC_HANDLER(m, regs.b);
}
static void Op6D(void) // TST ZP, X
{
- uint8 m;
+ uint8_t m;
READ_ZP_X_WB(m);
OP_TST_HANDLER(m);
WRITE_BACK(m);
static void Op7D(void) // TST ABS
{
- uint8 m;
+ uint8_t m;
READ_ABS_WB(m);
OP_TST_HANDLER(m);
WRITE_BACK(m);
*/
#define OP_CPX_HANDLER(m) \
- uint32 result = regs.x - (m); \
+ uint32_t result = regs.x - (m); \
SET_ZNVC_CMP16(m, regs.x, result)
static void Op8C(void) // CPX #
{
- uint16 m = READ_IMM16;
+ uint16_t m = READ_IMM16;
OP_CPX_HANDLER(m);
}
static void Op9C(void) // CPX ZP
{
- uint16 m = READ_ZP16;
+ uint16_t m = READ_ZP16;
OP_CPX_HANDLER(m);
}
static void OpAC(void) // CPX ZP, X
{
- uint16 m = READ_ZP_X16;
+ uint16_t m = READ_ZP_X16;
OP_CPX_HANDLER(m);
}
static void OpBC(void) // CPX ABS
{
- uint16 m = READ_ABS16;
+ uint16_t m = READ_ABS16;
OP_CPX_HANDLER(m);
}
static void OpDF(void) // STX ZP
{
- uint16 m = EA_ZP;
+ uint16_t m = EA_ZP;
OP_ST_HANDLER(m, regs.x);
}
static void OpEF(void) // STX ZP, X
{
- uint16 m = EA_ZP_X;
+ uint16_t m = EA_ZP_X;
OP_ST_HANDLER(m, regs.x);
}
static void OpFF(void) // STX ABS
{
- uint16 m = EA_ABS;
+ uint16_t m = EA_ABS;
regs.pc += 2;
OP_ST_HANDLER(m, regs.x);
}
static void Op9F(void) // STS ZP
{
- uint16 m = EA_ZP;
+ uint16_t m = EA_ZP;
OP_ST_HANDLER(m, regs.s);
}
static void OpAF(void) // STS ZP, X
{
- uint16 m = EA_ZP_X;
+ uint16_t m = EA_ZP_X;
OP_ST_HANDLER(m, regs.s);
}
static void OpBF(void) // STS ABS
{
- uint16 m = EA_ABS;
+ uint16_t m = EA_ABS;
regs.pc += 2;
OP_ST_HANDLER(m, regs.s);
}
static void Op20(void) // BRA
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
regs.pc += m;
}
// NOTE: We can optimize this by following the maxim: "Don't branch!" by converting the boolean
// result into a multiplication. The only way to know if this is a win is to do some profiling
// both with and without the optimization.
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
//Note sure if the ! operator will do what we want, so we use ^ 1
static void Op25(void) // BCS
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagC);
static void Op27(void) // BEQ
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagZ);
static void Op2C(void) // BGE
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * ((flagN ^ flagV) ^ 0x01);
static void Op2E(void) // BGT
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * ((flagZ | (flagN ^ flagV)) ^ 0x01);
static void Op22(void) // BHI
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * ((flagZ | flagC) ^ 0x01);
static void Op2F(void) // BLE
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagZ | (flagN ^ flagV));
static void Op23(void) // BLS
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagZ | flagC);
static void Op2D(void) // BLT
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagN ^ flagV);
static void Op2B(void) // BMI
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagN);
static void Op26(void) // BNE
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagZ ^ 0x01);
static void Op28(void) // BVC
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagV ^ 0x01);
static void Op29(void) // BVS
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagV);
static void Op2A(void) // BPL
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
#ifdef TEST_DONT_BRANCH_OPTIMIZATION
regs.pc += m * (flagN ^ 0x01);
static void Op8D(void) // BSR
{
- int16 m = (int16)(int8)READ_IMM;
+ int16_t m = (int16_t)(int8_t)READ_IMM;
PUSH16(regs.pc);
regs.pc += m;
}
static void OpAD(void) // JSR ZP, X
{
- uint16 m = EA_ZP_X;
+ uint16_t m = EA_ZP_X;
PUSH16(regs.pc);
regs.pc = m;
}
static void OpBD(void) // JSR ABS
{
- uint16 m = EA_ABS;
+ uint16_t m = EA_ABS;
regs.pc += 2;
PUSH16(regs.pc);
regs.pc = m;
//
// Internal "memcpy" (so we don't have to link with any external libraries!)
//
-static void myMemcpy(void * dst, void * src, uint32 size)
+static void myMemcpy(void * dst, void * src, uint32_t size)
{
- uint8 * d = (uint8 *)dst, * s = (uint8 *)src;
+ uint8_t * d = (uint8_t *)dst, * s = (uint8_t *)src;
- for(uint32 i=0; i<size; i++)
+ for(uint32_t i=0; i<size; i++)
d[i] = s[i];
}
//
// Function to execute 6808 for "cycles" cycles
//
-void Execute6808(V6808REGS * context, uint32 cycles)
+void Execute6808(V6808REGS * context, uint32_t cycles)
{
#warning "V6808_STATE_WAI is not properly handled yet! !!! FIX !!!"
#warning "Need to convert from destructive clock to non-destructive. !!! FIX !!!"
myMemcpy(®s, context, sizeof(V6808REGS));
- UNPACK_FLAGS; // Explode flags register into individual uint8s
+ UNPACK_FLAGS; // Explode flags register into individual uint8_ts
// Execute here...
while (regs.clock < cycles)
if (logGo)
Decode6808(regs.pc);
#endif
- uint8 opcode = regs.RdMem(regs.pc++);
+ uint8_t opcode = regs.RdMem(regs.pc++);
#ifdef __DEBUG__
//if (!(regs.cpuFlags & V6808_STATE_ILLEGAL_INST))
//
// Get the clock of the currently executing CPU
//
-uint64 GetCurrentV6808Clock(void)
+uint64_t GetCurrentV6808Clock(void)
{
return regs.clock;
}