//
// Originally by David Raingeard (cal2)
// GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
-// Cleanups and endian wrongness amelioration by James L. Hammons
+// Cleanups and endian wrongness amelioration by James Hammons
// (C) 2010 Underground Software
//
-// JLH = James L. Hammons <jlhamm@acm.org>
+// JLH = James Hammons <jlhamm@acm.org>
//
// Who When What
// --- ---------- -------------------------------------------------------------
#include "gpu.h"
#include "jaguar.h"
#include "log.h"
-#include "m68k.h"
+#include "m68000/m68kinterface.h"
//#include "memory.h"
#include "op.h"
#include "settings.h"
// Also note that VC is in *half* lines, i.e. divide by 2 to get the scanline
/*#define LEFT_VISIBLE_HC 208
#define RIGHT_VISIBLE_HC 1528//*/
-#define LEFT_VISIBLE_HC 208
-#define RIGHT_VISIBLE_HC 1488
+// These were right for Rayman, but that one is offset on a real TV too.
+//#define LEFT_VISIBLE_HC 208
+//#define RIGHT_VISIBLE_HC 1488
+// This is more like a real TV display...
+//#define LEFT_VISIBLE_HC (208 - 32)
+//#define RIGHT_VISIBLE_HC (1488 - 32)
+// Split the difference? (Seems to be OK for the most part...)
+
+// (-10 +10)*4 is for opening up the display by 16 pixels (may go to 20). Need to change VIRTUAL_SCREEN_WIDTH to match this as well (went from 320 to 340; this is 4 HCs per one of those pixels).
+#define LEFT_VISIBLE_HC (208 - 16 - (8 * 4))
+//#define RIGHT_VISIBLE_HC (1488 - 16 + (10 * 4))
+#define RIGHT_VISIBLE_HC (LEFT_VISIBLE_HC + (VIRTUAL_SCREEN_WIDTH * 4))
//#define TOP_VISIBLE_VC 25
//#define BOTTOM_VISIBLE_VC 503
#define TOP_VISIBLE_VC 31
//Are these PAL horizontals correct?
//They seem to be for the most part, but there are some games that seem to be
//shifted over to the right from this "window".
-#define LEFT_VISIBLE_HC_PAL 208
-#define RIGHT_VISIBLE_HC_PAL 1488
+#define LEFT_VISIBLE_HC_PAL (208 - 16 - (4 * 4))
+//#define RIGHT_VISIBLE_HC_PAL (1488 - 16 + (10 * 4))
+#define RIGHT_VISIBLE_HC_PAL (LEFT_VISIBLE_HC_PAL + (VIRTUAL_SCREEN_WIDTH * 4))
#define TOP_VISIBLE_VC_PAL 67
#define BOTTOM_VISIBLE_VC_PAL 579
WriteLog("TOM: Reading word at %06X for %s\n", offset, whoName[who]);
#endif
if (offset >= 0xF02000 && offset <= 0xF020FF)
- WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
+ WriteLog("TOM: ReadWord attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
if (offset == 0xF000E0)
{
//if (offset == 0xF00000 + MEMCON2)
// WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
if (offset >= 0xF02000 && offset <= 0xF020FF)
- WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
+ WriteLog("TOM: WriteWord attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
{