// WHO WHEN WHAT
// --- ---------- ------------------------------------------------------------
// JLH 07/23/2009 Added changelog ;-)
+// JLH 08/12/2009 Stabilized emulation so that it works
//
-#define THUNDER_VERSION "0.9.9"
+#define THUNDER_VERSION "0.9.9"
#include <iostream>
#include <iomanip>
//#include <conio.h> // For getch()
#include <curses.h> // For getch()
#include <time.h>
-#include "SDL.h" // Get yer SDL out...!
+#include "SDL.h" // Get yer SDL out...!
#include "types.h"
#include "v6809.h"
#include "screen.h"
#include "gui.h"
#include "log.h"
-using namespace std; // Yes!
+using namespace std; // Yes!
#if 0
#define ROM1 "RT3-1B.ROM"
V6809REGS cpu1, cpu2;
-bool trace1 = false; // ditto...
-bool looking_at_rom = true; // true = R1, false = R2
-uint32 banksw1, banksw2; // Bank switch addresses
-uint16 game_over_switch; // Game over delay
-uint16 dpc; // Debug pc reg...
-bool show_scr = true; // Whether or not to show background
-bool enable_cpu = true; // Whether or not to enable CPUs
-bool irqGoA = true; // IRQ switch for CPU #1
-bool irqGoB = true; // IRQ switch for CPU #2
-
-uint16 refresh_ = 0; // Crappy global screen stuff...
+bool trace1 = false; // ditto...
+bool looking_at_rom = true; // true = R1, false = R2
+uint32 banksw1, banksw2; // Bank switch addresses
+uint16 game_over_switch; // Game over delay
+uint16 dpc; // Debug pc reg...
+bool show_scr = true; // Whether or not to show background
+bool enable_cpu = true; // Whether or not to enable CPUs
+bool irqGoA = true; // IRQ switch for CPU #1
+bool irqGoB = true; // IRQ switch for CPU #2
+
+uint16 refresh_ = 0; // Crappy global screen stuff...
bool refresh2 = true;
uint32 psg_lens[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
uint8 * fm_adrs[14];
fstream tr; // Tracelog hook
-uint16 pcx; // Where we at?
+uint16 pcx; // Where we at?
static uint8 * keys; // SDL raw keyboard matrix
//
void WrMem(uint16 addr, uint8 b)
{
+ extern bool disasm;
extern bool charbase; // Needed for screen. Extern it in it??
//extern uint16 sr, ur, xr, yr; // Needed for tracelog
//extern uint16 pcr;
//}
tr << endl;
}//*/
-#if 1
+#if 0
if (addr == 0x4182)
{
WriteLog("\nWriteMem: CPU #1 writing $%02X to $4182!\n\n", b);
BlitChar(screen, chr_rom, gram1);
refresh_ = (refresh2 ? 1 : 0); // 60/30 Hz...
}
-//Seems they're more regular than this...
-// irqGoA = true; // Will this work??? no...
-// cpu1.cpuFlags |= V6809_ASSERT_LINE_IRQ;//wil wok???
+
// IRQ Ack (may also be frame go...
-// cpu1.cpuFlags &= ~V6809_ASSERT_LINE_IRQ;
ClearLineOfCurrentV6809(V6809_ASSERT_LINE_IRQ);
+#if 1
+ if (disasm)
+ WriteLog("WriteMem: CPU #1 Acknowledging IRQ...\n", b);
+#endif
}
}
//
void WrMemB(uint16 addr, uint8 b)
{
+ extern bool disasm;
extern bool charbase;
//extern uint16 sr, ur, xr, yr; // Needed for tracelog
//extern uint16 pcr;
//}
tr << endl;
}//*/
-#if 1
+#if 0
if (addr == 0x0182)
{
WriteLog("\nWriteMem: CPU #2 writing $%02X to $0182 ($4182)!\n\n", b);
}
#endif
-// Bah. Dunno if this is accurate or not!
-// if (addr == 0x8800)
-// irqGoB = true; // Will it work??? no...
-// cpu2.cpuFlags |= V6809_ASSERT_LINE_IRQ;//wil wok???
if (addr == 0x6000)
SpawnSound(GAMESOUND, gram1[0x6200], 0); // Do voice chan 1
if (addr == 0x6400)
if (addr == 0x8800)
{
// IRQ Ack (may also be frame go...)
-// cpu2.cpuFlags &= ~V6809_ASSERT_LINE_IRQ;
ClearLineOfCurrentV6809(V6809_ASSERT_LINE_IRQ);
+#if 1
+ if (disasm)
+ WriteLog("WriteMem: CPU #2 Acknowledging IRQ...\n", b);
+#endif
}
}
if (fp)
{
len = GetWAVLength(fp); // Get WAV data length...
-
psg_adrs[i] = new uint8[len]; // Attempt to allocate space...
if (psg_adrs[i] != NULL)
if (fp)
{
len = GetWAVLength(fp); // Get WAV length...
-
fm_adrs[i] = new uint8[len]; // Attempt to allocate space...
if (fm_adrs[i] != NULL)
WriteLog("About to set up screen...\n");
// if (!SetVESA2()) running = false; // Set up screen
// Set up screen (windowed)
- screen = SDL_SetVideoMode(640, 480, 8, SDL_SWSURFACE); //video_bpp, videoflags);
+// screen = SDL_SetVideoMode(640, 480, 8, SDL_SWSURFACE); //video_bpp, videoflags);
+ screen = SDL_SetVideoMode(VIRTUAL_SCREEN_WIDTH * 2, VIRTUAL_SCREEN_HEIGHT * 2, 8, SDL_SWSURFACE | SDL_DOUBLEBUF);
if (screen == NULL)
{
cout << "Failed to initialize screen!" << endl;
}
if (keys[SDLK_d]) // (D) start disassembly
disasm = true;
-#if 1
+#if 0
if (keys[SDLK_k])
gram1[0x5606] = 0x00;
if (keys[SDLK_l])
#endif
-// if (enable_cpu)
- if (true)
+ if (enable_cpu)
+// if (true)
{
-#if 0
-// if (irqGoA)
- cpu1.cpuFlags |= V6809_ASSERT_LINE_IRQ;
-
- Execute6809(&cpu1, 25000);
- cpu1.clock -= 25000; // Remove 25K ticks from clock (in case it overflowed)
-
-// if (irqGoB)
- cpu2.cpuFlags |= V6809_ASSERT_LINE_IRQ;
-
- Execute6809(&cpu2, 25000);
- cpu2.clock -= 25000; // Remove 25K ticks from clock (in case it overflowed)//*/
-#else
// We can do this here because we're not executing the cores yet.
cpu1.cpuFlags |= V6809_ASSERT_LINE_IRQ;
cpu2.cpuFlags |= V6809_ASSERT_LINE_IRQ;
// 1.538 MHz = 25633.333... cycles per frame (1/60 s)
// 25600 cycles/frame
// Setting interleave to 25 and below causes the V6809 core to hang...
+// 32 gets to the title screen before hanging...
// 40 works, until it doesn't... :-P
+// 640 * 40
+// 800 * 32
+// Interesting, putting IRQs at 30 Hz makes it run at the correct speed. Still hangs in the demo, though.
for(uint32 i=0; i<640; i++)
+// for(uint32 i=0; i<1280; i++)
{
// Gay, but what are ya gonna do?
// There's better ways, such as keeping track of when slave writes to master, etc...
Execute6809(&cpu1, 40);
Execute6809(&cpu2, 40);
}
-#endif
} // END: enable_cpu
// if (refresh_++ == 1) // 30 Hz...
// refresh_ = (refresh2 ? 1 : 0); // 60/30 Hz...
// }
+#if 0
//temp, for testing...
BlitChar(screen, chr_rom, gram1);
-
+#endif
// Speed throttling happens here...
while (SDL_GetTicks() - oldTicks < 16) // Actually, it's 16.66... Need to account for that somehow
+// while (SDL_GetTicks() - oldTicks < 32) // Actually, it's 16.66... Need to account for that somehow
SDL_Delay(1); // Release our timeslice...
oldTicks = SDL_GetTicks();
}
#if 0
+Hitachi uC runs at 6.144 MHz
+YM2151 runs at 3.579580 MHz
+
+
Rolling Thunder Memory map
--------------------------
Most of the decoding is done by custom chips (CUS47 and CUS41), so the memory