#include "jaguar.h"
#include "video.h"
+#include "settings.h"
//#include "m68kdasmAG.h"
#define CPU_DEBUG
// External variables
-extern bool hardwareTypeNTSC; // Set to false for PAL
+//extern bool hardwareTypeNTSC; // Set to false for PAL
#ifdef CPU_DEBUG_MEMORY
extern bool startMemLog; // Set by "e" key
extern int effect_start;
char * whoName[9] =
{ "Unknown", "Jaguar", "DSP", "GPU", "TOM", "JERRY", "M68K", "Blitter", "OP" };
-// These values are overridden by command line switches...
-
-extern bool dsp_enabled;
-extern bool jaguar_use_bios; // Default is now to USE the BIOS
uint32 jaguar_active_memory_dumps = 0;
uint32 jaguar_mainRom_crc32;
/*static*/ uint8 * jaguar_mainRam = NULL;
/*static*/ uint8 * jaguar_bootRom = NULL;
/*static*/ uint8 * jaguar_mainRom = NULL;
+
#ifdef CPU_DEBUG_MEMORY
uint8 writeMemMax[0x400000], writeMemMin[0x400000];
uint8 readMem[0x400000];
uint32 returnAddr[4000], raPtr = 0xFFFFFFFF;
#endif
+uint32 pcQueue[0x400];
+uint32 pcQPtr = 0;
+
//
// Callback function to detect illegal instructions
//
void M68KInstructionHook(void)
{
uint32 m68kPC = m68k_get_reg(NULL, M68K_REG_PC);
+
+// For tracebacks...
+// Ideally, we'd save all the registers as well...
+ pcQueue[pcQPtr++] = m68kPC;
+ pcQPtr &= 0x3FF;
+
+ if (m68kPC & 0x01) // Oops! We're fetching an odd address!
+ {
+ WriteLog("M68K: Attempted to execute from an odd adress!\n\nBacktrace:\n\n");
+
+ static char buffer[2048];
+ for(int i=0; i<0x400; i++)
+ {
+ m68k_disassemble(buffer, pcQueue[(pcQPtr + i) & 0x3FF], M68K_CPU_TYPE_68000);
+ WriteLog("\t%08X: %s\n", pcQueue[(pcQPtr + i) & 0x3FF], buffer);
+ }
+ WriteLog("\n");
+
+ uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=0; i<10; i++)
+ WriteLog("%06X: %08X\n", topOfStack - (i * 4), JaguarReadLong(topOfStack - (i * 4)));
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((tom_irq_enabled(IRQ_VBLANK)) && (jaguar_interrupt_handler_is_valid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+ log_done();
+ exit(0);
+ }
+
/* if (m68kPC >= 0x807EC4 && m68kPC <= 0x807EDB)
{
static char buffer[2048];
void JaguarWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
{
//TEMP--Mirror of F03000? Yes, but only 32-bit CPUs can do it (i.e., NOT the 68K!)
-// PLUS, you would handle this in the GPU/DSP WroteLong code! Not here!
+// PLUS, you would handle this in the GPU/DSP WriteLong code! Not here!
offset &= 0xFFFFFF;
if (offset <= 0x3FFFFE)
{
-if (offset == 0x670C)
- WriteLog("Jaguar: %s writing to location $670C...\n", whoName[who]);
+//This MUST be done by the 68K!
+/*if (offset == 0x670C)
+ WriteLog("Jaguar: %s writing to location $670C...\n", whoName[who]);*/
jaguar_mainRam[(offset+0) & 0x3FFFFF] = (data>>8) & 0xFF;
jaguar_mainRam[(offset+1) & 0x3FFFFF] = data & 0xFF;
// We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
void JaguarWriteLong(uint32 offset, uint32 data, uint32 who/*=UNKNOWN*/)
{
+/* extern bool doDSPDis;
+ if (offset < 0x400 && !doDSPDis)
+ {
+ WriteLog("JLW: Write to %08X by %s... Starting DSP log!\n\n", offset, whoName[who]);
+ doDSPDis = true;
+ }//*/
+
JaguarWriteWord(offset, data >> 16, who);
JaguarWriteWord(offset+2, data & 0xFFFF, who);
}
memset(jaguar_mainRam, 0x00, 0x400000);
// memset(jaguar_mainRom, 0xFF, 0x200000); // & set it to all Fs...
// memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s...
+//NOTE: This *doesn't* fix FlipOut...
memset(jaguar_mainRom, 0x01, 0x600000); // & set it to all 01s...
// cd_bios_boot("C:\\ftp\\jaguar\\cd\\Brain Dead 13.cdi");
void jaguar_reset(void)
{
- if (jaguar_use_bios)
+ if (vjs.useJaguarBIOS)
memcpy(jaguar_mainRam, jaguar_bootRom, 8);
else
{
{
uint16 vp = TOMReadWord(0xF0003E) + 1;//Hmm. This is a WO register. Will work? Looks like. But wrong behavior!
uint16 vi = TOMReadWord(0xF0004E);//Another WO register...
- uint16 vdb = TOMReadWord(0xF00046);
+// uint16 vdb = TOMReadWord(0xF00046);
//Note: This is the *definite* end of the display, though VDE *might* be less than this...
// uint16 vbb = TOMReadWord(0xF00040);
//It seems that they mean it when they say that VDE is the end of object processing.
//However, we need to be able to tell the OP (or TOM) that we've reached the end of the
//buffer and not to write any more pixels... !!! FIX !!!
- uint16 vde = TOMReadWord(0xF00048);
+// uint16 vde = TOMReadWord(0xF00048);
- uint16 refreshRate = (hardwareTypeNTSC ? 60 : 50);
+ uint16 refreshRate = (vjs.hardwareTypeNTSC ? 60 : 50);
// Should these be hardwired or read from VP? Yes, from VP!
uint32 M68KCyclesPerScanline
- = (hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL) / (vp * refreshRate);
+ = (vjs.hardwareTypeNTSC ? M68K_CLOCK_RATE_NTSC : M68K_CLOCK_RATE_PAL) / (vp * refreshRate);
uint32 RISCCyclesPerScanline
- = (hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL) / (vp * refreshRate);
+ = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL) / (vp * refreshRate);
+ TOMResetBackbuffer(backbuffer);
/*extern int effect_start;
if (effect_start)
{
m68k_set_irq(7);
}
}
-
+
// uint32 invalid_instruction_address = s68000exec(M68KCyclesPerScanline);
// if (invalid_instruction_address != 0x80000000)
// cd_bios_process(invalid_instruction_address);
m68k_execute(M68KCyclesPerScanline);
// No CD handling... !!! FIX !!!
cd_bios_exec(i); // NOTE: Ignores parameter...
- tom_pit_exec(RISCCyclesPerScanline);
+ TOMExecPIT(RISCCyclesPerScanline);
jerry_pit_exec(RISCCyclesPerScanline);
jerry_i2s_exec(RISCCyclesPerScanline);
gpu_exec(RISCCyclesPerScanline);
- if (dsp_enabled)
- DSPExec(RISCCyclesPerScanline);
-//Interlacing is still not handled correctly here... !!! FIX !!!
- if (i >= vdb && i < vde)//vbb)
- {
- if (!(i & 0x01)) // Execute OP only on even lines (non-interlaced only!)
- {
- tom_exec_scanline(backbuffer, i/2, render); // i/2 is a kludge...
- backbuffer += GetSDLScreenPitch() / 2; // Convert bytes to words...
- }
- }
+ if (vjs.DSPEnabled)
+ if (vjs.usePipelinedDSP)
+ DSPExecP2(RISCCyclesPerScanline); // Pipelined DSP execution (3 stage)...
+ else
+ DSPExec(RISCCyclesPerScanline); // Ordinary non-pipelined DSP
+// DSPExecComp(RISCCyclesPerScanline); // Comparison core
+
+ TOMExecScanline(i, render);
}
}