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Remove OP dump to fix lockups when exiting VJ.
[virtualjaguar] / src / gpu.cpp
diff --git a/src/gpu.cpp b/src/gpu.cpp
index 6ed7a38fe8d23e8507b59477f18cd779923f6e0b..e1fdd41e8751be298c26804e4a198a37de0c4f7d 100644 (file)
--- a/src/gpu.cpp
+++ b/src/gpu.cpp
@@ -5,10 +5,10 @@
 //
 // Originally by David Raingeard (Cal2)
 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
-// Cleanups, endian wrongness, and bad ASM amelioration by James L. Hammons
+// Cleanups, endian wrongness, and bad ASM amelioration by James Hammons
 // (C) 2010 Underground Software
 //
-// JLH = James L. Hammons <jlhamm@acm.org>
+// JLH = James Hammons <jlhamm@acm.org>
 //
 // Who  When        What
 // ---  ----------  -------------------------------------------------------------
@@ -32,7 +32,7 @@
 #include "jagdasm.h"
 #include "jaguar.h"
 #include "log.h"
-#include "m68k.h"
+#include "m68000/m68kinterface.h"
 //#include "memory.h"
 #include "tom.h"
 
@@ -99,9 +99,8 @@
 #define GPU_DIS_SUBQT
 #define GPU_DIS_XOR
 
-bool doGPUDis = false;
-//bool doGPUDis = true;
-//*/
+//bool doGPUDis = false;
+bool doGPUDis = true;
 #endif
 
 /*
@@ -1733,7 +1732,12 @@ static void gpu_opcode_store_r14_indexed(void)
                WriteLog("%06X: STORE  R%02u, (R14+$%02X) [NCZ:%u%u%u, R%02u=%08X, R14+$%02X=%08X]\n", gpu_pc-2, IMM_2, gpu_convert_zero[IMM_1] << 2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, gpu_convert_zero[IMM_1] << 2, gpu_reg[14]+(gpu_convert_zero[IMM_1] << 2));
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong((gpu_reg[14] & 0xFFFFFFFC) + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
+       uint32 address = gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2);
+       
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               GPUWriteLong(address & 0xFFFFFFFC, RN, GPU);
+       else
+               GPUWriteLong(address, RN, GPU);
 #else
        GPUWriteLong(gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
 #endif
@@ -1746,7 +1750,12 @@ static void gpu_opcode_store_r15_indexed(void)
                WriteLog("%06X: STORE  R%02u, (R15+$%02X) [NCZ:%u%u%u, R%02u=%08X, R15+$%02X=%08X]\n", gpu_pc-2, IMM_2, gpu_convert_zero[IMM_1] << 2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, gpu_convert_zero[IMM_1] << 2, gpu_reg[15]+(gpu_convert_zero[IMM_1] << 2));
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong((gpu_reg[15] & 0xFFFFFFFC) + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
+       uint32 address = gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2);
+
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               GPUWriteLong(address & 0xFFFFFFFC, RN, GPU);
+       else
+               GPUWriteLong(address, RN, GPU);
 #else
        GPUWriteLong(gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2), RN, GPU);
 #endif
@@ -1759,7 +1768,12 @@ static void gpu_opcode_load_r14_ri(void)
                WriteLog("%06X: LOAD   (R14+R%02u), R%02u [NCZ:%u%u%u, R14+R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM+gpu_reg[14], IMM_2, RN);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       RN = GPUReadLong((gpu_reg[14] + RM) & 0xFFFFFFFC, GPU);
+       uint32 address = gpu_reg[14] + RM;
+
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               RN = GPUReadLong(address & 0xFFFFFFFC, GPU);
+       else
+               RN = GPUReadLong(address, GPU);
 #else
        RN = GPUReadLong(gpu_reg[14] + RM, GPU);
 #endif
@@ -1776,7 +1790,12 @@ static void gpu_opcode_load_r15_ri(void)
                WriteLog("%06X: LOAD   (R15+R%02u), R%02u [NCZ:%u%u%u, R15+R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM+gpu_reg[15], IMM_2, RN);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       RN = GPUReadLong((gpu_reg[15] + RM) & 0xFFFFFFFC, GPU);
+       uint32 address = gpu_reg[15] + RM;
+
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               RN = GPUReadLong(address & 0xFFFFFFFC, GPU);
+       else
+               RN = GPUReadLong(address, GPU);
 #else
        RN = GPUReadLong(gpu_reg[15] + RM, GPU);
 #endif
@@ -1793,7 +1812,12 @@ static void gpu_opcode_store_r14_ri(void)
                WriteLog("%06X: STORE  R%02u, (R14+R%02u) [NCZ:%u%u%u, R%02u=%08X, R14+R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM+gpu_reg[14]);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong((gpu_reg[14] + RM) & 0xFFFFFFFC, RN, GPU);
+       uint32 address = gpu_reg[14] + RM;
+
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               GPUWriteLong(address & 0xFFFFFFFC, RN, GPU);
+       else
+               GPUWriteLong(address, RN, GPU);
 #else
        GPUWriteLong(gpu_reg[14] + RM, RN, GPU);
 #endif
@@ -1805,8 +1829,13 @@ static void gpu_opcode_store_r15_ri(void)
        if (doGPUDis)
                WriteLog("%06X: STORE  R%02u, (R15+R%02u) [NCZ:%u%u%u, R%02u=%08X, R15+R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM+gpu_reg[15]);
 #endif
-#ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong((gpu_reg[15] + RM) & 0xFFFFFFFC, RN, GPU);
+#ifdef GPU_CORRECT_ALIGNMENT_STORE
+       uint32 address = gpu_reg[15] + RM;
+
+       if (address >= 0xF03000 && address <= 0xF03FFF)
+               GPUWriteLong(address & 0xFFFFFFFC, RN, GPU);
+       else
+               GPUWriteLong(address, RN, GPU);
 #else
        GPUWriteLong(gpu_reg[15] + RM, RN, GPU);
 #endif
@@ -1863,7 +1892,7 @@ static void gpu_opcode_storew(void)
        if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
                GPUWriteLong(RM & 0xFFFFFFFE, RN & 0xFFFF, GPU);
        else
-               JaguarWriteWord(RM & 0xFFFFFFFE, RN, GPU);
+               JaguarWriteWord(RM, RN, GPU);
 #else
        if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
                GPUWriteLong(RM, RN & 0xFFFF, GPU);
@@ -1879,7 +1908,10 @@ static void gpu_opcode_store(void)
                WriteLog("%06X: STORE  R%02u, (R%02u) [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X]\n", gpu_pc-2, IMM_2, IMM_1, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_2, RN, IMM_1, RM);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong(RM & 0xFFFFFFFC, RN, GPU);
+       if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+               GPUWriteLong(RM & 0xFFFFFFFC, RN, GPU);
+       else
+               GPUWriteLong(RM, RN, GPU);
 #else
        GPUWriteLong(RM, RN, GPU);
 #endif
@@ -1888,8 +1920,16 @@ static void gpu_opcode_store(void)
 static void gpu_opcode_storep(void)
 {
 #ifdef GPU_CORRECT_ALIGNMENT
-       GPUWriteLong((RM & 0xFFFFFFF8) + 0, gpu_hidata, GPU);
-       GPUWriteLong((RM & 0xFFFFFFF8) + 4, RN, GPU);
+       if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+       {
+               GPUWriteLong((RM & 0xFFFFFFF8) + 0, gpu_hidata, GPU);
+               GPUWriteLong((RM & 0xFFFFFFF8) + 4, RN, GPU);
+       }
+       else
+       {
+               GPUWriteLong(RM + 0, gpu_hidata, GPU);
+               GPUWriteLong(RM + 4, RN, GPU);
+       }
 #else
        GPUWriteLong(RM + 0, gpu_hidata, GPU);
        GPUWriteLong(RM + 4, RN, GPU);
@@ -1922,7 +1962,7 @@ static void gpu_opcode_loadw(void)
        if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
                RN = GPUReadLong(RM & 0xFFFFFFFE, GPU) & 0xFFFF;
        else
-               RN = JaguarReadWord(RM & 0xFFFFFFFE, GPU);
+               RN = JaguarReadWord(RM, GPU);
 #else
        if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
                RN = GPUReadLong(RM, GPU) & 0xFFFF;
@@ -1938,6 +1978,20 @@ static void gpu_opcode_loadw(void)
 // According to the docs, & "Do The Same", this address is long aligned...
 // So let's try it:
 // And it works!!! Need to fix all instances...
+// Also, Power Drive Rally seems to contradict the idea that only LOADs in
+// the $F03000-$F03FFF range are aligned...
+#warning "!!! Alignment issues, need to find definitive final word on this !!!"
+/*
+Preliminary testing on real hardware seems to confirm that something strange goes on
+with unaligned reads in main memory. When the address is off by 1, the result is the
+same as the long address with the top byte replaced by something. So if the read is
+from $401, and $400 has 12 34 56 78, the value read will be $nn345678, where nn is a currently unknown vlaue.
+When the address is off by 2, the result would be $nnnn5678, where nnnn is unknown.
+When the address is off by 3, the result would be $nnnnnn78, where nnnnnn is unknown.
+It may be that the "unknown" values come from the prefetch queue, but not sure how
+to test that. They seem to be stable, though, which would indicate such a mechanism.
+Sometimes, however, the off by 2 case returns $12345678!
+*/
 static void gpu_opcode_load(void)
 {
 #ifdef GPU_DIS_LOAD
@@ -1945,7 +1999,16 @@ static void gpu_opcode_load(void)
                WriteLog("%06X: LOAD   (R%02u), R%02u [NCZ:%u%u%u, R%02u=%08X, R%02u=%08X] -> ", gpu_pc-2, IMM_1, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, IMM_1, RM, IMM_2, RN);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       RN = GPUReadLong(RM & 0xFFFFFFFC, GPU);
+       uint32 mask[4] = { 0x00000000, 0xFF000000, 0xFFFF0000, 0xFFFFFF00 };
+//     if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+               RN = GPUReadLong(RM & 0xFFFFFFFC, GPU);
+//             RN = GPUReadLong(RM & 0x00FFFFFC, GPU);
+//     else
+//             RN = GPUReadLong(RM, GPU);
+       // Simulate garbage in unaligned reads...
+//seems that this behavior is different in GPU mem vs. main mem...
+//     if ((RM < 0xF03000) || (RM > 0xF0BFFF))
+//             RN |= mask[RM & 0x03];
 #else
        RN = GPUReadLong(RM, GPU);
 #endif
@@ -1958,8 +2021,16 @@ static void gpu_opcode_load(void)
 static void gpu_opcode_loadp(void)
 {
 #ifdef GPU_CORRECT_ALIGNMENT
-       gpu_hidata = GPUReadLong((RM & 0xFFFFFFF8) + 0, GPU);
-       RN                 = GPUReadLong((RM & 0xFFFFFFF8) + 4, GPU);
+       if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+       {
+               gpu_hidata = GPUReadLong((RM & 0xFFFFFFF8) + 0, GPU);
+               RN                 = GPUReadLong((RM & 0xFFFFFFF8) + 4, GPU);
+       }
+       else
+       {
+               gpu_hidata = GPUReadLong(RM + 0, GPU);
+               RN                 = GPUReadLong(RM + 4, GPU);
+       }
 #else
        gpu_hidata = GPUReadLong(RM + 0, GPU);
        RN                 = GPUReadLong(RM + 4, GPU);
@@ -1973,7 +2044,12 @@ static void gpu_opcode_load_r14_indexed(void)
                WriteLog("%06X: LOAD   (R14+$%02X), R%02u [NCZ:%u%u%u, R14+$%02X=%08X, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1] << 2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, gpu_convert_zero[IMM_1] << 2, gpu_reg[14]+(gpu_convert_zero[IMM_1] << 2), IMM_2, RN);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       RN = GPUReadLong((gpu_reg[14] & 0xFFFFFFFC) + (gpu_convert_zero[IMM_1] << 2), GPU);
+       uint32 address = gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2);
+
+       if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+               RN = GPUReadLong(address & 0xFFFFFFFC, GPU);
+       else
+               RN = GPUReadLong(address, GPU);
 #else
        RN = GPUReadLong(gpu_reg[14] + (gpu_convert_zero[IMM_1] << 2), GPU);
 #endif
@@ -1990,7 +2066,12 @@ static void gpu_opcode_load_r15_indexed(void)
                WriteLog("%06X: LOAD   (R15+$%02X), R%02u [NCZ:%u%u%u, R15+$%02X=%08X, R%02u=%08X] -> ", gpu_pc-2, gpu_convert_zero[IMM_1] << 2, IMM_2, gpu_flag_n, gpu_flag_c, gpu_flag_z, gpu_convert_zero[IMM_1] << 2, gpu_reg[15]+(gpu_convert_zero[IMM_1] << 2), IMM_2, RN);
 #endif
 #ifdef GPU_CORRECT_ALIGNMENT
-       RN = GPUReadLong((gpu_reg[15] & 0xFFFFFFFC) + (gpu_convert_zero[IMM_1] << 2), GPU);
+       uint32 address = gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2);
+
+       if ((RM >= 0xF03000) && (RM <= 0xF03FFF))
+               RN = GPUReadLong(address & 0xFFFFFFFC, GPU);
+       else
+               RN = GPUReadLong(address, GPU);
 #else
        RN = GPUReadLong(gpu_reg[15] + (gpu_convert_zero[IMM_1] << 2), GPU);
 #endif
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